CN113472368A - Multi-frequency-point maximum power control circuit of transmitting coil - Google Patents
Multi-frequency-point maximum power control circuit of transmitting coil Download PDFInfo
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Abstract
The invention belongs to the field of industrial measurement and control, and particularly relates to a multi-frequency-point maximum power control circuit of a transmitting coil, which is suitable for various application occasions based on transmitting electromagnetic wave signals by the transmitting coil. The invention comprises a connecting piece CN1, a multiplier IC1, a power operational amplifier IC2, a command RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjusting operational amplifier IC6, a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1KA1, a relay 2KA2, a relay 3KA3, a relay 4KA4, a resonant capacitor 1C01, a resonant capacitor 2C02, a resonant capacitor 3C03, a resonant capacitor 4C04 and the like. The circuit of the invention utilizes the digital logic control circuit to select the resonant capacitors with different frequency points and carry out the non-static closed-loop control on the current of the transmitting coil, thereby realizing the maximum power transmission and the safety protection control of the electromagnetic wave signal with selectable resonant frequency points and controllable transmitting current based on one transmitting coil. The invention has the advantages of simple circuit, high reliability, low cost, good safety and easy production.
Description
Technical Field
The invention belongs to the field of industrial measurement and control, relates to a circuit, in particular to a multi-frequency point maximum power control circuit of a transmitting coil, and is suitable for various application occasions based on the electromagnetic wave signals transmitted by the transmitting coil.
Background
Based on the electromagnetic induction principle, a wireless signal transmission technology for transmitting electromagnetic wave signals by using a transmitting coil is increasingly and widely regarded, and the application of the wireless signal transmission technology is spread in various industries such as civil use, military use and the like. At present, the wireless signal transmission technology is mainly based on a single-frequency-point resonance transmitting coil and a control circuit thereof, and not only is the cost high, but also the miniaturization and the portability of the whole signal transmitting and transmitting device are not easy. Therefore, the control circuit for realizing the maximum power transmission of the electromagnetic wave signals by designing the transmission setting for controlling the resonance of different frequency points by using digital logic has wide application prospect.
Disclosure of Invention
The invention aims to provide a multi-frequency point maximum power control circuit of a transmitting coil aiming at the defects in the prior art. The invention has the advantages of simple circuit, high reliability, low cost, good safety and easy production.
A multi-frequency point maximum power control circuit of a transmitting coil comprises a resonance main circuit and a control circuit,
the main resonance circuit comprises a connecting piece CN1, a transmitting coil TC1, a multiplier IC1, a power operational amplifier IC2, a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1KA1, a relay 2KA2, a relay 3KA3, a relay 4KA4, an output resistor R1, an amplifying resistor R2, a sampling resistor Rs, a noise reduction capacitor C1, a positive power supply capacitor C10, a negative power supply capacitor C11, a resonance capacitor 1C01, a resonance capacitor 2C02, a resonance capacitor 3C03 and a resonance capacitor 4C04, and a sine command end U of the connecting piece CN1i *The input end of the multiplier IC1 is connected with the input end of the upper divider resistor R3, the input end of the multiplier IC1 is connected with the positive end X1, the input end of the multiplier IC1 is connected with the negative end X2, the input end of the multiplier IC1 is connected with the negative end Y2, and the offset end Z of the multiplier IC1 is connected with the ground, the input end Y1 of the multiplier IC1 is connected with the output end OUT of the regulating operational amplifier IC6 and one end of the integrating capacitor C8, the positive end + V of the multiplier IC1 is connected with the positive end + VCC of the circuit, the negative end-V of the multiplier IC1 is connected with the negative end-VSS of the circuit, the output end OUT of the multiplier IC1 is connected with one end of the output resistor R1, the other end of the output resistor R1 is connected with the negative input end IN-of the power operational amplifier IC2, one end of the amplifier R2 and one end of the noise reduction capacitor C1, the positive end of the power operational amplifier IC2 is connected with the ground, and the positive end IN-plus-minus-plus-minus-plus-minus-plus-minus-plus-minus-plus-minusThe positive power source end + V end of a power operational amplifier IC2 is connected with the positive power source end + VCC end of a circuit, the negative power source end-V end of a power operational amplifier IC2 is connected with the negative power source end-VSS end of the circuit, the output end OUT of a power operational amplifier IC2 is connected with the other end of an amplifying resistor R2, the other end of a noise reduction capacitor C1 and one end of a transmitting coil TC1, the other end of the transmitting coil TC1 is connected with one end of a resonant capacitor 1C01, one end of a resonant capacitor 2C02, one end of a resonant capacitor 3C03 and one end of a resonant capacitor 4C04, the other end of the resonant capacitor 1C01 is connected with one end P2 end of a normally open relay 1KA1 contact, the other end of the resonant capacitor 2C02 is connected with one end P2 end of a relay 2KA2 contact, the other end of the resonant capacitor 3C03 is connected with one end P2 end of a normally open relay 3KA3 contact, the other end of the resonant capacitor 4C04 is connected with one end P2 end of a normally open relay 4KA4, one end of a sampling resistor Rs is connected with one end of a feedback resistor R5, the other end P1 of a normally open contact of a relay 1KA1, the other end P1 of a normally open contact of a relay 2KA2, the other end P1 of a normally open contact of a relay 3KA3 and the other end P1 of a normally open contact of a relay 4KA4, the other end of the sampling resistor Rs is grounded, a positive power supply terminal VCC end of a connecting piece CN1 is connected with a positive power supply terminal + VCC end of the circuit and one end of a positive power supply capacitor C10, a negative VSS end of a connecting piece CN1 is connected with a negative power supply terminal + VSS end of the circuit and one end of a negative power supply capacitor C11, a ground terminal GND end of a connecting piece CN1 is grounded with the other end of the positive power supply capacitor C10 and the other end of the negative power supply capacitor C11, a resonant address A end of the connecting piece CN1 is connected with the 1 st address A end of a decoder IC7, and a resonant address B end of a connecting piece 1 is connected with the 2B 7 of a decoder IC7, the positive power source end + V end of the decoder IC7 is connected with the positive power source end + VCC end of the circuit, the ground end GND end of the decoder IC7 is grounded, the 1 st output end Y1 end of the decoder IC7 is connected with the 1 st input end I1 end of the inverter IC8, the 2 nd output end Y2 end of the decoder IC7 is connected with the 2 nd input end I2 end of the inverter IC8, the 3 rd output end Y3 end of the decoder IC7 is connected with the 3 rd input end I3 end of the inverter IC8, the 4 th output end Y4 end of the decoder IC7 is connected with the 4 th input end I4 end of the inverter IC8, the positive power source end + V end of the inverter IC8 is connected with the positive power source end + VCC end of the circuit, the ground end GND end of the inverter IC8 is grounded, and the ground end GND end of the inverter IC8 is groundedThe 1 st output end O end of the IC is connected with the 1 st input end I end of the driving chip IC, the 2 nd output end O end of the inverter IC is connected with the 2 nd input end I end of the driving chip IC, the 3 rd output end O end of the inverter IC is connected with the 3 rd input end I end of the driving chip IC, the 4 th output end O end of the inverter IC is connected with the 4 th input end I end of the driving chip IC, the positive power source end + V end of the driving chip IC is connected with the positive power source end + VCC end of the circuit, the ground end GND end of the driving chip IC is grounded, the 1 st output end O end of the driving chip IC is connected with one end A end of the relay 1KA coil, the 2 nd output end O end of the driving chip IC is connected with one end A end of the relay 2KA coil, the 3 rd output end O end of the driving chip IC is connected with one end A end of the relay 3KA coil, the 4 th output end O end of the driving chip IC is connected with one end A end of the relay 4KA coil, the other end A2 end of the relay 1KA1 coil, the other end A2 end of the relay 2KA2 coil, the other end A2 end of the relay 3KA3 coil and the other end A2 end of the relay 4KA4 coil are connected with the positive power supply end + VCC end of the circuit;
the control circuit comprises an instruction RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjustment operational amplifier IC6, an upper voltage-dividing resistor R3, a lower voltage-dividing resistor R4, a feedback resistor R5, a given resistor R6, a positive end resistor R7, a negative end resistor R8, a deviation resistor R9, a grounding resistor R10, an integration resistor R11, an integrating potentiometer RPI, a proportional potentiometer RPP, an upper filtering capacitor C2, an upper coupling capacitor C3, a lower filtering capacitor C4, a lower coupling capacitor C4, a lower output capacitor C4, an upper output capacitor C4, an integration capacitor C4 and a proportional capacitor C4, wherein the other end of the upper voltage-dividing resistor R4 is connected with one end of the lower voltage-dividing resistor R4, one end of the upper filtering capacitor C4 is connected with a + IN end of the instruction RMS/DC chip IC4, one end of the instruction RMS/DC chip IC4 is connected with the upper coupling capacitor R4, and the other end of the negative voltage-dividing resistor R4 is connected with the upper input end of the negative voltage-dividing resistor R4, the other end of the negative voltage-dividing input end of the instruction RMS/DC chip IN chip 4, The other end of the upper filter capacitor C2 and the other end of the upper coupling capacitor C3 are grounded, the enable/EN terminal of the command RMS/DC chip IC3, the negative power-V terminal of the command RMS/DC chip IC3 and the ground GND terminal of the command RMS/DC chip IC3 are grounded, the positive power + V terminal of the command RMS/DC chip IC3 is connected with the positive power + VCC terminal of the circuit, the positive output terminal OUT + terminal of the command RMS/DC chip IC3 is connected with one end of the upper output capacitor C7 and one end of the given resistor R6, the negative output terminal OUT-terminal of the command RMS/DC chip IC3 and the other end of the upper output capacitor C7 are grounded, the other end of the feedback resistor R5 is connected with one end of the lower filter capacitor C4 and the positive input terminal IN + terminal of the feedback RMS/DC chip IC4, the negative input terminal IN-terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower coupling capacitor C5, the other end of the lower filter capacitor C4 and the other end of the lower coupling capacitor C5 are grounded, the enable/EN terminal of the feedback RMS/DC chip IC4, the negative power-V terminal of the feedback RMS/DC chip IC4 and the ground GND terminal of the feedback RMS/DC chip IC4 are grounded, the positive output terminal OUT + terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower output capacitor C6 and one end of the negative terminal resistor R8, the negative output terminal OUT-terminal of the feedback RMS/DC chip IC4 and the other end of the lower output capacitor C6 are grounded, the positive power + V terminal of the feedback RMS/DC chip IC4 is connected with the positive power terminal VCC of the circuit, the other end of the negative terminal resistor R8 is connected with one end of the offset resistor R9 and the negative input terminal IN-terminal of the offset operational amplifier IC5, the other end of the given resistor R6 is connected with one end of the positive terminal resistor R7 and the positive input terminal IN terminal of the offset operational amplifier IC5, the other end of the positive terminal resistor R7 is grounded, the output end OUT of the deviation operational amplifier IC5 is connected with the right end of the proportional potentiometer RPP and the other end of the deviation resistor R9, the positive power terminal + V of the deviation operational amplifier IC5 is connected with the positive power terminal + VCC of the circuit, the negative power terminal-V of the deviation operational amplifier IC5 is connected with the negative power terminal-VSS of the circuit, the left end of the proportional potentiometer RPP is connected with one end of the grounding resistor R10, the other end of the grounding resistor R10 is grounded, the center terminal of the proportional potentiometer RPP is connected with one end of the integrating resistor R11 and one end of the proportional capacitor C9, the other end of the integrating resistor R11 is connected with the lower end of the integrating potentiometer RPI, the upper end and the center terminal of the integrating resistor RPI are connected with the negative input end IN-terminal of the regulation operational amplifier IC6, the other end of the proportional capacitor C9 and the other end of the integrating capacitor C8, the positive input terminal IN + of the regulation operational amplifier IC6 is grounded, the positive power supply terminal + V terminal of the regulating operational amplifier IC6 is connected with the positive power supply terminal + VCC terminal of the circuit, and the negative power supply terminal-V terminal of the regulating operational amplifier IC6 is connected with the negative power supply terminal-VSS terminal of the circuit.
Preferably, the circuit parameters are matched as follows:
setting:
is a sine-wave voltage signal and is,
omega is angular frequency, omega belongs to [ omega ]min，ωmax]，ωiIs the angular frequency of each frequency point, beta is the current transformation coefficient,
I0respectively a given effective value and an actual effective value, u, of the coil current0For outputting voltage signal transients, i, to the transmitter coil0For the transmitting coil to output a current signal transient,
coil current lag angle, R0Is the internal resistance of the transmitting coil, L0Is the inductance of the transmitting coil, Rr is the resistance value of the left part of the proportional potentiometer RPP, Ri is the resistance value of the lower end of the integrator RPI, C0iThe resonance capacitance of each frequency point;
first, multiplier IC1 and IC 2: input-output relationship:
second, deviation operational amplifier IC5 and regulation operational amplifier IC 6:
a PI regulator: r6 ═ R8, R7 ═ R9, C8 ═ C9 (2)
PI regulator transfer function:
thirdly, maximum power resonance condition:
order to
Resonance frequency:
resonance capacitance:
fourthly, the relation between the resonance capacitance and the resonance frequency:
the invention has the following beneficial effects:
the invention adopts a simple digital logic frequency selection and analog closed-loop control circuit scheme, and realizes the maximum power transmission and safety protection control of electromagnetic wave signals with selectable resonant frequency points and controllable transmission current based on one transmission coil. The invention has the advantages of simple circuit, high reliability, low cost, good safety, easy productization and wide application range.
Drawings
Fig. 1 is a circuit diagram of the present invention.
Detailed Description
The invention will be further explained with reference to the drawings.
As shown in fig. 1, a multi-frequency point maximum power control circuit of a transmitting coil.
A multi-frequency point maximum power control circuit of a transmitting coil comprises a resonance main circuit and a control circuit.
The main resonance circuit comprises a connecting piece CN1, a transmitting coil TC1, a multiplier IC1, a power operational amplifier IC2, a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1KA1, a relay 2KA2, a relay 3KA3, a relay 4KA4, and an input circuitThe circuit comprises a resistor R1, an amplifying resistor R2, a sampling resistor Rs, a noise reduction capacitor C1, a positive power supply capacitor C10, a negative power supply capacitor C11, a resonant capacitor 1C01, a resonant capacitor 2C02, a resonant capacitor 3C03, a resonant capacitor 4C04 and a sine command end U of a connecting piece CN1i *The end is connected with one end of an upper divider resistor R3, an input 1 positive end X1 end of a multiplier IC1, an input 1 negative end X2 end of a multiplier IC1, an input 2 negative end Y2 end of a multiplier IC1 and a bias end Z end of a multiplier IC1 are all grounded, an input 2 positive end Y1 end of a multiplier IC1 is connected with an output end OUT end of an adjusting operational amplifier IC6 and one end of an integrating capacitor C8, a positive power source end + V end of a multiplier IC1 is connected with a circuit positive power source end + VCC end, a negative power source end-V end of a multiplier IC1 is connected with a circuit negative power source end-VSS end, an output end OUT end of a multiplier IC1 is connected with one end of an output resistor R1, the other end of the output resistor R1 is connected with a negative power input end IN-of a power operational amplifier IC2, one end of an amplifying resistor R2 and one end of a noise reduction capacitor C1, a positive input end IN + VCC of a power amplifier IC2 is grounded, a positive power amplifier IC2 is connected with a positive power circuit + VCC, the negative power supply end-V end of the power operational amplifier IC2 is connected with the negative power supply end-VSS end of the circuit, the output end OUT of the power operational amplifier IC2 is connected with the other end of the amplifying resistor R2, the other end of the noise reduction capacitor C1 and one end of the transmitting coil TC1, the other end of the transmitting coil TC1 is connected with one end of the resonant capacitor 1C01, one end of the resonant capacitor 2C02, one end of the resonant capacitor 3C03 and one end of the resonant capacitor 4C04, the other end of the resonant capacitor 1C01 is connected with one end P2 end of the normally open contact of the relay 1KA1, the other end of the resonant capacitor 2C02 is connected with one end P2 end of the normally open contact of the relay 2KA2, the other end of the resonant capacitor 3C 9 is connected with one end P2 end of the normally open contact of the relay 3KA 3KA 2, the other end of the resonant capacitor 4C04 is connected with one end P2 end of the normally open contact of the relay 4KA4, one end of the sampling resistor Rs is connected with one end of the feedback resistor R366867 and the other end P3687458 of the normally open contact of the relay 1KA 3687458, The other end P1 end of relay 2KA2 normally open contact, the other end P1 end of relay 3KA3 normally open contact, the other end P1 end of relay 4KA4 normally open contact are connected, the other end of sampling resistor Rs is grounded, the positive power supply end VCC end of connecting piece CN1 is connected with the positive power supply end + VCC end of circuit, the one end of positive power supply capacitor C10, the negative power supply end of connecting piece CN1 is connected with the negative power supply end of circuit CN1The VSS terminal is connected to the negative power source terminal + VSS terminal of the circuit, one terminal of the negative power source capacitor C11, the GND terminal of the connection element CN1 is connected to the other terminal of the positive power source capacitor C10 and the other terminal of the negative power source capacitor C11, the resonant address a terminal of the connection element CN1 is connected to the 1 st address terminal a of the decoder IC7, the resonant address B terminal of the connection element CN1 is connected to the 2 nd address terminal B of the decoder IC7, the positive power source terminal + V terminal of the decoder IC7 is connected to the positive power source terminal + VCC terminal of the circuit, the GND terminal of the decoder IC7 is connected to ground, the 1 st output terminal Y1 terminal of the decoder IC7 is connected to the 1 st input terminal I1 terminal of the inverter IC8, the 2 nd output terminal Y2 terminal of the decoder IC7 is connected to the 2 nd input terminal I2 terminal of the inverter IC8, the 3 rd output terminal Y3 terminal of the decoder IC7 is connected to the 3 rd input terminal I3 terminal of the inverter IC8, and the third output terminal Y3 of the inverter IC3 is connected to the third input terminal 3, the positive power source terminal + V terminal of the inverter IC8 is connected to the circuit positive power source terminal + VCC terminal, the ground terminal GND terminal of the inverter IC8 is connected to ground, the 1 st output terminal O1 terminal of the inverter IC8 is connected to the 1 st input terminal I1 terminal of the driver chip IC1, the 2 nd output terminal O1 terminal of the inverter IC1 is connected to the 2 nd input terminal I1 terminal of the driver chip IC1, the 3 rd output terminal O1 terminal of the inverter IC1 is connected to the 3 rd input terminal I1 terminal of the driver chip IC1, the 4 th output terminal O1 terminal of the inverter IC1 is connected to the 4 th input terminal I1 terminal of the driver chip IC1, the positive power source terminal + V terminal of the driver chip IC1 is connected to the circuit positive power source terminal + VCC terminal, the ground terminal of the driver chip IC1 is connected to ground, the 1 st output terminal O1 terminal of the driver chip IC1 is connected to one end a1 terminal of the relay KA, the first output terminal 1 of the driver chip IC1 is connected to one end 1 A3 terminal 1 of the relay IC 1. The 4 th output end O4 end of the driving chip IC9 is connected with one end A1 end of a relay 4KA4 coil, and the other end A2 end of the relay 1KA1 coil, the other end A2 end of the relay 2KA2 coil, the other end A2 end of the relay 3KA3 coil and the other end A2 end of the relay 4KA4 coil are connected with the positive power supply end + VCC end of the circuit.
The control circuit comprises an instruction RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjustment operational amplifier IC6, an upper voltage-dividing resistor R3, a lower voltage-dividing resistor R4, a feedback resistor R5, a given resistor R6, a positive end resistor R7, a negative end resistor R8, a deviation resistor R9, a grounding resistor R10, an integration resistor R11, an integrating potentiometer RPI, a proportional potentiometer RPP, an upper filtering capacitor C2, an upper coupling capacitor C3, a lower filtering capacitor C4, a lower coupling capacitor C4, a lower output capacitor C4, an upper output capacitor C4, an integration capacitor C4 and a proportional capacitor C4, wherein the other end of the upper voltage-dividing resistor R4 is connected with one end of the lower voltage-dividing resistor R4, one end of the upper filtering capacitor C4 is connected with a + IN end of the instruction RMS/DC chip IC4, one end of the instruction RMS/DC chip IC4 is connected with the upper coupling capacitor R4, and the other end of the negative voltage-dividing resistor R4 is connected with the upper input end of the negative voltage-dividing resistor R4, and the other end of the upper coupling capacitor R4, The other end of the upper filter capacitor C2 and the other end of the upper coupling capacitor C3 are grounded, the enable/EN terminal of the command RMS/DC chip IC3, the negative power-V terminal of the command RMS/DC chip IC3 and the ground GND terminal of the command RMS/DC chip IC3 are grounded, the positive power + V terminal of the command RMS/DC chip IC3 is connected with the positive power + VCC terminal of the circuit, the positive output terminal OUT + terminal of the command RMS/DC chip IC3 is connected with one end of the upper output capacitor C7 and one end of the given resistor R6, the negative output terminal OUT-terminal of the command RMS/DC chip IC3 and the other end of the upper output capacitor C7 are grounded, the other end of the feedback resistor R5 is connected with one end of the lower filter capacitor C4 and the positive input terminal IN + terminal of the feedback RMS/DC chip IC4, the negative input terminal IN-terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower coupling capacitor C5, the other end of the lower filter capacitor C4 and the other end of the lower coupling capacitor C5 are grounded, the enable/EN terminal of the feedback RMS/DC chip IC4, the negative power-V terminal of the feedback RMS/DC chip IC4 and the ground GND terminal of the feedback RMS/DC chip IC4 are grounded, the positive output terminal OUT + terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower output capacitor C6 and one end of the negative terminal resistor R8, the negative output terminal OUT-terminal of the feedback RMS/DC chip IC4 and the other end of the lower output capacitor C6 are grounded, the positive power + V terminal of the feedback RMS/DC chip IC4 is connected with the positive power terminal VCC of the circuit, the other end of the negative terminal resistor R8 is connected with one end of the offset resistor R9 and the negative input terminal IN-terminal of the offset operational amplifier IC5, the other end of the given resistor R6 is connected with one end of the positive terminal resistor R7 and the positive input terminal IN terminal of the offset operational amplifier IC5, the other end of the positive terminal resistor R7 is grounded, the output end OUT of the deviation operational amplifier IC5 is connected with the right end of the proportional potentiometer RPP and the other end of the deviation resistor R9, the positive power terminal + V of the deviation operational amplifier IC5 is connected with the positive power terminal + VCC of the circuit, the negative power terminal-V of the deviation operational amplifier IC5 is connected with the negative power terminal-VSS of the circuit, the left end of the proportional potentiometer RPP is connected with one end of the grounding resistor R10, the other end of the grounding resistor R10 is grounded, the center terminal of the proportional potentiometer RPP is connected with one end of the integrating resistor R11 and one end of the proportional capacitor C9, the other end of the integrating resistor R11 is connected with the lower end of the integrating potentiometer RPI, the upper end and the center terminal of the integrating resistor RPI are connected with the negative input end IN-terminal of the regulation operational amplifier IC6, the other end of the proportional capacitor C9 and the other end of the integrating capacitor C8, the positive input terminal IN + of the regulation operational amplifier IC6 is grounded, the positive power supply terminal + V terminal of the regulating operational amplifier IC6 is connected with the positive power supply terminal + VCC terminal of the circuit, and the negative power supply terminal-V terminal of the regulating operational amplifier IC6 is connected with the negative power supply terminal-VSS terminal of the circuit.
All devices used by the invention, including a multiplier IC1, a power operational amplifier IC2, a command RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjusting operational amplifier IC6, a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1, a relay 2, a relay 3, a relay 4 and the like, adopt the existing mature device products and can be obtained through the market. For example: the multiplier adopts AD633, the power operational amplifier adopts LM18751, the RMS/DC chip adopts LTC1918, the operational amplifier adopts TLC2262, the decoder adopts 74HC139, the inverter adopts CD40106, the driving chip adopts ULN2065B, the relay adopts G5V-2 series and the like.
The main circuit parameters in the invention are matched as follows:
setting:
is a sine wave voltage signal (unit: V),
omega is angular frequency (unit: rad/s), omega belongs to omegamin，ωmax]，ωiIs the angular frequency of each frequency point (i is 1, 2, 3, 4), beta is the current transformation coefficient (unit: A/V),
I0respectively a given effective value and an actual effective value (unit: A), u for the coil current0For the output voltage instantaneous value (unit: V), i of the transmitting coil0For the transmitting coil to output a current signal instantaneous value (unit: a),
coil current lag angle (rad), R0Is the internal resistance (unit: omega) of the transmitting coil, L0Is the inductance (unit: H) of the transmitting coil, Rr is the resistance value (unit: omega) of the left part of the proportional potentiometer RPP, Ri is the resistance value (unit: omega) of the lower end of the integrator RPI, C0iIs the resonance capacitance (unit: F) of each frequency point (i ═ 1, 2, 3, 4).
IC1, IC 2: input-output relationship:
IC5- -IC 6: a PI regulator: r6 ═ R8, R7 ═ R9, C8 ═ C9 (2)
PI regulator transfer function:
(III) maximum power resonance condition:
order to
Resonance frequency:
resonance capacitance:
(IV) resonance capacitance vs. resonance frequency:
the working process of the invention is as follows:
as shown in fig. 1.
(1) The working process of the resonance main circuit comprises the following steps: the main resonance circuit mainly comprises a transmitting coil TC1, a multiplier IC1, a power operational amplifier IC2 (note: for the sake of convenience of explaining the closed-loop control principle of the transmitting coil current, the functions of the multiplier IC1 and the power operational amplifier IC2 are described in the control circuit part), a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1KA1, a relay 2KA2, a relay 3KA3, a relay 4KA4, a resonance capacitor 1C01, a resonance capacitor 2C02, a resonance capacitor 3C03, a resonance capacitor 4C04 and the like. A frequency selection instruction from a superior controller inputs a binary instruction (UAUB 00, 01, 10, 11) through a resonant address a end and a resonant address B end of a connecting piece CN1, and outputs a resonant capacitor selection instruction (for example, Y1Y2Y3Y4 0111, 1011, 1101, 1110) through a decoder IC7, and then controls a relay 1KA1, a relay 2KA2, a relay 3KA3, and a relay 4KA4 to connect a corresponding resonant capacitor 1C01, a corresponding resonant capacitor 2C02, a corresponding resonant capacitor 3C03, a corresponding resonant capacitor 4C04 and a corresponding transmitting coil TC1 in series according to the instruction requirement, so as to implement maximum power transmission under the given coil current condition.
(2) The working process of the control circuit is as follows: the control circuit mainly comprises a sampling resistor Rs, a command RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjustment operational amplifier IC6 and the like, and peripheral resistors, capacitors, potentiometers and the like of the adjustment operational amplifier IC 6. Transmitting coil current command signal from superior controller
Sine command end through connecting piece CN1
The other path is input to the positive end X1 of the input 1 of the multiplier IC1, divided by the upper divider resistor R3 and the lower divider resistor R4, and then output the current command effective value signal through the command RMS/DC chip IC3
(unit: V), the actual coil current signal obtained from the terminal voltage signal of the sampling resistor Rs is fed back to the RMS/DC chip IC4 to output the actual effective value signal U of the coil currenti(Ui＝βI0) (unit: v), output and after operation of the deviation operational amplifier IC5
A proportional deviation signal which is calculated by a proportional integral regulator circuit mainly comprising an operational amplifier IC6, input to the input 2 positive terminal Y1 of the multiplier IC1 and is mixed with the current command signal by the multiplier IC1
After multiplication, the power operational amplifier IC2 outputs voltage u to the transmitting coil0(sine wave) (unit: V), and further adjusts the effective value I of the actual current of the transmitting coil0(unit: A), when the current closed-loop control system of the transmitting coil is in a steady state, the effective value I of the actual current is0By current command valid signal
It is decided that,
namely: and the current no-static control is realized. In addition, due to the existence of a current closed-loop control system of the transmitting coil, the transmitting coil is enabled to returnWhen the circuit is abnormal, the current of the transmitting coil is effectively controlled, so that the safety protection of the transmitting coil loop is also realized.
Although the invention takes the example that the transmitting coil main loop uses four resonance capacitors to perform frequency-selecting resonance control, the same line can easily extend a multi-frequency point frequency-selecting resonance control scheme of a plurality of resonance capacitors and series-parallel combination thereof, therefore, similar extension also belongs to the protection scope of the invention.
Claims (2)
1. A kind of multi-frequency point maximum power control circuit of the transmitting coil, including syntony main circuit and control circuit, characterized by that:
the main resonance circuit comprises a connecting piece CN1, a transmitting coil TC1, a multiplier IC1, a power operational amplifier IC2, a decoder IC7, an inverter IC8, a driving chip IC9, a relay 1KA1, a relay 2KA2, a relay 3KA3, a relay 4KA4, an output resistor R1, an amplifying resistor R2, a sampling resistor Rs, a noise reduction capacitor C1, a positive power supply capacitor C10, a negative power supply capacitor C11, a resonance capacitor 1C01, a resonance capacitor 2C02, a resonance capacitor 3C03 and a resonance capacitor 4C04, and a sine command end U of the connecting piece CN1i *The end is connected with one end of an upper divider resistor R3, an input 1 positive end X1 end of a multiplier IC1, an input 1 negative end X2 end of a multiplier IC1, an input 2 negative end Y2 end of a multiplier IC1 and a bias end Z end of a multiplier IC1 are all grounded, an input 2 positive end Y1 end of a multiplier IC1 is connected with an output end OUT end of an adjusting operational amplifier IC6 and one end of an integrating capacitor C8, a positive power source end + V end of a multiplier IC1 is connected with a circuit positive power source end + VCC end, a negative power source end-V end of a multiplier IC1 is connected with a circuit negative power source end-VSS end, an output end OUT end of a multiplier IC1 is connected with one end of an output resistor R1, the other end of the output resistor R1 is connected with a negative power input end IN-of a power operational amplifier IC2, one end of an amplifying resistor R2 and one end of a noise reduction capacitor C1, a positive input end of a power operational amplifier IC2 is grounded, a positive input end IN + VCC of a power amplifier IC2 is connected with a positive power circuit, the negative power supply end-V end of the power operational amplifier IC2 is connected with the negative power supply end-VSS end of the circuit, the output end OUT of the power operational amplifier IC2 is connected with the other end of the amplifying resistor R2, the other end of the noise reduction capacitor C1 and one end of the transmitting coil TC1, and the transmitting coil TC1The other end of the sampling resistor Rs is connected with one end of a feedback resistor R5, the other end of the normally open contact P1 of the relay 1KA1, the other end of the sampling resistor CN is grounded, and the source end P3 end of the VCC connecting piece CN is connected with the positive power end P3 end of the positive power circuit VCC 72 + 3 + positive power circuit VCC + 3 + positive power end of the positive power circuit VCC connecting piece CN 72 + 3 + positive power circuit VCC circuit, One end of a positive power supply capacitor C10 is connected, a negative power supply end VSS of a connecting piece CN1 is connected with a circuit negative power supply end + VSS and one end of a negative power supply capacitor C11, a ground end GND of a connecting piece CN1 is connected with the other end of the positive power supply capacitor C10 and the other end of the negative power supply capacitor C11 are grounded, a resonant address A of the connecting piece CN1 is connected with a1 st address end A of a decoder IC7, a resonant address B of the connecting piece CN1 is connected with a2 nd address end B of the decoder IC7, a positive power supply end + V of the decoder IC7 is connected with a circuit positive power supply end + VCC, a ground end GND of the decoder IC7 is connected, a1 st output end Y1 of the decoder IC7 is connected with a1 st input end I1 of the inverter IC8, a2 nd output end Y2 of the decoder IC7 is connected with a2 nd input end I2 of the inverter IC8, a3 rd output end Y8653 of the decoder IC7 is connected with a fourth input end 828653, the 4 th output end Y4 end of the decoder IC7 is connected with the 4 th input end I4 end of the inverter IC8, the positive power source end + V end of the inverter IC8 is connected with the positive power source end + VCC end of the circuit, the ground end GND end of the inverter IC8 is grounded, the 1 st output end O1 end of the inverter IC8 is connected with the 1 st input end I1 end of the driving chip IC9, the 2 nd output end O2 end of the inverter IC8 is connected with the 2 nd input end I2 end of the driving chip IC9, the 3 rd output end O3 end of the inverter IC8 is connected with the 3 rd input end I3 end of the driving chip IC9, and the 4 th output end O4 end of the inverter IC8 is connected with the driving chip I3 endThe 4 th input end I4 end of the C9 is connected, the positive power source end + V end of the driving chip IC9 is connected with the positive power source end + VCC end of the circuit, the ground end GND end of the driving chip IC9 is grounded, the 1 st output end O1 end of the driving chip IC9 is connected with the end A1 end of the coil of the relay 1KA1, the 2 nd output end O2 of the driving chip IC9 is connected with the end A1 end of the coil of the relay 2KA2, the 3 rd output end O3 end of the driving chip IC9 is connected with the end A1 end of the coil of the relay 3KA3, the 4 th output end O4 end of the driving chip IC9 is connected with the end A1 end of the coil of the relay 4KA4, the other end A KA4 end A2 end of the coil of the relay 1KA1, the other end A2 end of the coil of the relay 2KA2, the other end A2 end of the coil of the relay 3A 3 coil, and the other end A2 end of the coil of the relay 4 4 are connected with the positive power source end + VCC end of the circuit;
the control circuit comprises an instruction RMS/DC chip IC3, a feedback RMS/DC chip IC4, a deviation operational amplifier IC5, an adjustment operational amplifier IC6, an upper voltage-dividing resistor R3, a lower voltage-dividing resistor R4, a feedback resistor R5, a given resistor R6, a positive end resistor R7, a negative end resistor R8, a deviation resistor R9, a grounding resistor R10, an integration resistor R11, an integrating potentiometer RPI, a proportional potentiometer RPP, an upper filtering capacitor C2, an upper coupling capacitor C3, a lower filtering capacitor C4, a lower coupling capacitor C4, a lower output capacitor C4, an upper output capacitor C4, an integration capacitor C4 and a proportional capacitor C4, wherein the other end of the upper voltage-dividing resistor R4 is connected with one end of the lower voltage-dividing resistor R4, one end of the upper filtering capacitor C4 is connected with a + IN end of the instruction RMS/DC chip IC4, one end of the instruction RMS/DC chip IC4 is connected with the upper coupling capacitor R4, and the other end of the negative voltage-dividing resistor R4 is connected with the upper input end of the negative voltage-dividing resistor R4, the other end of the negative voltage-dividing input end of the instruction RMS/DC chip IN chip 4, The other end of the upper filter capacitor C2 and the other end of the upper coupling capacitor C3 are grounded, the enable/EN terminal of the command RMS/DC chip IC3, the negative power-V terminal of the command RMS/DC chip IC3 and the ground GND terminal of the command RMS/DC chip IC3 are grounded, the positive power + V terminal of the command RMS/DC chip IC3 is connected with the positive power + VCC terminal of the circuit, the positive output terminal OUT + terminal of the command RMS/DC chip IC3 is connected with one end of the upper output capacitor C7 and one end of the given resistor R6, the negative output terminal OUT-terminal of the command RMS/DC chip IC3 and the other end of the upper output capacitor C7 are grounded, the other end of the feedback resistor R5 is connected with one end of the lower filter capacitor C4 and the positive input terminal IN + terminal of the feedback RMS/DC chip IC4, the negative input terminal IN-terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower coupling capacitor C5, the other end of the lower filter capacitor C4 and the other end of the lower coupling capacitor C5 are grounded, the enable/EN terminal of the feedback RMS/DC chip IC4, the negative power-V terminal of the feedback RMS/DC chip IC4 and the ground GND terminal of the feedback RMS/DC chip IC4 are grounded, the positive output terminal OUT + terminal of the feedback RMS/DC chip IC4 is connected with one end of the lower output capacitor C6 and one end of the negative terminal resistor R8, the negative output terminal OUT-terminal of the feedback RMS/DC chip IC4 and the other end of the lower output capacitor C6 are grounded, the positive power + V terminal of the feedback RMS/DC chip IC4 is connected with the positive power terminal VCC of the circuit, the other end of the negative terminal resistor R8 is connected with one end of the offset resistor R9 and the negative input terminal IN-terminal of the offset operational amplifier IC5, the other end of the given resistor R6 is connected with one end of the positive terminal resistor R7 and the positive input terminal IN terminal of the offset operational amplifier IC5, the other end of the positive terminal resistor R7 is grounded, the output end OUT of the deviation operational amplifier IC5 is connected with the right end of the proportional potentiometer RPP and the other end of the deviation resistor R9, the positive power terminal + V of the deviation operational amplifier IC5 is connected with the positive power terminal + VCC of the circuit, the negative power terminal-V of the deviation operational amplifier IC5 is connected with the negative power terminal-VSS of the circuit, the left end of the proportional potentiometer RPP is connected with one end of the grounding resistor R10, the other end of the grounding resistor R10 is grounded, the center terminal of the proportional potentiometer RPP is connected with one end of the integrating resistor R11 and one end of the proportional capacitor C9, the other end of the integrating resistor R11 is connected with the lower end of the integrating potentiometer RPI, the upper end and the center terminal of the integrating resistor RPI are connected with the negative input end IN-terminal of the regulation operational amplifier IC6, the other end of the proportional capacitor C9 and the other end of the integrating capacitor C8, the positive input terminal IN + of the regulation operational amplifier IC6 is grounded, the positive power supply terminal + V terminal of the regulating operational amplifier IC6 is connected with the positive power supply terminal + VCC terminal of the circuit, and the negative power supply terminal-V terminal of the regulating operational amplifier IC6 is connected with the negative power supply terminal-VSS terminal of the circuit.
2. The multi-frequency-point maximum power control circuit of claim 1, wherein the circuit parameters are associated as follows:
setting:
is a sine-wave voltage signal and is,
omega is angular frequency, omega belongs to [ omega ]min，ωmax]，ωiIs the angular frequency of each frequency point, beta is the current transformation coefficient,
I0respectively a given effective value and an actual effective value, u, of the coil current0For outputting voltage signal transients, i, to the transmitter coil0For the transmitting coil to output a current signal transient,
coil current lag angle, R0Is the internal resistance of the transmitting coil, L0Is the inductance of the transmitting coil, Rr is the resistance value of the left part of the proportional potentiometer RPP, Ri is the resistance value of the lower end of the integrator RPI, C0iThe resonance capacitance of each frequency point;
first, multiplier IC1 and IC 2: input-output relationship:
second, deviation operational amplifier IC5 and regulation operational amplifier IC 6:
a PI regulator: r6 ═ R8, R7 ═ R9, C8 ═ C9 (2)
PI regulator transfer function:
thirdly, maximum power resonance condition:
order to
Resonance frequency:
resonance capacitance:
fourthly, the relation between the resonance capacitance and the resonance frequency:
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