CN113422645B - Pulse width modulation system and method - Google Patents
Pulse width modulation system and method Download PDFInfo
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- CN113422645B CN113422645B CN202110869035.9A CN202110869035A CN113422645B CN 113422645 B CN113422645 B CN 113422645B CN 202110869035 A CN202110869035 A CN 202110869035A CN 113422645 B CN113422645 B CN 113422645B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/11—Arrangements specific to free-space transmission, i.e. transmission through air or vacuum
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/516—Details of coding or modulation
- H04B10/524—Pulse modulation
Abstract
The invention discloses a pulse width modulation system and a method, which belong to the technical field of communication and comprise a transmitting device, a receiving device, a Laser Diode (LD) and a photodiode array (PD); the emitting device drives the LD to emit pulse laser PWM signals, the PWM signals emitted by the LD are propagated through a channel, echo PWM signals are generated after the signals meet an object, and the PWM signals are received through the PD array and then are sent to the receiving device, so that laser communication is realized. The pulse width modulation system and the method solve the problems of poor anti-interference capability, high bit error rate and the like in the existing laser communication mode, and the Pulse Width Modulation (PWM) does not need to consider the problem of strict synchronization of clock signals of a transmitting system and a receiving system, so that data can be transmitted more conveniently in a clock-crossing way, the transmission rate can reach 10MB/S, the data modulation and demodulation processes are greatly simplified, the data transmission accuracy is increased, the transmission efficiency is improved, and the system and the method have a certain reference value for coding communication of military and civil laser radars.
Description
Technical Field
The invention belongs to the technical field of communication, and particularly relates to a pulse width modulation system and a pulse width modulation method.
Background
With the development of the information age, the research prospect of the space laser communication technology is very wide, and because the laser has high coherence and directivity, the laser communication has the advantages of strong anti-interference capability, good confidentiality, convenient band selection, large information capacity and the like, and compared with the traditional microwave communication, the laser communication does not need a huge butterfly antenna, so that the whole system can be small in size, light in weight and flexible and mobile. Modulation schemes currently in common use in laser communication include: on-off keying (OOK) modulation, pulse Position (PPM) modulation, pulse Interval Modulation (PIM), etc., wherein the OOK modulation has higher transmitting power and poor anti-interference capability, and higher bit error rate; PPM modulation reduces average power, but increases bandwidth, reducing data transmission speed; compared with the two modulation modes, the PIM modulation reduces the average symbol length, but the three modulation modes all need to be strictly synchronized by a transmitting system and a receiving system to ensure effective transmission of data, and meanwhile, the OOK modulation mode and the PPM modulation mode need to be added with check bits when data transmission is carried out, so that data coding is more complicated.
Disclosure of Invention
The invention provides a pulse width modulation system and a method, which solve the problems of poor anti-interference capability, high error rate and the like in the existing laser communication mode, and the Pulse Width Modulation (PWM) does not need to consider the problem of strict synchronization of clock signals of a transmitting system and a receiving system, so that data can be transmitted more conveniently in a clock-crossing way, the transmission rate can reach 10MB/S, the process of data modulation and demodulation is greatly simplified, the accuracy of data transmission is increased, the transmission efficiency is improved, and the system has a certain reference value for coding communication of military and civil laser radars.
The invention is realized by the following technical scheme:
a pulse width modulation system comprising a transmitting device 1, a receiving device 2, a Laser Diode (LD) 6 and a photodiode array (PD) 8; the transmitting device 1 drives the LD6 to transmit pulse laser PWM1 signals, the PWM1 signals transmitted by the LD6 are transmitted through a channel, echo PWM2 signals are generated after the signals meet an object 7, and the PWM2 signals are received through the PD array 8 and then are sent to the receiving device 2, so that laser communication is realized.
Preferably, the transmitting device 1 is composed of a first Microcontroller (MCU) 3, a first Field Programmable Gate Array (FPGA) 4, a laser driving circuit 5, and a Laser Diode (LD) 6; the first microcontroller 3 decodes the Data sources such as text, pictures and audio, and sends the decoded Data1 into the first FPGA4, and the sending signal TXD of the first FPGA4 triggers the laser driving circuit 5 to drive the LD6 to generate pulse laser.
Preferably, the receiving device 2 is composed of a laser receiving circuit 9, an ADC10, a second FPGA11, a second microcontroller 12 and an LCD display screen 13; the second FPGA11 sends out Con1 and Con2 signals to control row strobe and column strobe of the PD array 8 respectively, the PD in the PD array 8 is selected and then receives pulse light signals in channels, the laser receiving circuit 9 converts the light signals received by the PD array 8 into electric signals and then turns into RXD1 signals to be output, the ADC10 converts the electric signals RXD1 into digital values RXD2 and then sends the digital values RXD2 into the second FPGA11, the second FPGA11 demodulates the received RXD2 Data and sends the demodulated Data2 into the second Microcontroller (MCU) 12, the second Microcontroller (MCU) 12 encodes the Data2 Data to obtain text, picture, audio and other Data, and finally the Data are displayed on the LCD display 13.
Another object of the present invention is to provide a pulse width modulation method, which specifically includes the following steps:
step one:
the microcontroller modulates the received data through a PWM modulation module in the FPGA to generate corresponding pulse waves, a modulation signal (TXD) generated by the PWM modulation module is used for driving a grid driver of the laser emission circuit, and the grid driver drives an MOS tube and is used for controlling the conduction of the laser diode so as to realize pulse laser (PWM) output; when the PWM signal waveform is at a high level, the Laser Diode (LD) 6 emits light, and when the PWM signal waveform is at a low level, the Laser Diode (LD) 6 does not emit light, thereby converting the Data1 into an optical signal to be emitted;
step two:
receiving the optical signal sent in the first step and converting the optical signal into a voltage signal, specifically, when the optical signal irradiates the PD array, the PD generates a photocurrent I, a transimpedance amplifier (TIA) in the laser receiving circuit converts the photocurrent I generated by the PD into a voltage V1, and the voltage V1 is further amplified by a second-stage Amplifier (AMP) to obtain a voltage V2, namely:
so that the laser receiving circuit converts the optical signal into a voltage signal (RXD) to be output; wherein R is 1 R is the feedback resistance of a transimpedance amplifier (TIA) 2 R is the input resistance of a two-stage Amplifier (AMP) 3 A feedback resistor being a second-stage Amplifier (AMP);
step three: the ADC converts the voltage signal into digital quantity and sends the digital quantity into the FPGA, the FPGA demodulates the received RXD data, the demodulated data is sent into the microcontroller, the microcontroller encodes the data to obtain data such as text, pictures and audio, and finally the data are displayed on the LCD display screen.
Preferably, the first step is specifically as follows:
modulating Data1, wherein the Data1 is parallel Data, converting the parallel Data into serial Data in a Field Programmable Gate Array (FPGA), and judging whether each bit of the Data is Data1 or Data 0 bit by bit from the highest bit of the Data, wherein the field programmable gate array sends PWM signals according to the judging condition; if the data is 1, the FPGA sends out a pulse signal with a narrower pulse width, the pulse width is T1=25ns, and if the data is 0, the FPGA sends out a pulse with a wider pulse width, and the pulse width is T2=60deg.ns, so that the data is converted into PWM signals.
Preferably, the PWM signal has a frequency of 10MHz and a period t=100 ns.
Preferably, the third step is specifically as follows:
demodulating the received PWM signal, when the rising edge of the RXD signal is received, sampling by the ADC is started, sampling by the ADC is performed 6 times in each pulse period T, the sampling frequency is 60MHz, the sampling time interval is tau=16.67 ns, the pulse width corresponding to the data1 is narrower, and the pulse width time T1 meets the following conditions: τ < T1<2τ, the pulse width corresponding to data 0 is wider, and the pulse width time T2 satisfies: 3τ < T2<4τ; when the ADC samples to a high level H, the value of the counter in the FPGA is increased by one (count+1), when the ADC samples to a low level L, the counter in the FPGA stops counting, and the value (Count) of the counter is interpreted at the moment, namely the number of times the ADC samples to the high level, and the value (Count) of the counter is cleared when the rising edge of the next RXD1 signal arrives; the Data can be distinguished to be 1 or 0 by distinguishing the numerical value of the counter; namely:
compared with the prior art, the invention has the following advantages:
1. the FPGA realizes Pulse Width Modulation (PWM) to realize laser communication, improves the anti-interference capability in the data transmission process, and has the transmission rate of 10MB/S;
2. the sampling Pulse Width Modulation (PWM) does not need to consider the problem of strict synchronization of clock signals of a transmitting system and a receiving system, so that data transmission across clocks is more convenient;
3. the ADC is adopted to sample the data, so that the accuracy of data transmission can be ensured when the signal is demodulated, and the error rate is low.
Drawings
FIG. 1 is a system block diagram of a pulse width modulation system of the present invention;
in the figure: a transmitting device 1; a receiving device 2; a first Microcontroller (MCU) 3; a first transmitting end Field Programmable Gate Array (FPGA) 4; a laser driving circuit 5; a Laser Diode (LD) 6; an object 7; a receiving-end PD array 8; a laser receiving circuit 9; an ADC10; a second transmitting end field programmable gate array 11; a second microcontroller 12; an LCD display 13;
data1, transmitting end data; TXD, transmitting a modulated signal; PWM1 laser diode emits pulses; PWM2 echo pulse reflected by the object; RXD1, echo signal to be demodulated; RXD2, sampling signals by a receiving end ADC; con1, a receiving end FPGA controls signals of PD array row gating; con2, a receiving end FPGA controls signals of PD array column gating; data2, receiving end data;
FIG. 2 is a pulse modulation principle of a pulse width modulation method according to the present invention;
in the figure: DATA n the nth bit of the 8-bit DATA to be written;
FIG. 3 is a pulse transmitting modulation circuit of a pulse width modulation system according to the present invention;
in the figure: DATA [7:0]]Parallel data to be written (8 bits); TXD, transmitting a modulated signal; v (V) LD Bias voltage of laser diode; PWM, the laser diode emits the pulse signal;
FIG. 4 is a diagram illustrating a pulse signal receiving principle of a PWM system according to the present invention;
in the figure: PWM, pulse signal received by the PD array of the receiving end. S1, a receiving end PD array gates a switch of a first row; s2, a receiving end PD array gates a switch of a second row; s3, the PD array of the receiving end gates a switch of a third row; s4, a receiving end PD array gates a switch of a fourth row; s5, a receiving end PD array gates a switch of a fifth row; C1. the PD array of the receiving end gates the switch of the first column; C2. the PD array of the receiving end gates the switch of the second column; C3. the PD array of the receiving end gates the switch of the third column; C4. the PD array of the receiving end gates the switch of the fourth column; C5. the PD array of the receiving end gates the switch of the fifth column; RXD, converting the current signal into a voltage signal and then demodulating the voltage signal;
FIG. 5 is a pulse demodulation principle of a pulse width modulation method according to the present invention;
in the figure: the high duration of the pwm signal (representing a logic 1); the high duration of the pwm signal (representing a logic 0); tau. ADC sampling interval time; t, interval time for transmitting one bit of data; l. logic level low; H. logic level high; count, the number of times the receiving end ADC samples to the high level;
FIG. 6 is a pulse demodulation circuit of a PWM system according to the present invention;
in the figure: RXD, converting the current signal into a voltage signal and then demodulating the voltage signal; DATA [7:0]. Parallel DATA (8 bits) output after demodulation.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and embodiments, in order to make the objects, technical solutions and advantages of the present invention more apparent.
Example 1
As shown in fig. 1, the present embodiment provides a pulse width modulation system including a transmitting device 1, a receiving device 2, a Laser Diode (LD) 6, and a photodiode array (PD) 8; the transmitting device 1 drives the LD6 to transmit pulse laser PWM1 signals, the PWM1 signals transmitted by the LD6 are transmitted through a channel, echo PWM2 signals are generated after the signals meet an object 7, and the PWM2 signals are received through the PD array 8 and then are sent to the receiving device 2, so that laser communication is realized.
The transmitting device 1 consists of a first Microcontroller (MCU) 3, a first Field Programmable Gate Array (FPGA) 4, a laser driving circuit 5 and a Laser Diode (LD) 6; the first microcontroller 3 decodes the Data sources such as text, pictures and audio, and sends the decoded Data1 into the first FPGA4, and the sending signal TXD of the first FPGA4 triggers the laser driving circuit 5 to drive the LD6 to generate pulse laser.
The receiving device 2 consists of a laser receiving circuit 9, an ADC10, a second FPGA11, a second microcontroller 12 and an LCD display screen 13; the second FPGA11 sends out Con1 and Con2 signals to control row strobe and column strobe of the PD array 8 respectively, the PD in the PD array 8 is selected and then receives pulse light signals in channels, the laser receiving circuit 9 converts the light signals received by the PD array 8 into electric signals and then turns into RXD1 signals to be output, the ADC10 converts the electric signals RXD1 into digital values RXD2 and then sends the digital values RXD2 into the second FPGA11, the second FPGA11 demodulates the received RXD2 Data and sends the demodulated Data2 into the second Microcontroller (MCU) 12, the second Microcontroller (MCU) 12 encodes the Data2 Data to obtain text, picture, audio and other Data, and finally the Data are displayed on the LCD display 13.
Example 2
The embodiment provides a pulse width modulation method, which specifically comprises the following steps:
step one:
the Data1 (Data decoded by the MCU3 from a Data source such as text, picture, audio) is converted into an optical signal and sent out, and the Data1 is mainly modulated and the Laser Diode (LD) 6 is driven. Fig. 2 is a schematic block diagram of modulation. DATA [ n ]]For the nth bit of 8-bit data to be written, the nth bit data is judged to be data1 or data 0 in the FPGA through a discriminator, the frequency of PWM signals is 10MHz, and the period T=100ns, if the data is 1, the FPGA sends out a pulse signal with a narrower pulse width, the pulse width is t1=25 ns, and if the data is 0, the FPGA sends out a pulse with a wider pulse width, the pulse width is t2=60 ns, and the data corresponding to the PWM waveform in fig. 2 is 1001. Fig. 3 shows a pulse width emitting modulation circuit, which consists of a pulse generator (implemented in FPGA), a laser emitting circuit and an LD. FPGA is used as a main controller, and parallel DATA DATA [7:0]]The DATA in the FIFO is changed into serial DATA through a parallel-to-serial module in the FPGA, and the serial DATA DATA [7:0] is stored in the FIFO in the FPGA]Each bit of the laser emitting circuit is modulated by a PWM modulation module in the FPGA to generate corresponding pulse waves, a modulation signal (TXD) generated by the PWM modulation module drives a grid driver of the laser emitting circuit, and the grid driver drives a MOS tube to control the LD to be conducted so as to realize pulse laser (PWM) output, and V LD Is the bias voltage of the LD. When the PWM signal waveform is at a high level, the Laser Diode (LD) 6 emits light, and when the PWM signal waveform is at a low level, the Laser Diode (LD) 6 does not emit light, thereby converting the Data1 into an optical signal to be emitted.
Step two:
the optical signal sent in the first step is received and converted into a voltage signal, which is mainly implemented by a PD array and a laser receiving circuit, as shown in fig. 4, which is a schematic diagram of signal receiving, and the laser receiving circuit is composed of a transimpedance amplifier (TIA) and an operational amplifier. The drive control circuit is arranged inside the FPGA and comprises a scanning control module which is used for controlling a certain PD in the PD array to be conducted. When an optical signal irradiates the PD array, the PD generates a photocurrent I, a transimpedance amplifier (TIA) in the laser receiving circuit converts the photocurrent I generated by the PD into a voltage V1, and the voltage V1 is further amplified by a second-stage amplifier to obtain a voltage V2, namely:
transimpedance R in FIG. 4 1 =200kΩ, input resistor R 2 =100Ω, feedback resistor R 3 The second-order amplification is 2 times, so that the laser receiving circuit converts the optical signal into a voltage signal (RXD) output.
Step three:
and demodulating the voltage signal waveform in the second step. As shown in fig. 5, which is a demodulation principle of the pulse width signal, binary data received by a receiving end (RXD) is 1001, a pulse width T1 corresponding to data1 is narrower, τ < T1<2τ, a pulse width T2 corresponding to data 0 is wider, and 3τ < T2<4τ. The ADC starts sampling when the rising edge of the RXD signal arrives, the ADC samples 6 times in each pulse period T, the sampling time interval is tau, the counter value is increased by one (count+1) when the ADC samples to the high level H, the counter stops counting when the ADC samples to the low level L, the value (Count) of the counter is interpreted at the moment, namely the number of times the ADC samples to the high level, and the value (Count) of the counter is cleared when the rising edge of the next RXD signal arrives. The Data can be distinguished to be 1 or 0 by distinguishing the value of the counter. Namely:
fig. 6 shows a PWM demodulation circuit, which uses an FPGA as a main controller (inside the FPGA), and includes a clock synchronization module, an ADC sampling module, a bit detection module, a sampling counting module, a discriminator, and a serial-to-parallel module. After the receiving circuit converts the optical signal into the electric signal RXD, the RXD signal is clock synchronized by the clock synchronization module, the synchronized signal is sampled by the ADC at high speed, the sampling counting module counts the high level times sampled by the ADC, the discriminator discriminates whether the DATA is 1 or 0 according to the count value of the sampling counting module, the bit detection module acquires the bit of the received 8-bit DATA in a counting mode, and the serial-parallel converter converts the serial DATA into parallel DATA (DATA [7:0 ]) to be output.
The above steps mainly focus on the signal processing procedures of each stage in the system, and the preferred embodiments of the present invention are described in detail above with reference to the accompanying drawings, however, the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solutions of the present invention within the scope of the technical concept of the present invention, and all the simple modifications belong to the protection scope of the present invention.
In addition, the specific features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various possible combinations are not described further.
Moreover, any combination of the various embodiments of the invention can be made without departing from the spirit of the invention, which should also be considered as disclosed herein.
Claims (6)
1. A pulse width modulation system comprising a transmitting device (1), a receiving device (2), a laser diode LD (6) and a photodiode array PD (8); the emitting device (1) drives the LD (6) to emit pulse laser PWM1 signals, the PWM1 signals emitted by the LD (6) are propagated through a channel, echo PWM2 signals are generated after the signals meet an object (7), and the PWM2 signals are received through the photodiode array PD (8) and then are sent to the receiving device (2), so that laser communication is realized;
the receiving device (2) consists of a laser receiving circuit (9), an ADC (10), a second FPGA (11), a second microcontroller (12) and an LCD display screen (13); the second FPGA (11) sends Con1 and Con2 signals to control row gating and column gating of the PD array (8) respectively, the PDs in the PD array (8) are selected and then receive pulse light signals in channels, the laser receiving circuit (9) converts the light signals received by the PD array (8) into electric signals and then turns the electric signals into RXD1 signals to be output, the ADC (10) converts the electric signals RXD1 into digital RXD2 and then sends the digital quantities RXD2 into the second FPGA (11), the second FPGA (11) demodulates the received RXD2 Data and sends the demodulated Data2 into the second microcontroller MCU (12), the second microcontroller MCU (12) encodes the Data2 Data to obtain text, picture and audio Data, and finally the text, picture and audio Data are displayed on the LCD display screen (13).
2. A pulse width modulation system according to claim 1, characterized in that the transmitting means (1) consist of a first microcontroller MCU (3), a first field programmable gate array FPGA (4), a laser driving circuit (5) and a laser diode LD (6); the first microcontroller (3) decodes the text, picture and audio Data sources, the decoded Data1 is sent into the first FPGA (4), and a sending signal TXD of the first FPGA (4) triggers a laser driving circuit (5) to drive an LD (6) to generate pulse laser.
3. A method of modulating a pwm system according to claim 1, comprising the steps of:
step one:
the microcontroller modulates the received data through a PWM modulation module in the FPGA to generate corresponding pulse waves, a modulation signal TXD generated by the PWM modulation module is used for driving a grid driver of the laser emission circuit, and the grid driver drives an MOS tube and is used for controlling the conduction of the laser diode so as to realize pulse laser PWM output; when the PWM signal waveform is at a high level, the laser diode LD6 emits light, and when the PWM signal waveform is at a low level, the laser diode LD6 does not emit light, thereby converting the Data1 into an optical signal to emit;
step two:
receiving the optical signal sent in the first step and converting the optical signal into a voltage signal, specifically, when the optical signal irradiates the PD array, the PD generates a photocurrent I, the transimpedance amplifier TIA in the laser receiving circuit converts the photocurrent I generated by the PD into a voltage V1, and the second-stage amplifier AMP further amplifies the voltage V1 to obtain a voltage V2, namely:
so that the laser receiving circuit converts the optical signal into a voltage signal RXD for output; wherein R is 1 R is the feedback resistance of the transimpedance amplifier TIA 2 R is the input resistance of the two-stage amplifier AMP 3 A feedback resistor which is a second-stage amplifier AMP;
step three: the ADC converts the voltage signal into digital quantity and sends the digital quantity into the FPGA, the FPGA demodulates the received RXD data, the demodulated data is sent into the microcontroller, the microcontroller encodes the data to obtain text, picture and audio data, and finally the text, picture and audio data are displayed on the LCD display screen.
4. A method of modulating a pwm system according to claim 3, wherein step one is as follows:
modulating Data1, wherein the Data1 is parallel Data, converting the parallel Data into serial Data in a Field Programmable Gate Array (FPGA), and judging whether each bit of the Data is Data1 or Data 0 bit by bit from the highest bit of the Data, wherein the field programmable gate array sends PWM signals according to the judging condition; if the data is 1, the FPGA sends out a pulse signal with the pulse width of T1=25ns, and if the data is 0, the FPGA sends out a pulse with the pulse width of T2=60deg.ns, so that the data is converted into PWM signals.
5. The modulation method of a pulse width modulation system as claimed in claim 4, wherein the PWM signal has a frequency of 10MHz and a period t=100 ns.
6. A modulation method of a pulse width modulation system according to claim 3, wherein,
the third step is as follows:
demodulating the received PWM signal, when the rising edge of the RXD signal is received, sampling by the ADC is started, the ADC is sampled 6 times in each pulse period T, the sampling frequency is 60MHz, the sampling time interval is tau=16.67 ns, and the pulse width time T1 corresponding to the data1 meets the following conditions: τ < T1<2τ, and the pulse width time T2 corresponding to data 0 satisfies: 3τ < T2<4τ; when the ADC samples to a high level H, adding a count+1 to the value of the counter in the FPGA, and when the ADC samples to a low level L, stopping counting by the counter in the FPGA, judging the value Count of the counter at the moment, namely the number of times that the ADC samples to the high level, and resetting the value Count of the counter when the rising edge of the next RXD1 signal arrives; the Data can be distinguished to be 1 or 0 by distinguishing the numerical value of the counter; namely:
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