CN113410382B - Chromium-silicon film resistor and preparation method thereof - Google Patents
Chromium-silicon film resistor and preparation method thereof Download PDFInfo
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- CN113410382B CN113410382B CN202110662034.7A CN202110662034A CN113410382B CN 113410382 B CN113410382 B CN 113410382B CN 202110662034 A CN202110662034 A CN 202110662034A CN 113410382 B CN113410382 B CN 113410382B
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- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
- H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
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Abstract
The invention belongs to the technical field of thin film resistor preparation, and discloses a chromium-silicon thin film resistor and a preparation method thereof, wherein the preparation method comprises the following steps: depositing a silicon dioxide insulating layer on the substrate by using a chemical vapor deposition method; depositing a chromium-silicon resistance layer on the silicon dioxide insulating layer by using a physical vapor deposition method, and then depositing a titanium-tungsten layer; depositing a silicon dioxide layer on the titanium-tungsten layer by using a chemical vapor deposition method to serve as a hard mask; completing the preparation of a resistance pattern on the hard mask; etching the silicon dioxide layer to form a hard mask window; removing the titanium-tungsten layer of the hard mask window by using a strong oxidation solvent; carrying out dry pre-etching on the chromium silicon resistance layer; and corroding the chromium-silicon resistor layer by using a wet chemical corrosion method to obtain the chromium-silicon thin film resistor. The hard mask is used as an etching barrier layer, so that the corrosion problem of wet etching can be solved, the problem of nonlinear change of the wet etching rate is solved by using dry pre-etching, the width and the length of a resistor pattern can be effectively controlled, and the resistance precision is improved.
Description
Technical Field
The invention belongs to the technical field of thin film resistor preparation, and particularly relates to a chromium-silicon thin film resistor and a preparation method thereof.
Background
With the continuous progress and development of semiconductor integrated circuits, different diffusion resistors and injection resistors cannot meet the actual product requirements, and the requirements of high-precision thin film resistors on analog integrated circuits are further improved. Compared with diffusion and injection resistors, the metal film resistor has lower temperature coefficient, smaller parasitic parameter and wider range of sheet resistance value, and has higher resistance precision.
Currently, there is no mature and effective manufacturing method for the Cr-Si based resistor (Cr-Si) with a width of less than 10 μm in an analog integrated circuit.
Disclosure of Invention
The invention aims to provide a chromium-silicon thin film resistor and a preparation method thereof, and solves the problem that the chromium-silicon thin film resistor (Cr-Si) with the width of less than 10 mu m can not be prepared in the prior art.
The invention is realized by the following technical scheme:
a preparation method of a chromium-silicon film resistor comprises the following steps:
s1, depositing a silicon dioxide insulating layer on a substrate by using a chemical vapor deposition method;
s2, depositing a chromium-silicon resistor layer on the silicon dioxide insulating layer by using a physical vapor deposition method, and then depositing a titanium-tungsten layer;
s3, depositing a silicon dioxide layer on the titanium-tungsten layer by using a chemical vapor deposition method to serve as a hard mask;
s4, preparing a resistance graph on the hard mask;
s5, etching the silicon dioxide layer to form a hard mask window;
s6, removing the titanium-tungsten layer of the hard mask window by using a strong oxidation solvent;
s7, carrying out dry pre-etching on the chromium-silicon resistor layer;
and S8, corroding the chromium-silicon resistor layer by using a wet chemical corrosion method to obtain the chromium-silicon film resistor.
Further, after S8, performing post-processing on the chromium-silicon thin film resistor, specifically including the steps of:
(1) Removing the photoresist on the surface silicon dioxide insulating layer by a dry photoresist removing process;
(2) And (4) adopting wet organic cleaning to remove the residual photoresist and the polymer generated by dry pre-etching in S7.
Further, in S8, the solution used in the wet chemical etching method is a mixed solution of nitric acid, hydrofluoric acid, and water.
Further, the temperature of the strong oxidation solvent is 30 ℃ to 80 ℃.
Further, the thickness of the silicon dioxide insulating layer is 1 to 2 μm.
Further, the Cr-Si resistance layer has a thickness of
Further, the thickness of the titanium tungsten layer is
Further, the chemical vapor deposition method adopts a plasma chemical vapor deposition method, the radio frequency power is 300W-2000W, and the temperature is 350 ℃ to 500 ℃.
Further, the physical vapor deposition method specifically comprises the following steps: the power source adopts a direct current source, a medium frequency source or a radio frequency source, and the power is controlled to be 100-2000W.
The invention also discloses a chromium-silicon thin film resistor prepared by the preparation method of the public security particles, which comprises a substrate, a silicon dioxide insulating layer, a chromium-silicon resistor layer, a titanium-tungsten layer and a hard mask which are arranged from bottom to top; the width of the chromium-silicon film resistor is 5-8um.
Compared with the prior art, the invention has the following beneficial technical effects:
the invention discloses a preparation method of a chromium-silicon thin film resistor, which comprises the steps of firstly copying a hard mask pattern on a resistor layer by adopting a photoetching technology and a plasma etching technology, then etching the resistor pattern by using the hard mask as an etching barrier layer and using a dry pre-etching and wet etching method to form the thin film resistor with the width of less than 10 mu m; compared with the prior art, the etching method has the advantages that the etching barrier layer is made of the hard mask, so that the erosion problem of wet etching can be solved, the problem of nonlinear change of the wet etching rate can be solved by using dry pre-etching, the width and the length of a resistor pattern can be effectively controlled by the technology, and the resistor precision is improved.
Drawings
FIG. 1 is a flow chart of the method for manufacturing a chromium-silicon based thin film resistor according to the present invention.
FIG. 2 is a schematic structural diagram of a Cr-Si based thin film resistor according to the present invention.
Wherein, 1 is a substrate, 2 is a silicon dioxide insulating layer, 3 is a chromium silicon resistance layer, 4 is a titanium tungsten layer, and 5 is a hard mask.
Detailed Description
The present invention will now be described in further detail with reference to specific examples, which are intended to be illustrative, but not limiting, of the invention.
Example 1
The invention discloses a preparation method of a chromium-silicon film resistor, which comprises the following steps:
s1: a wafer silicon wafer is used as a substrate 1, and a silicon dioxide insulating layer 2 with the thickness of 1 mu m is deposited on the wafer by adopting a chemical vapor deposition process to form an insulating surface.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 300W, the temperature is 400 ℃, and the reaction gas adopts silane and N 2 O。
S2, depositing a chromium-silicon resistor layer 3 on the silicon dioxide insulating layer 2 by using a physical vapor deposition method, and then depositing a titanium-tungsten layer 4: adopting a direct current power source, controlling the power at 400W, adopting argon and nitrogen as gases, and depositing to obtain the film with the thickness of
Has a thickness of
A titanium tungsten layer 4.
Step S3: depositing a titanium tungsten film on the substrate to a thickness of
The silicon dioxide layer, which serves as a hard mask 5, is used as a masking layer for subsequent etching.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 300W, and the temperature is
The reaction gas adopts silane and N 2 O。
S4, completing the preparation of a resistance graph on the hard mask 5:
a layer of photoresist can be coated on the hard mask 5 by adopting a photoetching process of chip manufacturing, and the processes of exposure and development are carried out, so that a required pattern is left on the photoresist, and the width of the resistor is 8 mu m.
S5, etching the silicon dioxide layer to form a hard mask window:
a plasma dry etching process for manufacturing a bipolar circuit chip can be adopted to etch a pattern window on the hard mask 5, and the titanium tungsten layer 4 is stopped, so that no silicon dioxide residue is left on the titanium tungsten layer 4.
The parameters of the hard mask 5 etching process are as follows: the pressure in the process chamber is adjusted to 1500mT, the power of the radio frequency source is 600W, and CF4, CHF3 and Ar are adopted as etching process reaction gases.
Step S6: and (3) performing wet etching on the titanium-tungsten layer 4 of the hard mask window by using hydrogen peroxide at the temperature of 30 ℃, and stopping on the chromium-silicon layer to ensure that no titanium-tungsten residue exists on the chromium-silicon layer.
Step S7: and (3) carrying out dry pre-etching on the chromium-silicon resistor layer 3 by adopting a dry plasma etching process: the chromium-silicon resistor layer 3 and the titanium-tungsten layer 4 directly form a nitrogen oxide layer, and the nitrogen oxide layer on the chromium-silicon surface layer needs to be pretreated, so that the chromium-silicon resistor layer 3 can be subjected to wet chemical corrosion subsequently.
The parameters of the dry plasma etching process are as follows: the pressure in the process chamber is 1500mT, the power of the radio frequency source is 200W, and the reaction gases of the etching process adopt CF4 and Ar.
Step S8: and etching the chromium-silicon resistor layer 3 by using a mixed solution of nitric acid, hydrofluoric acid and water at 25 ℃ as a wet chemical etching solution to form the thin film resistor.
Step S9, post-processing: and removing the surface photoresist by a dry photoresist removing process, and removing the residual photoresist and the polymer generated by the dry process by adopting wet organic cleaning.
Example 2
The invention discloses a preparation method of a chromium-silicon film resistor, which comprises the following steps:
s1: a wafer silicon chip is used as a substrate 1, and a 2-micron silicon dioxide insulating layer 2 is deposited on the wafer by adopting a chemical vapor deposition process to form an insulating surface.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 2000W, the temperature is 500 ℃, and the reaction gas adopts silane and N 2 O。
S2, depositing a chromium-silicon resistor layer 3 on the silicon dioxide insulating layer 2 by using a physical vapor deposition method, and then depositing a titanium-tungsten layer 4: adopting a radio frequency source, controlling the power at 2000W, adopting argon and nitrogen as gases, and obtaining the thickness of
Of a thickness of
A titanium tungsten layer 4.
Step S3: depositing a titanium tungsten film on the substrate to a thickness of
The silicon dioxide layer, which serves as a hard mask 5, is used as a masking layer for subsequent etching.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 300W, the temperature is 400 ℃, and the reaction gas adopts silane and N 2 O。
S4, completing the preparation of a resistance graph on the hard mask 5:
a layer of photoresist can be coated on the hard mask 5 by adopting the photoetching process of chip manufacturing, and the processes of exposure and development are carried out, so that the required pattern is left on the photoresist, and the width of the resistor is 8 mu m.
S5, etching the silicon dioxide layer to form a hard mask window:
a dry etching process for manufacturing the bipolar circuit chip can be adopted, a pattern window is etched on the hard mask 5, the titanium-tungsten layer 4 is stopped, and no silicon dioxide residue is left on the titanium-tungsten layer 4.
The parameters of the hard mask 5 etching process are as follows: the pressure in the process cavity is 1500mT, the power of the radio frequency source is 600W, and CF4, CHF3 and Ar are adopted as etching reaction gases.
Step S6: and (3) performing wet etching on the titanium-tungsten layer 4 of the hard mask window by using 60 ℃ hydrogen peroxide, and stopping on the chromium-silicon layer to ensure that no titanium-tungsten residue exists on the chromium-silicon layer.
Step S7: carrying out dry pre-etching on the chromium-silicon resistor layer 3; the chromium-silicon resistor layer 3 and the titanium-tungsten layer 4 directly form a nitrogen oxide layer, and the nitrogen oxide layer on the chromium-silicon surface layer needs to be pretreated, so that the chromium-silicon resistor layer 3 can be subjected to wet chemical corrosion subsequently.
The parameters of the pretreatment process are as follows: the pressure in the process cavity is 1500mT, the power of the radio frequency source is 200W, and CF4 and Ar are adopted as etching reaction gases.
Step S8: and etching the chromium-silicon resistor layer 3 by using a mixed solution of nitric acid, hydrofluoric acid and water at 25 ℃ as a wet chemical etching solution to form the thin film resistor.
Step S9, post-processing: and removing the surface photoresist by a dry photoresist removing process, and removing the residual photoresist and the polymer generated by the dry process by adopting wet organic cleaning.
Example 3
The invention discloses a preparation method of a chromium-silicon film resistor, which comprises the following steps:
s1: a wafer silicon chip is used as a substrate 1, and a silicon dioxide insulating layer 2 with the thickness of 1.5 mu m is deposited on the wafer by adopting a chemical vapor deposition process to form an insulating surface.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 1000W, the temperature is 350 ℃, and the reaction gas adopts silane and N 2 O。
S2, depositing a chromium-silicon resistor layer 3 on the silicon dioxide insulating layer 2 by using a physical vapor deposition method, and then depositing a titanium-tungsten layer 4: adopting a direct current power source, controlling the power at 100W, adopting argon and nitrogen as gases, and depositing to obtain the film with the thickness of
Of a thickness of
A titanium tungsten layer 4.
Step S3: depositing a titanium tungsten film on the substrate to a thickness of
The silicon dioxide layer, which serves as a hard mask 5, is used as a masking layer for subsequent etching.
The parameters of the chemical vapor deposition process are as follows: the radio frequency power is 300W, the temperature is 400 ℃, and the reaction gas adopts silane and N 2 O。
S4, completing the preparation of a resistance graph on the hard mask 5:
a layer of photoresist is coated on the hard mask 5 by a photolithography process for chip fabrication, and exposure and development processes are performed to leave a desired pattern on the photoresist, with a resistance width of 5 μm.
S5, etching the silicon dioxide layer to form a hard mask window:
a plasma dry etching process for manufacturing the bipolar circuit chip can be adopted to etch a pattern window on the hard mask 5, and the titanium-tungsten layer 4 is stopped, so that no silicon dioxide residue is left on the titanium-tungsten layer 4.
The parameters of the hard mask 5 etching process are as follows: the pressure in the process chamber is 1500mT, the power of the radio frequency source is 600W, and CF4, CHF3 and Ar are used as reaction gases.
Step S6: and (3) performing wet etching on the titanium-tungsten layer 4 of the hard mask window by using hydrogen peroxide at the temperature of 80 ℃, and stopping on the chromium-silicon layer to ensure that no titanium-tungsten residue exists on the chromium-silicon layer.
Step S7: carrying out dry pre-etching on the chromium silicon resistance layer 3; the chromium-silicon resistor layer 3 and the titanium-tungsten layer 4 directly form a nitrogen oxide layer, and the nitrogen oxide layer on the chromium-silicon surface layer needs to be pretreated, so that the chromium-silicon resistor layer 3 can be subjected to wet chemical corrosion subsequently.
The parameters of the pretreatment process are as follows: the pressure in the process chamber is 1500mT, the power of the radio frequency source is 200W, and CF4 and Ar are used as reaction gases.
Step S8: and etching the chromium-silicon resistor layer 3 by using a mixed solution of nitric acid, hydrofluoric acid and water at 25 ℃ as a wet chemical etching solution to form the thin film resistor.
Step S9, post-processing: and removing the surface photoresist by a dry photoresist removing process, and removing the residual photoresist and the polymer generated by the dry process by adopting wet organic cleaning.
In summary, the hard mask 5 is patterned by dry etching, the excess titanium-tungsten layer 4 is removed by wet etching, the oxynitride layer on the surface of the chromium-silicon layer is removed by dry etching, and the chromium-silicon resistor layer 3 is patterned by wet etching to form the thin film resistor. Compared with the prior art, the chip manufacturing related technology is adopted, the control precision in the manufacturing process of the thin film resistor is improved, and the reliability of the thin film resistor is ensured.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
Claims (10)
1. A preparation method of a chromium-silicon film resistor is characterized by comprising the following steps:
s1, depositing a silicon dioxide insulating layer (2) on a substrate (1) by using a chemical vapor deposition method;
s2, depositing a chromium-silicon resistor layer (3) on the silicon dioxide insulating layer (2) by using a physical vapor deposition method, and then depositing a titanium-tungsten layer (4);
s3, depositing a silicon dioxide layer on the titanium tungsten layer (4) by using a chemical vapor deposition method to serve as a hard mask (5);
s4, preparing a resistance graph on the hard mask (5); the width of the resistor is 5-8um;
s5, etching the silicon dioxide layer to form a hard mask window;
s6, removing the titanium-tungsten layer (4) of the hard mask window by using a strong oxidation solvent;
s7, carrying out dry pre-etching on the chromium-silicon resistor layer (3);
and S8, corroding the chromium-silicon resistor layer (3) by using a wet chemical corrosion method to obtain the chromium-silicon film resistor.
2. The method for preparing the chromium-silicon thin film resistor as claimed in claim 1, wherein after S8, the chromium-silicon thin film resistor is subjected to post-treatment, and the method comprises the following steps:
(1) Removing the photoresist on the surface silicon dioxide insulating layer (2) by a dry photoresist removing process;
(2) And (4) adopting wet organic cleaning to remove the residual photoresist and the polymer generated by dry pre-etching in S7.
3. The method of claim 1, wherein the wet chemical etching process in step S8 uses a mixture of nitric acid, hydrofluoric acid, and water.
4. The method of claim 1, wherein the temperature of the strong oxidation solvent is 30-80 ℃.
5. A method for manufacturing a chromium-silicon based thin film resistor as claimed in claim 1, characterized in that the thickness of the silicon dioxide insulating layer (2) is 1-2 μm.
6. A method for manufacturing a chromium-silicon based thin film resistor according to claim 1, characterized in that the thickness of the chromium-silicon resistive layer (3) is from 50 a to 800 a.
7. A method of manufacturing a chromium-silicon based thin film resistor as claimed in claim 1, characterized in that the thickness of the titanium-tungsten layer (4) is from 1000 a to 3000 a.
8. The method of claim 1, wherein the chemical vapor deposition is plasma chemical vapor deposition, the RF power is 300W-2000W, and the temperature is 350 ℃ -500 ℃.
9. The method for preparing a chromium-silicon thin film resistor as claimed in claim 1, wherein the physical vapor deposition method comprises: the power source adopts a direct current source, a medium frequency source or a radio frequency source, and the power is controlled to be 100-2000W.
10. The chromium-silicon thin film resistor prepared by the preparation method of any one of claims 1 to 9 is characterized by comprising a substrate (1), a silicon dioxide insulating layer (2), a chromium-silicon resistor layer (3), a titanium-tungsten layer (4) and a hard mask (5) which are arranged from bottom to top; the width of the chromium-silicon film resistor is 5-8um.
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