CN113393883A - Data reading method and device of NAND flash memory and NAND flash memory system - Google Patents
Data reading method and device of NAND flash memory and NAND flash memory system Download PDFInfo
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- CN113393883A CN113393883A CN202110694978.2A CN202110694978A CN113393883A CN 113393883 A CN113393883 A CN 113393883A CN 202110694978 A CN202110694978 A CN 202110694978A CN 113393883 A CN113393883 A CN 113393883A
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- G11C16/00—Erasable programmable read-only memories
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- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
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- G11C—STATIC STORES
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Abstract
The invention provides a data reading method and device of a NAND flash memory and a NAND flash memory system, wherein the method comprises the following steps: carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage, and obtaining a first voltage state; when the hard decoding is unsuccessful, performing first soft decoding on a plurality of storage units in the NAND flash memory through a second preset voltage, and obtaining a second voltage state; when the first soft decoding is unsuccessful, determining the number of memory cells between a first voltage state and a second voltage state in a plurality of memory cells in the NAND flash memory according to the first voltage state and the second voltage state; determining a decoding level according to the number; selecting coarse grain decoding or fine grain decoding according to the decoding grade to perform secondary soft decoding on a plurality of storage units in the NAND flash memory; and if the second soft decoding is successful, the decoded data after the second soft decoding is the read data of the NAND flash memory. The invention improves the data reading performance of the flash memory NAND.
Description
Technical Field
The invention relates to the technical field of memories, in particular to a data reading method and device of a NAND flash memory and a NAND flash memory system.
Background
With the further increase of the storage demand of society, the use of NAND flash (NAND flash) solid state disk is becoming more and more popular, wherein especially the use demand of multi-level cell MLC, three-level cell TLC and four-level cell QLC increases, which brings a serious challenge to the reliability and performance of flash. The reading process of the NAND flash memory is divided into hard reading and soft reading, the hard reading is a necessary process for reading a page, only one induction voltage is applied to each area needing to be applied with the induction voltage, and if the hard reading fails, the soft reading is carried out, namely more voltages are gradually applied to each induction area to acquire more accurate information until the decoding is successful finally. Therefore, the more bits are stored in each unit, the higher the original error rate of the page is, and the higher the final decoding level is.
The data reading method in the prior art is generally two methods, the first method is a method of applying a soft induced voltage at a time, and the flow is as follows: and directly adding all the six soft sensing voltages after the hard reading fails, wherein the reading succeeds if the decoding succeeds, and the reading fails if the decoding fails. This method has a strong read decoding capability but also means a relatively long read delay. The second method is a flow chart of a method for applying induced voltage for multiple times, and the flow chart is shown in fig. 1: when the hard decoding fails, each area is added with 4 voltages on the basis of the hard reading induced voltage, and the decoding level is also increased by one level until the decoding is successful or the decoding level limit reaches seven times. This method is inflexible in that it is fixed to increase one level at a time.
Disclosure of Invention
The invention provides a data reading method and device of a NAND flash memory and a NAND flash memory system, and aims to solve the technical problems that in the prior art, the data reading process of the NAND flash memory is long in time delay and not flexible enough.
In one aspect, the present invention provides a data reading method for a NAND flash memory, including:
carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage, and obtaining a first voltage state;
when the hard decoding is unsuccessful, performing first soft decoding on a plurality of storage units in the NAND flash memory through a second preset voltage, and obtaining a second voltage state;
when the first soft decoding is unsuccessful, determining the number of storage units between the first voltage state and the second voltage state in a plurality of storage units in the NAND flash memory according to the first voltage state and the second voltage state;
determining a decoding level according to the number;
selecting coarse grain decoding or fine grain decoding according to the decoding grade to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
and if the second soft decoding is successful, the decoded data subjected to the second soft decoding is the read data of the NAND flash memory.
In a possible implementation manner of the present invention, the selecting coarse grain decoding or fine grain decoding according to the decoding level to perform the second soft decoding on the plurality of memory cells in the NAND flash memory includes:
if the decoding level is larger than 2, selecting the coarse grain decoding to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
and if the decoding level is equal to 2, selecting the fine-grained decoding to perform second-time soft decoding on the plurality of storage units in the NAND flash memory.
In a possible implementation manner of the present invention, the selecting the coarse-grained decoding to perform the second soft decoding on the plurality of memory cells in the NAND flash memory includes:
determining a third preset voltage group according to the decoding level, wherein the third preset voltage group comprises a plurality of third preset voltages with different voltage values;
sequentially applying the third preset voltages to the storage units to obtain first induction values of the storage units;
transmitting the first sensing values of the plurality of memory cells to a decoder;
and carrying out secondary soft decoding on the induction values of the plurality of storage units through the decoder.
In a possible implementation manner of the present invention, the selecting the fine grain decoding to perform the second soft decoding on the plurality of memory cells in the NAND flash memory includes:
determining a fourth preset voltage, and applying the fourth preset voltage to the plurality of storage units to obtain second induction values of the plurality of storage units;
transmitting the second sensing values of the plurality of memory cells to a decoder;
and carrying out secondary soft decoding on the second induction values of the plurality of storage units through the decoder. In a possible implementation manner of the present invention, the transmitting the first sensing values of the plurality of memory cells to the decoder specifically includes:
transmitting the first sensing value increment of the plurality of memory cells to a decoder;
the transmitting the second sensing values of the plurality of memory cells to the decoder specifically includes:
transmitting the second sensing value increment of the plurality of memory cells to a decoder.
In a possible implementation manner of the present invention, the first preset voltage, the second preset voltage, the third preset voltage, and the fourth preset voltage have different voltage values.
In one possible implementation of the invention, the maximum decoding level is 7.
In a possible implementation manner of the present invention, the memory cell is any one of a multi-level memory cell MLC, a three-level memory cell TLC, and a four-level memory cell QLC.
In another aspect, the present invention also provides a data reading apparatus of a NAND flash memory, including:
the NAND flash memory comprises a hard decoding unit, a first voltage state obtaining unit and a second voltage state obtaining unit, wherein the hard decoding unit is used for carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage and obtaining a first voltage state;
the first-time soft decoding unit is used for carrying out first-time soft decoding on the plurality of storage units in the NAND flash memory through a second preset voltage when the hard decoding is unsuccessful, and obtaining a second voltage state;
a number determining unit, configured to determine, according to the first voltage state and the second voltage state, the number of memory cells in the NAND flash memory between the first voltage state and the second voltage state when the first soft decoding is unsuccessful;
a decoding level determining unit for determining a decoding level according to the number;
the second soft decoding unit is used for selecting coarse grain decoding or fine grain decoding according to the decoding grade to perform second soft decoding on the plurality of storage units in the NAND flash memory;
and the read data determining unit is used for taking the decoded data subjected to the second soft decoding as the read data of the NAND flash memory when the second soft decoding is successful.
In another aspect, the present invention provides a NAND flash memory system, comprising:
a plurality of memory cells;
a memory controller connected to the plurality of memory cells, for implementing the data reading method of the NAND flash memory in any one of the above possible implementation manners;
and the host is connected to the memory controller and used for sending a data reading command and receiving reading data.
When the hard decoding is unsuccessful, the first soft decoding is carried out on the plurality of storage units through the second preset voltage, so that the overlong delay caused by applying a plurality of voltages at one time is avoided; when the first soft decoding is unsuccessful, the decoding levels of the storage units are determined by using the first voltage state and the second voltage state, and the coarse grain decoding or the fine grain decoding is selected according to the decoding levels to perform the second soft decoding on the plurality of storage units, so that the degree of freedom of the grain size in the decoding process is increased, and the flexibility of data reading is improved. And the fine grain decoding or the coarse grain decoding is selected, so that the induction decoding delay of the jumping process can be reduced, and unnecessary redundant induction decoding processes are reduced, so that the data reading delay is reduced, and the data reading performance of the NAND flash memory is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of one embodiment of a data reading method of a NAND flash memory in the prior art;
FIG. 2 is a flowchart illustrating an embodiment of a data reading method for a NAND flash memory according to the present invention;
FIG. 3 is a flowchart illustrating an embodiment of S205 in an embodiment of the present invention;
FIG. 4 is a flowchart illustrating an embodiment of S301 according to the present invention;
FIG. 5 is a schematic diagram of one embodiment of coarse grain decoding provided by embodiments of the present invention;
FIG. 6 is a flowchart illustrating an embodiment of S302 according to the present invention;
FIG. 7 is a schematic diagram of an embodiment of fine-grain decoding provided by an embodiment of the present invention;
FIG. 8 is a structural diagram of an embodiment of a data reading apparatus for a NAND flash according to the present invention;
FIG. 9 is a block diagram of an embodiment of a NAND flash memory system according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The invention provides a data reading method and device of a NAND flash memory and a NAND flash memory system, which are respectively explained below.
As shown in fig. 2, a flow chart of an embodiment of a data reading method for a NAND flash memory according to the present invention is shown, and the method includes:
s201, carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage, and obtaining a first voltage state;
s202, when the hard decoding is unsuccessful, performing first soft decoding on a plurality of storage units in the NAND flash memory through a second preset voltage, and obtaining a second voltage state;
when the hard decoding is successful, the decoded data after the hard decoding is read data of the NAND flash memory.
S203, when the first soft decoding is unsuccessful, determining the number of storage units between a first voltage state and a second voltage state in a plurality of storage units in the NAND flash memory according to the first voltage state and the second voltage state;
when the first soft decoding is successful, the decoded data after the first soft decoding is read data of the NAND flash memory.
S204, determining decoding levels according to the number;
specifically, the method comprises the following steps: the corresponding relation between the number and the decoding level is different according to different NAND flash memories, and can be adjusted according to practical application, but the requirements are as follows: the larger the number, the higher the decoding level.
It should be noted that: the maximum decoding level is 7.
S205, selecting coarse grain decoding or fine grain decoding according to the decoding level to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
and S206, if the second soft decoding is successful, the decoded data after the second soft decoding is read data of the NAND flash memory.
The NAND flash memory in the embodiment of the present invention may be applied to a memory Card, a usb disk, a solid state disk, an Embedded multimedia controller (EMMC), and other large-capacity devices.
According to the data reading method of the NAND flash memory, when the hard decoding is unsuccessful, the first soft decoding is carried out on the plurality of storage units through the second preset voltage, and the phenomenon that the time delay is too long due to the fact that a plurality of voltages are applied at one time is avoided; when the first soft decoding is unsuccessful, the decoding levels of the storage units are determined by using the first voltage state and the second voltage state, and the coarse grain decoding or the fine grain decoding is selected according to the decoding levels to perform the second soft decoding on the plurality of storage units, so that the degree of freedom of the grain size in the decoding process is increased, and the flexibility of data reading is improved. And the sensing decoding delay of the jumping process can be reduced by selecting the fine grain decoding or the coarse grain decoding, and unnecessary redundant sensing decoding processes are reduced, so that the data reading delay is reduced, and the reading performance of the NAND flash memory is improved.
Further, in some embodiments of the present invention, as shown in fig. 3, S205 includes:
s301, if the decoding level is larger than 2, selecting coarse-grained decoding to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
s302, if the decoding level is equal to 2, selecting fine-grained decoding to perform second soft decoding on a plurality of storage units in the NAND flash memory.
Further, in some embodiments of the present invention, as shown in fig. 3, S301 includes:
s401, determining a third preset voltage group according to the decoding level, wherein the third preset voltage group comprises a plurality of third preset voltages with different voltage values;
s402, sequentially applying a plurality of third preset voltages to a plurality of storage units to obtain first induction values of the plurality of storage units;
s403, transmitting the first induction values of the plurality of storage units to a decoder;
and S404, carrying out secondary soft decoding on the induction values of the plurality of storage units through a decoder.
By carrying out coarse-grained decoding on the storage units, the method can quickly jump to the decoding level which is needed by the storage units, reduces the induction delay in the jumping process, and meanwhile, the steps are transmitted after the first induction values of the storage units are induced, so that unnecessary redundant induction processes are reduced, the data reading delay is reduced, and the reading performance of the NAND flash memory is improved.
Specifically, as shown in fig. 5, when the decoding level is 3, the third preset voltage group includes eight third preset voltages having different resistance values, and the eight third preset voltages are sequentially applied to the plurality of memory cells to obtain first sensing values of the plurality of memory cells, and the decoder performs second soft decoding on the first sensing values.
It should be noted that: in order to further improve the success rate and reliability of NAND flash data reading, in some embodiments of the present invention, when the second soft decoding is unsuccessful after S304 is executed, the memory cell should be subjected to third soft decoding by fine-grain decoding until the decoding level of the fine-grain decoding is equal to the maximum decoding level.
Further, in some embodiments of the present invention, as shown in fig. 6, S302 includes:
s601, determining a fourth preset voltage, and applying the fourth preset voltage to the plurality of storage units to obtain second induction values of the plurality of storage units;
s602, transmitting the second induction values of the plurality of storage units to a decoder;
and S603, carrying out secondary soft decoding on the second induction values of the plurality of storage units through a decoder.
By fine-grained decoding of the storage unit, the data reading delay of the NAND flash memory unit can be reduced.
It should be noted that: in order to further improve the success rate and reliability of NAND flash data reading, in some embodiments of the present invention, when the second soft decoding is unsuccessful after S403 is performed, a fifth preset voltage should be applied to the plurality of memory cells, and the fine grain decoding should be performed on the plurality of memory cells again, until the decoding level of the fine grain decoding is equal to the maximum decoding level.
Specifically, as shown in fig. 7, it can be seen that: the fine-grained decoding is carried out for 4 times from the decoding level 1 to the decoding level 2, and the 4 times of fine-grained decoding has certain probability of successful decoding, so that the technical effects of successful decoding in advance and shortening of data reading delay can be realized.
Further, in some embodiments of the present invention, S403 specifically is:
transmitting the first sensing value increment of the plurality of memory cells to a decoder;
wherein, S602 specifically is:
and transmitting the second sensing value increment of the plurality of storage units to a decoder.
By setting the transmission mode of transmitting the first induction value and the second induction value to the decoder to be incremental transmission, the transmission time of transmitting the first induction value and the second induction value to the decoder can be reduced, and the data reading time delay of the NAND flash memory is further reduced.
Further, the voltage values of the first preset voltage, the second preset voltage, the third preset voltage and the fourth preset voltage are different.
Further, in some embodiments of the present invention, a difference between a voltage value of the currently applied preset voltage and a voltage value of the last applied preset voltage is equal to a difference between a voltage value of the last applied preset voltage and a voltage value of the last applied preset voltage.
Further, the memory cell is any one of a multi-level memory cell MLC, a three-level memory cell TLC, or a four-level memory cell QLC.
On the other hand, in order to better implement the data reading method of the NAND flash memory in the embodiment of the present invention, on the basis of the data reading method of the NAND flash memory, correspondingly, as shown in fig. 8, the embodiment of the present invention further provides a data reading apparatus of the NAND flash memory, where the data reading apparatus 500 of the NAND flash memory includes:
a hard decoding unit 801, configured to perform hard decoding on a plurality of memory cells in the NAND flash memory by using a first preset voltage, and obtain a first voltage state;
a first soft decoding unit 802, configured to perform first soft decoding on the plurality of memory cells in the NAND flash memory through a second preset voltage and obtain a second voltage state when the hard decoding is unsuccessful;
a number determining unit 803, configured to determine, when the first soft decoding is unsuccessful, a number of memory cells in the NAND flash memory between the first voltage state and the second voltage state according to the first voltage state and the second voltage state;
a decoding level determining unit 804 configured to determine a decoding level according to the number;
a second soft decoding unit 805, configured to select coarse grain decoding or fine grain decoding according to the decoding level to perform second soft decoding on the plurality of memory units in the NAND flash memory;
and a read data determining unit 806, configured to use the decoded data after the second soft decoding as read data of the NAND flash memory when the second soft decoding is successful.
In another aspect, an embodiment of the present invention further provides a NAND flash memory system, as shown in fig. 9, the NAND flash memory system includes:
a plurality of memory cells 901;
a memory controller 902 connected to the plurality of memory units 901, for implementing the data reading method of the NAND flash memory described in any of the embodiments of the present invention;
the host 903 is connected to the memory controller 902 and is used for issuing data read commands and receiving read data.
The method and the device for reading data of the NAND flash memory and the NAND flash memory system provided by the invention are described in detail, and the principles and the embodiments of the invention are explained in the text by applying specific examples, and the description of the embodiments is only used for helping to understand the method and the core idea of the invention; meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A data reading method of a NAND flash memory is characterized by comprising the following steps:
carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage, and obtaining a first voltage state;
when the hard decoding is unsuccessful, performing first soft decoding on a plurality of storage units in the NAND flash memory through a second preset voltage, and obtaining a second voltage state;
when the first soft decoding is unsuccessful, determining the number of storage units between the first voltage state and the second voltage state in a plurality of storage units in the NAND flash memory according to the first voltage state and the second voltage state;
determining a decoding level according to the number;
selecting coarse grain decoding or fine grain decoding according to the decoding grade to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
and if the second soft decoding is successful, the decoded data subjected to the second soft decoding is the read data of the NAND flash memory.
2. The method as claimed in claim 1, wherein the selecting coarse grain decoding or fine grain decoding according to the decoding level to perform the second soft decoding on the plurality of memory cells in the NAND flash memory comprises:
if the decoding level is larger than 2, selecting the coarse grain decoding to perform secondary soft decoding on a plurality of storage units in the NAND flash memory;
and if the decoding level is equal to 2, selecting the fine-grained decoding to perform second-time soft decoding on the plurality of storage units in the NAND flash memory.
3. The method as claimed in claim 2, wherein the selecting the coarse-grained decoding to perform the second soft decoding on the plurality of memory cells in the NAND flash memory comprises:
determining a third preset voltage group according to the decoding level, wherein the third preset voltage group comprises a plurality of third preset voltages with different voltage values;
sequentially applying the third preset voltages to the storage units to obtain first induction values of the storage units;
transmitting the first sensing values of the plurality of memory cells to a decoder;
and carrying out secondary soft decoding on the induction values of the plurality of storage units through the decoder.
4. The method as claimed in claim 3, wherein the selecting the fine grain decoding to perform the second soft decoding on the plurality of memory cells in the NAND flash memory comprises:
determining a fourth preset voltage, and applying the fourth preset voltage to the plurality of storage units to obtain second induction values of the plurality of storage units;
transmitting the second sensing values of the plurality of memory cells to a decoder;
and carrying out secondary soft decoding on the second induction values of the plurality of storage units through the decoder.
5. The method as claimed in claim 4, wherein the transmitting the first sensing values of the plurality of memory cells to the decoder comprises:
transmitting the first sensing value increment of the plurality of memory cells to a decoder;
the transmitting the second sensing values of the plurality of memory cells to the decoder specifically includes:
transmitting the second sensing value increment of the plurality of memory cells to a decoder.
6. The method of claim 4, wherein the first preset voltage, the second preset voltage, the third preset voltage and the fourth preset voltage have different voltage values.
7. The method of claim 1, wherein the maximum decoding level is 7.
8. The method as claimed in claim 1, wherein the memory cell is any one of a multi-level cell MLC, a three-level cell TLC and a four-level cell QLC.
9. A data reading apparatus of a NAND flash memory, comprising:
the NAND flash memory comprises a hard decoding unit, a first voltage state obtaining unit and a second voltage state obtaining unit, wherein the hard decoding unit is used for carrying out hard decoding on a plurality of memory cells in the NAND flash memory through a first preset voltage and obtaining a first voltage state;
the first-time soft decoding unit is used for carrying out first-time soft decoding on the plurality of storage units in the NAND flash memory through a second preset voltage when the hard decoding is unsuccessful, and obtaining a second voltage state;
a number determining unit, configured to determine, according to the first voltage state and the second voltage state, the number of memory cells in the NAND flash memory between the first voltage state and the second voltage state when the first soft decoding is unsuccessful;
a decoding level determining unit for determining a decoding level according to the number;
the second soft decoding unit is used for selecting coarse grain decoding or fine grain decoding according to the decoding grade to perform second soft decoding on the plurality of storage units in the NAND flash memory;
and the read data determining unit is used for taking the decoded data subjected to the second soft decoding as the read data of the NAND flash memory when the second soft decoding is successful.
10. A NAND flash memory system, comprising:
a plurality of memory cells;
a memory controller connected to the plurality of memory cells for implementing the data reading method of the NAND flash memory of any one of claims 1 to 8;
and the host is connected to the memory controller and used for sending a data reading command and receiving reading data.
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Application publication date: 20210914 |