CN113326008A - Chip verification method, imaging chip and imaging box - Google Patents
Chip verification method, imaging chip and imaging box Download PDFInfo
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- CN113326008A CN113326008A CN202010130933.8A CN202010130933A CN113326008A CN 113326008 A CN113326008 A CN 113326008A CN 202010130933 A CN202010130933 A CN 202010130933A CN 113326008 A CN113326008 A CN 113326008A
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/12—Digital output to print unit, e.g. line printer, chain printer
- G06F3/1201—Dedicated interfaces to print systems
- G06F3/1202—Dedicated interfaces to print systems specifically adapted to achieve a particular effect
- G06F3/1218—Reducing or saving of used resources, e.g. avoiding waste of consumables or improving usage of hardware resources
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/12—Digital output to print unit, e.g. line printer, chain printer
- G06F3/1201—Dedicated interfaces to print systems
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Abstract
The invention relates to a chip verification method, an imaging chip and an imaging box, wherein the chip verification method comprises the following steps: receiving first communication data and sending the first communication data to a first processing unit and a second processing unit; receiving second communication data obtained by the first processing unit and/or the second processing unit according to the first communication data; and acquiring available data in the second communication data to generate verification data for verification. The chip verification method and the imaging chip enable the imaging chip to be continuously utilized through the integration unit and the second processing unit which are matched with the first processing unit respectively, and as at least part of data stored in the first processing unit can be verified all the time, the second processing unit and the integration unit are used for sorting the part of data to achieve verification passing. In addition, the imaging chip and the chip verification method both utilize the first processing unit for identity verification, so that the imaging chip has higher verification passing efficiency and stability.
Description
Technical Field
The invention relates to the technical field of imaging, in particular to a chip verification method, an imaging chip and an imaging box comprising the imaging chip.
Background
With the development of image forming technology, image forming apparatuses such as copiers, printers, facsimile machines, and multifunction word processors have been widely used in offices, homes, and the like. An image forming apparatus is generally provided with an image forming cartridge (such as an ink cartridge, a toner cartridge, etc.), and consumables such as an image forming material (ink, toner, etc.) and an image forming chip (packet data storage, such as an IC) are placed in the image forming cartridge. The imaging cartridge, imaging material and imaging chip may all be replaceable. Wherein the imaging chip stores data related to the imaging cartridge, such as: an image forming cartridge manufacturer code, a production date, a model, a characteristic parameter, the number of image forming pages, recording material remaining amount information, a serial number, and the like.
If the imaging material stored in the imaging box can be normally used by the imaging device, the imaging chip is usually required to be verified and passed by a main board in the imaging device, so that information interaction between the main board and the imaging chip is realized. It is therefore necessary to identify the cartridge information such as the manufacturer code, model number, characteristic parameters, number of sheets to be imaged, and remaining amount of recording material stored in the data storage device when mounting the imaging chip. The number of imaging sheets in the imaging chip and the remaining amount of recording material in the imaging cartridge indicate the life in the imaging cartridge, and the imaging chip cannot be used any more after the display of data representing the life of the imaging chip has ended. The imaging cartridge mounted with the imaging chip cannot be used continuously and must be replaced, thereby causing unnecessary waste.
In the prior art, a technology of resetting and reusing data representing service life in an imaging chip has appeared, but not all imaging chips can operate in this way, because rules about data change of developer amount are preset in the imaging chip, the data change of the developer amount is prohibited to be an initial value or is changed to be data closer to the initial value, and once the internal regulation of the imaging chip is violated, the imaging chip is automatically locked or self-destructed, and the imaging chip cannot be used.
Disclosure of Invention
In order to enable the imaging chip to be recycled without being influenced by the internal setting of the imaging chip, the invention provides an imaging chip verification method, an imaging chip and an imaging box comprising the imaging chip, wherein the imaging chip on the imaging box can adopt the verification method.
A chip verification method comprises the following steps:
the first processing unit and the second processing unit respectively receive first communication data;
receiving second communication data and/or third communication data obtained by the first processing unit and/or the second processing unit according to the first communication data;
the integration unit generates verification data according to the second communication data and/or the third communication data for verification;
wherein the second communication data and the third communication data are at least partially different.
Preferably, the step of the integration unit generating verification data from the second communication data and/or the third communication data for verification comprises the sub-steps of: judging whether the second communication data has unavailable data or not;
if yes, integrating the second communication data into verification data for verification;
otherwise, the second communication data is used as verification data for verification.
Preferably, said second communication data comprises identity data and/or other data of the chip.
Preferably, the further data comprises further data from the second processing unit and/or further data from the first processing unit.
Preferably, the other data from the first processing unit is unavailable data.
Preferably, the process of generating verification data for verification according to the second communication data includes the following steps:
analyzing the second communication data to obtain identity data and/or other data;
and generating first verification data according to the identity data for verification, and/or integrating the first verification data according to other data to generate second verification data for verification.
Preferably, the process of receiving the second communication data obtained by the first processing unit and/or the second processing unit according to the first communication data further includes the following steps:
the first processing unit analyzes the first communication data and calculates to obtain first data;
the second processing unit analyzes the first communication data to obtain second data or does not respond to the first communication data;
wherein the second communication data comprises first data and/or second data.
The invention also provides an imaging chip, which comprises a first processing unit, a second processing unit and an integration unit, wherein the first processing unit and the second processing unit are respectively connected in parallel to the integration unit;
the first processing unit and the second processing unit respectively receive first communication data;
the first processing unit and/or the second processing unit generate second communication data and third communication data, and respectively send the second communication data and the third communication data to the integration unit;
the integration unit verifies the verification data obtained by the second communication data and the third communication data;
wherein the second communication data and the third communication data are different from each other.
Preferably, the first processing unit and the second processing unit are respectively connected in parallel to the integration unit.
The invention also provides an imaging box, which comprises a box body and an imaging chip, wherein the imaging chip is arranged on the box body; the verification method of the imaging chip is the verification method described above; or the imaging chip is the imaging chip.
The invention has the beneficial effects that:
compared with the prior art, the chip verification method and the imaging chip can ensure that the imaging chip can be continuously utilized through the integration unit and the second processing unit which are matched with the first processing unit respectively, because at least part of data stored in the first processing unit can be verified all the time, when other data needs to be verified, the data in the first processing unit cannot be verified, and the other data is not encrypted or changed according to a known rule, the verification passing can be realized through the second processing unit and the integration unit which are used for sorting the part of data, and the imaging chip can be verified without modifying any data in the first processing unit. Therefore, whether other data in the data of the original chip can be changed or reset or not, the verification can be realized by adopting the chip verification method or the imaging chip. In addition, the imaging chip and the chip verification method both utilize the first processing unit for identity verification, so that the imaging chip has higher verification passing efficiency and stability.
According to the invention, the first processing unit and the second processing unit respectively respond to the first communication data and generate the second communication data, and then after the integration unit is utilized to properly integrate the second communication data, the imaging chip can always pass verification, so that the speed and stability of chip verification are improved.
In addition, the imaging box containing the imaging chip or the chip installed in the imaging box adopts the verification method, so that the imaging chip of the imaging box can be recycled, and the imaging box can also be recycled.
Drawings
FIG. 1 is a block diagram of an imaging chip circuit according to a preferred embodiment of the present invention;
FIG. 2 is a circuit diagram of an imaging chip according to another preferred embodiment of the present invention.
FIG. 3 is a flow chart of a method for verifying an imaging chip according to a preferred embodiment of the invention.
Detailed Description
The invention will be further described with reference to the accompanying drawings and the detailed description below:
referring to fig. 1, the present embodiment relates to an imaging chip including a first processing unit 1, a second processing unit 2, and an integration unit 3, wherein the first processing unit 1 and the second processing unit 2 are respectively connected in parallel to the integration unit 3. The integration unit is at least connected to the data lines of the first processing unit and the second processing unit. The first communication data and the second communication data may both be transmitted over the data line. Referring to fig. 1, the integration unit is connected to all communication lines of the first and second processing units, and in fig. 2, the integration unit is connected to only data lines of the first and second processing units. Of course, the first processing unit and the second processing unit may further include three or more data lines, for example, at least one of a data line, a clock line, a power line, and a ground line.
Preferably, the first processing unit 1 may be an original chip. Preferably, the second processing unit 2 may be an original chip that cannot be used alone, for example, an old chip whose service life is over, or an over-season chip whose service life is over a predetermined period of time, or the like. The original chip can be a chip generated by an original manufacturer, such as an original manufacturer of samsung, hewlett packard, and running chart. The second processing unit 2 may be of the STM8 family, the STM32 family, etc. or other similar chip (e.g., some custom chip) that can store and process data. The integrated unit 3 may also be of the STM8 series, STM32 series, etc. or other similar chips. According to the invention, the first processing unit 1 can be repeatedly utilized through the integration unit 3 and the second processing unit 2, and data in the first processing unit 1 does not need to be modified, so that the generation cost is reduced, and unnecessary waste can be avoided.
The first processing unit 1 and the second processing unit 2 receive first communication data, respectively. The first communication data may be a verification command for verifying the identity, lifetime, or other information of the imaging chip. The first processing unit 1 and the second processing unit 2 can both receive the first communication data.
The first processing unit 1 generates second communication data, the second processing unit 2 generates third communication data, and the second communication data and the third communication data are respectively sent to the integration unit 3. The second communication data generated by the first processing unit 1 at least comprises: identity data corresponding to the chip identity information and other data corresponding to the other information. The other data may include lifetime data related to chip lifetime information. The identity data may include a serial number, version number, etc. The life data includes one or more of a developer amount, a number of printing times, a first use time, a developer remaining amount, and the like. The first processing unit 1 may be responsive to the first communication data and generate first data (some or all of which may be the first communication data) to be sent to the integrating unit 3. The second processing unit 2 does not always respond to the first communication data, for example, when the first communication data only contains an authentication command for authentication, the second processing unit 2 does not respond to the first communication data or the second cell pit may not generate the third communication data. Wherein the second communication data and the third communication data may be different.
The integration unit 3 is connected to at least the data output of the first processing unit 1 and the data output of the second processing unit 2. The integration unit may receive the second communication data and the third communication data. The integration unit 3 may process the second communication data and the third communication data to obtain verification data for verification. When the second communication data includes the unavailable data, the unavailable data needs to be modified or adjusted, so that the modified or adjusted data becomes the available data, and the data in the integration unit 3 can be used as the verification data to respond to the first communication data, thereby completing the verification. The description of the usable data and the unusable data may refer to the description in the following verification method.
As a preferred embodiment, referring to fig. 1, the integration unit 3 is connected to both the data input terminal of the first processing unit and/or the data input terminal of the second processing unit. After receiving the first communication data, the integration unit 3 sends the first communication data to the first processing unit and the second processing unit. In this embodiment, the integration unit 3 may only forward the first communication data, or the integration unit 3 is a part of a channel through which the first communication data is sent to the first processing unit 1 and the second processing unit 2. The integration unit may be connected to the data input terminal of the first processing unit 1, for example, when the data output and data input terminals of the first and second processing units are connected to the external device in a single bus manner, or when the following condition is established. When said condition is fulfilled, said integration unit may be connected to a data input of the second processing unit 2. When the first condition and the second condition are both satisfied, the integration unit is respectively connected with the data input end of the first processing unit 1 and the data input end of the second processing unit 2. But there may be processing for the second communication data before responding to the first communication data.
As another preferred embodiment, referring to fig. 2, the first communication data does not pass through the integration unit 3. For example, when the integration unit is connected only to the data output terminals of the first processing unit and the second processing unit, but not to the data input/output terminals of the first processing unit and the second processing unit.
If the first communication data includes a verification instruction for verifying the lifetime of the chip, both the first processing unit 1 and the second processing unit 2 respond. If the first communication data only includes a verification instruction of the chip identity, the first processing unit 1 is usually only required to respond, and particularly, when the verification instruction of the chip identity with an encryption algorithm is involved, the first processing unit 1 is required to respond. Since the first processing chip can be an original chip, the verification instruction of the chip identity can be passed through by the first processing unit 1 in response.
The following describes a verification method of an imaging chip, by taking as an example that the imaging chip communicates with an imaging device after the imaging chip is mounted to the imaging device:
the chip verification method in the embodiment comprises the following steps:
step S1', the integrating unit receives the first communication data and sends the first communication data to the first processing unit 1 and/or the second processing unit 2. The first communication data may be a verification instruction issued by the imaging device (for example, may be at least one of an authentication instruction for verifying the chip identity information or a lifetime verification instruction for verifying the chip lifetime information).
When the integration unit is not connected to the input terminals of the first processing unit and the second processing unit, the step S1' can be omitted. The case of performing step S1' may be: the condition one is as follows: when the input end and the output end of the first processing unit are the same terminal, the condition two is as follows: when the input end and the output end of the second processing unit are the same terminal. When the condition is satisfied, the first communication data received by the integration unit is sent to the first processing unit 1. When the condition is established, the first communication data received by the integration unit is sent to the second processing unit 2. When the first condition and the second condition are both satisfied, the first communication data received by the integration unit is sent to the first processing unit 1 and the second processing unit 2.
In step S1, the first processing unit 1 and the second processing unit 2 receive the first communication data, respectively. Or the first communication data may be sent to both the first processing unit 1 and the second processing unit 2.
Step S2, receiving the second communication data obtained by the first processing unit 1 according to the first communication data and/or the third communication data obtained by the second processing unit 2 according to the first communication data. Typically the second processing unit 2 may respond to other instructions in the first communication data than the authentication instruction. If the first communication data only contains an identity verification instruction, the identity verification instruction is used for verifying whether a serial number, a commodity name or an encryption key and the like stored in a chip are matched with the imaging equipment or not. The verification may now be done using only the second communication data of the first processing unit 1, at which time the second processing unit may not respond. For example, the authentication instruction may be a serial number authentication instruction, and at this time, the first processing module may send the serial number stored therein and data (second communication data) such as an encryption algorithm or a key associated with the serial number to the integrating unit 3, and the integrating unit 3 may send the second communication data to the imaging device for authentication. If the first communication data does not include the authentication instruction but only includes other instructions, the authentication may be completed only by using the third communication data of the second processing unit 2, but the first processing unit still generates the second communication data in response.
A process of the second process unit 2 generating third communication data, the second process unit 2 storing therein data other than the identification data, such as one or more of the data of the developer amount, the number of prints, the time of first use, the remaining amount of developer, and the like. If the first communication data includes a life verification instruction, the life verification instruction verifies whether the remaining amount of the developer stored in the chip is within a permissible range. For example, whether or not the remaining amount of the developer has become less than 3% of the total developer amount, at which time the second process unit 2 acquires the remaining data of the developer stored inside the container, for example, the remaining amount of the developer is 80% (available data), and takes the remaining data of the developer as the second communication data. When the remaining amount of the developer is verified, the second communication data generated by the first process unit 1 also includes the remaining amount of the developer, but the remaining amount of the developer is less than 3%, for example, the remaining amount of the developer is 1% (unusable data).
The process of receiving the second communication data from the first communication data by the first processing unit 1 and/or the third communication data from the first communication data by the second processing unit 2 may comprise the following sub-steps:
in step S21, the first processing unit 1 analyzes the first communication data and calculates the first data. The process of generating the first data by the first processing unit 1 may refer to the process of verifying the imaging device with the original chip, and this part of the process may be known technology and will not be described in detail. The first processing unit 1 generates first data (second communication data) from the first communication data, the first data comprising identity data and/or other data of the chip.
In step S22, the second processing unit 2 analyzes the first communication data to obtain the second data or does not respond to the first communication data. The second processing unit 2 may generate second data (third communication data) that is other data of the chip according to the first communication number. If the first communication data includes a verification instruction for verifying the lifetime of the chip, the lifetime data obtained by the first processing unit 1 may be unavailable data, and therefore the lifetime data obtained by the verification instruction for verifying the lifetime of the chip of the second processing unit 2 is needed to complete the verification. Wherein the first communication data comprises first data and/or second data. If the first communication data only contains the authentication command, the second processing unit 2 does not respond to the first communication data or does not send the second data to the integration unit 3.
In step S3, the usable data in the second communication data is acquired to generate verification data for verification. The second communication data generated by the first processing unit 1 under certain specific conditions may include unavailable data, while the second communication data generated by the second processing unit 2 is generally available data, and at this time, verification data may be generated by modifying, adjusting or replacing the unavailable data according to the second communication data of the second processing unit 2, and the verification data is sent to the imaging device in response to the first communication data to complete verification. If the data generated by the second processing unit 2 is unavailable data, the second processing unit 2 needs to be replaced or the unavailable data in the second processing unit 2 needs to be reset or updated, so that the imaging chip can be used again. When the first processing unit 1 is an old chip as it is, and the second communication data generated by the first processing unit contains unusable data, the unusable data cannot be reset.
Wherein, the second communication data sent by the first processing unit 1 and the third communication data sent by the second processing unit 2 may be different. The unusable data may be considered legitimate by the imaging device itself, but considered unusable by the imaging device due to some special reason, reaching a certain threshold or a predetermined condition. For example, the lifetime data of the chip may vary with the number of times or duration of use, and after reaching the threshold value, the imaging device may consider the lifetime of the chip to be over and disable the use. The possible data is data that can be verified by the imaging device and used normally.
The step of generating verification data for verification according to the second communication data and the third communication data comprises the following substeps:
step S31, determining whether the second communication data has unavailable data. The manner of determining whether the second communication data has unavailable data may be: judging according to the type of the first communication data, if a verification instruction except for verifying the identity of the imaging chip exists in the first communication data, the first communication data possibly has unavailable data, and at the moment, when the second communication data is received, the second communication data needs to be acquired; whether a certain instruction in the first communication data is responded by the first processing unit 1 and the second processing unit 2 can also be judged, if yes, the situation that unavailable data possibly exists is indicated; if a certain instruction only responds to the first processing unit 1, the unavailable data does not exist; or analyzing the second communication data to judge whether other data including the chip life data exist, and if the data exist, indicating that unavailable data exist.
In step S32, if it is determined in step S31 that the unavailable data exists, the second communication data is integrated into the verification data for verification. Integration is performed by using third communication data. The second communication data is stored with the unavailable data, so the first processing unit and the second processing unit respectively respond to the first communication data. The unavailable data may be overwritten with third communication data or modified such that the verification data within the integration unit is available data. The process of integrating into the verification data may be: taking the data of the remaining amount of the developer in step 2 as an example, the integrating unit 3 may discard the unusable data (remaining amount of the developer is 1%) in the first processing unit 1, directly use the usable data (remaining amount of the developer is 80%) in the second processing unit 2 as the verification data, or directly modify the unusable data into usable data, or overwrite the unusable data with usable data. The authentication data is transmitted to the image forming apparatus in response to the first communication data.
In step S33, if it is determined in step S31 that the unavailable data does not exist, it is determined that the second communication data is all available data, and therefore the second communication data can be directly verified as verification data. The second communication data may comprise identity data and/or other data of the chip. The further data may comprise further data from the first processing unit 1. The further data may comprise further data from the second processing unit 2 and further data from the first processing unit 1 before the second communication data is integrated. The other data from the first processing unit 1 is not available data, so after the second communication data is integrated, it may be other data from the second processing unit 2, which other data from the first processing unit 1 is definitely discarded or modified or overwritten.
The process of generating verification data according to the second communication data for verification may further include the steps of:
step S31', the second communication data is analyzed to obtain identity data and/or other data. The content of the second communication data is determined by the first communication data, for example, the communication data needs to verify the identity information of the chip, and the second communication data contains the identity information; if the communication data needs to verify the life information of the chip, the second communication data includes the life information. The identity data and other data do not necessarily need to be present at the same time.
And step S32', generating first verification data according to the identity data for verification, and/or generating second verification data according to other data for verification. Since the identity data is already available without modification, it is sufficient to directly correspond to the first communication data using the identity data. However, since other data sent by the first processing unit 1 may not be available, it needs to be processed or integrated by other data of the second processing device to become available data.
Since the imaging chip is installed behind the imaging device, the imaging device can certainly verify the identity data and the service life data of the chip in the using process. Otherwise, the imaging chip can not execute imaging operation such as printing or copying. The verification time may be performed simultaneously or separately, for example, some image forming apparatuses may verify the life data of the image forming chip before performing a printing operation; before some imaging devices execute one-time printing operation, the identity data of the imaging chip is verified firstly, and then the service life data of the imaging chip is verified; still other imaging devices verify the identity data of the chip before performing a printing operation and verify the identity data during the printing process. The data stored in the imaging chip is all required to be usable data, and the unusable data is processed by the integration unit, so that the imaging chip and the chip adopting the chip verification method are both usable chips.
The imaging box comprises a box body and an imaging chip, wherein the imaging chip is arranged on the box body. Preferably, the imaging chip is detachably mounted to the cartridge body so as to replace or reset the imaging chip. The imaging chip is the imaging chip described in the above embodiments. Or the verification method of the imaging chip adopts the verification method described in the above embodiment.
In summary, the imaging chip of the present invention can be continuously used by the integration unit 3 and the second processing unit 2 in cooperation with the first processing unit 1, because at least part of the data (for example, identity data) that can be always verified is stored in the first processing unit 1, when other data needs to be verified, the data in the first processing unit 1 cannot be verified, and the other data is usually not encrypted or changed according to a known rule, the verification of the part of the data can be realized by the second processing unit 2 and the integration unit 3, and at this time, the imaging chip can be verified without modifying any data in the first processing unit 1. Therefore, whether other data in the data of the original chip can be changed or reset or not, the verification can be realized by adopting the chip verification method or the imaging chip. In addition, the cost of the second processing unit 2 and the cost of the integrating unit 3 are generally low, so the development cost of the imaging chip and the imaging box containing the imaging chip of the invention is low. In addition, the data in the second processing unit 2 can be reused by resetting and the like, so that the imaging chip can be reused. In addition, the imaging chip and the chip verification method both utilize the first processing unit 1 to perform identity verification, so that the imaging chip has higher verification passing efficiency and stability.
Various other modifications and changes may be made by those skilled in the art based on the above-described technical solutions and concepts, and all such modifications and changes should fall within the scope of the claims of the present invention.
It should be noted that: the embodiments described above are only a part of the embodiments of the present invention, and not all of them. As used in the examples and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The contents after "for example" are merely examples and are not exhaustive.
Claims (10)
1. A chip verification method is characterized by comprising the following steps:
the first processing unit and the second processing unit respectively receive first communication data;
receiving second communication data and/or third communication data obtained by the first processing unit and/or the second processing unit according to the first communication data;
the integration unit generates verification data according to the second communication data and/or the third communication data for verification;
wherein the second communication data and the third communication data are at least partially different.
2. The chip verification method according to claim 1, wherein: the step of the integration unit generating verification data for verification based on the second communication data and/or the third communication data comprises the sub-steps of:
judging whether the second communication data has unavailable data or not;
if yes, integrating the second communication data into verification data for verification;
otherwise, the second communication data is used as verification data for verification.
3. The chip verification method according to claim 1 or 2, characterized in that: the second communication data comprises identity data and/or other data of the chip.
4. The chip verification method according to claim 3, wherein: the other data comprises other data from the first processing unit.
5. The chip verification method according to claim 4, wherein: the other data from the first processing unit is unavailable data.
6. The chip verification method according to claim 1 or 2, wherein the process of generating verification data for verification according to the second communication data comprises the following steps:
analyzing the second communication data to obtain identity data and/or other data;
and generating first verification data according to the identity data for verification, and/or integrating the first verification data according to other data to generate second verification data for verification.
7. The chip verification method according to claim 1 or 2, wherein the process of receiving the second communication data obtained by the first processing unit and/or the second processing unit according to the first communication data further comprises the following steps:
the first processing unit analyzes the first communication data and calculates to obtain first data;
the second processing unit analyzes the first communication data to obtain second data or does not respond to the first communication data;
wherein the second communication data comprises first data and/or second data.
8. An imaging chip, comprising: the system comprises a first processing unit, a second processing unit and an integration unit, wherein the first processing unit and the second processing unit are respectively connected with the integration unit;
the first processing unit and the second processing unit respectively receive first communication data;
the first processing unit and/or the second processing unit generate second communication data and third communication data, and respectively send the second communication data and the third communication data to the integration unit;
the integration unit verifies the verification data obtained by the second communication data and the third communication data;
wherein the second communication data and the third communication data are different from each other.
9. The imaging chip of claim 8, wherein: the first processing unit and the second processing unit are respectively connected in parallel with the integration unit.
10. An imaging cartridge comprising a cartridge body, characterized in that: the imaging chip is arranged on the box body; the verification method of the imaging chip is the verification method of any one of claims 1 to 7; or the imaging chip is the imaging chip of claim 8 or 9.
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