CN113259044A - 5G extended pico-base station redundant time service synchronization device and control method thereof - Google Patents
5G extended pico-base station redundant time service synchronization device and control method thereof Download PDFInfo
- Publication number
- CN113259044A CN113259044A CN202110614961.1A CN202110614961A CN113259044A CN 113259044 A CN113259044 A CN 113259044A CN 202110614961 A CN202110614961 A CN 202110614961A CN 113259044 A CN113259044 A CN 113259044A
- Authority
- CN
- China
- Prior art keywords
- clock
- extension unit
- integrated circuit
- circuit chip
- gnss receiver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0644—External master-clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
The invention relates to the technical field of an extended pico-cell base station, in particular to a redundant time service synchronizer of a 5G extended pico-cell base station and a control method thereof, and the redundant time service synchronizer comprises a pico-cell base station host and a plurality of extension units, wherein the pico-cell base station host comprises a first GNSS receiver, a first clock synchronous generator and a first digital integrated circuit chip, the extension units comprise a second GNSS receiver, a second clock synchronous generator and a second digital integrated circuit chip, the first clock synchronous generator is respectively and electrically connected with the first GNSS receiver and the first digital integrated circuit chip, the second clock synchronous generator is respectively and electrically connected with the second GNSS receiver and the second digital integrated circuit chip, the first digital integrated circuit chip is electrically connected with the second digital integrated circuit chip, so that the redundant time service synchronizer can be quickly switched to other reference sources after the GNSS receiver fails to output a reference 1pps time service pulse, thereby improving the stability of synchronization.
Description
Technical Field
The invention relates to the technical field of an extended pico-cell base station, in particular to a 5G extended pico-cell base station redundant time service synchronization device and a control method thereof.
Background
In wireless communication, in order to deal with the doppler effect of wireless signals and the interference of adjacent base stations under the same-frequency networking, the 3GPP has strict requirements on the frequency precision and the time precision of the base stations, and especially, a higher requirement is provided for the clock synchronization precision between the base stations due to the application of new technologies such as carrier aggregation, multiple MIMO, a 5G ultra-short frame structure, high-precision positioning and the like in a 5G wireless network and more complex synchronization scene requirements. In order to meet the requirement of clock synchronization precision, a base station mainly obtains a standard clock by two modes: GNSS receiver satellite time service and IEEE1588 time service.
The synchronization precision of IEEE1588 time service fluctuates along with the change of network flow, a mode of time service synchronization by receiving a reference 1pps pulse signal of a GNSS receiver satellite is one of the common time service synchronization modes of the current 5G extended pico-base station, in practical application, due to the influence of various uncertain factors, the satellite time service synchronization of the GNSS receiver may be abnormal, in order to ensure that wireless communication continues to operate normally within a certain time and reduce the influence on a terminal customer, an operator requires that the clock of the 5G extended pico-base station keeps synchronization within a certain time, namely the requirement of clock maintenance. Based on the improvement of the importance of the small base station, an operator continuously puts forward a stricter clock keeping requirement for the 5G macro base station and also puts forward the clock keeping requirement for the small base station, and generally requires that the clock synchronization of the small base station needs to be kept for 8-24 hours.
The function of holding the clock for a long time requires a crystal oscillator with very high precision and frequency stability, and a complex holding algorithm. And the synchronization precision will be worse and worse along with the time, if the maintenance personnel can not process in time, the communication fault will be caused.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: A5G extended pico-base station redundant time service synchronization device and a control method thereof are provided to ensure the installed 5G extended pico-base station and a complete reference of GNSS receiver time service synchronization.
In order to solve the above technical problems, a first technical solution adopted by the present invention is:
A5G extension type redundant time service synchronization device of a pico-cell base station comprises a pico-cell host and more than two extension units, wherein the pico-cell host comprises a first GNSS receiver, a first clock synchronization generator and a first digital integrated circuit chip, the extension units comprise a second GNSS receiver, a second clock synchronization generator and a second digital integrated circuit chip, the first clock synchronization generator is respectively and electrically connected with the first GNSS receiver and the first digital integrated circuit chip, the second clock synchronization generator is respectively and electrically connected with the second GNSS receiver and the second digital integrated circuit chip, and the first digital integrated circuit chip is electrically connected with the second digital integrated circuit chip.
The second technical scheme adopted by the invention is as follows:
a control method of a 5G extended pico-base station redundant time service synchronization device comprises the following steps:
s1, controlling a first GNSS receiver in the station host to output a reference signal of 1pps to a first clock synchronous generator in the station host, and taking the reference signal as a reference signal;
s2, judging whether a first clock synchronous generator in the station host outputs high level;
s3, if yes, the clock of the system is judged to be in a synchronous state, and the first digital integrated circuit chip in the station host is controlled to transmit the reference signal to the second digital integrated circuit chip in each extension unit; and controlling a second digital integrated circuit chip in the extension unit to transmit a recovered clock signal to a second clock synchronous generator, and controlling the second clock synchronous generator in the extension unit to transmit a synchronous clock signal to the second digital integrated circuit chip after the second clock synchronous generator in the extension unit receives the recovered clock signal.
The invention has the beneficial effects that:
by arranging the GNSS receivers on the pico-station host and the extension unit respectively, redundant time service can be carried out on the 5G extension type pico-station, after the GNSS receivers fail and cannot output reference 1pps time service pulses, the reference sources can be quickly switched to other reference sources, the time service continuity is guaranteed, the synchronization stability is improved, an expensive clock maintaining module is not needed to be added, and the overall cost of the base station is reduced.
Drawings
FIG. 1 is a connection block diagram of a 5G extended pico-base station redundant time service synchronization device according to the present invention;
FIG. 2 is a flowchart illustrating steps of a method for controlling a 5G extended pico-base station redundant time service synchronization apparatus according to the present invention;
description of reference numerals:
1. a leather station host; 101. a first GNSS receiver; 102. a first clock sync generator; 103. a first digital integrated circuit chip;
2. an extension unit; 201. a second GNSS receiver; 202. a second clock sync generator; 203. a second digital integrated circuit chip;
3. and a radio frequency unit.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, a technical solution provided by the present invention:
A5G extension type redundant time service synchronization device of a pico-cell base station comprises a pico-cell host and more than two extension units, wherein the pico-cell host comprises a first GNSS receiver, a first clock synchronization generator and a first digital integrated circuit chip, the extension units comprise a second GNSS receiver, a second clock synchronization generator and a second digital integrated circuit chip, the first clock synchronization generator is respectively and electrically connected with the first GNSS receiver and the first digital integrated circuit chip, the second clock synchronization generator is respectively and electrically connected with the second GNSS receiver and the second digital integrated circuit chip, and the first digital integrated circuit chip is electrically connected with the second digital integrated circuit chip.
From the above description, the beneficial effects of the present invention are:
by arranging the GNSS receivers on the pico-station host and the extension unit respectively, redundant time service can be carried out on the 5G extension type pico-station, after the GNSS receivers fail and cannot output reference 1pps time service pulses, the reference sources can be quickly switched to other reference sources, the time service continuity is guaranteed, the synchronization stability is improved, an expensive clock maintaining module is not needed to be added, and the overall cost of the base station is reduced.
Further, the first digital integrated circuit chip and the second digital integrated circuit chip are connected through a cpri interface.
Further, the output terminal of the first GNSS receiver is connected to the input terminal of the first clock synchronization generator.
Further, the output terminal of the second GNSS receiver is connected to the input terminal of the second clock synchronization generator.
Referring to fig. 2, another technical solution provided by the present invention:
a control method of a 5G extended pico-base station redundant time service synchronization device comprises the following steps:
s1, controlling a first GNSS receiver in the station host to output a reference signal of 1pps to a first clock synchronous generator in the station host, and taking the reference signal as a reference signal;
s2, judging whether a first clock synchronous generator in the station host outputs high level;
s3, if yes, the clock of the system is judged to be in a synchronous state, and the first digital integrated circuit chip in the station host is controlled to transmit the reference signal to the second digital integrated circuit chip in each extension unit; and controlling a second digital integrated circuit chip in the extension unit to transmit a recovered clock signal to a second clock synchronous generator, and controlling the second clock synchronous generator in the extension unit to transmit a synchronous clock signal to the second digital integrated circuit chip after the second clock synchronous generator in the extension unit receives the recovered clock signal.
From the above description, the beneficial effects of the present invention are:
outputting a reference signal of 1pps to a first clock synchronous generator in the station host by controlling a first GNSS receiver in the station host, taking the reference signal as a reference signal, judging whether the first clock synchronous generator in the station host outputs a high level, if so, judging that a clock of the system is in a synchronous state, controlling a first digital integrated circuit chip in the station host to transmit the reference signal to a second digital integrated circuit chip in each extension unit, controlling the second digital integrated circuit chip in the extension unit to transmit a recovered clock signal to a second clock synchronous generator, and controlling the second clock synchronous generator in the extension unit to transmit a synchronous clock signal to the second digital integrated circuit chip after the second clock synchronous generator in the extension unit receives the recovered clock signal, therefore, redundant time service can be carried out on the 5G extended pico-cell base station, after the GNSS receiver fails and cannot output reference 1pps time service pulse, the GNSS receiver can be quickly switched to other reference sources, the time service continuity is guaranteed, the synchronization stability is improved, an expensive clock maintaining module is not needed to be added, and the total cost of the base station is reduced.
Further, step S3 further includes the following steps:
if the first clock synchronous generator in the host of the pico-station outputs a low level, judging that a first GNSS receiver in the host of the pico-station is in a fault state; controlling a first digital integrated circuit chip in a station host to transmit fault information of a first GNSS receiver to a second clock synchronous generator in a first extension unit; after receiving the fault information, the second clock synchronous generator in the first extension unit controls the second clock synchronous generator in the first extension unit to adjust from a recovered clock state to a synchronous clock state;
judging whether a second clock synchronous generator in the first extension unit outputs high level or not;
if yes, the clock of the system is judged to be in a synchronous state.
Further, the specific step of controlling the second clock synchronization generator in the first extension unit to adjust from the recovered clock state to the synchronized clock state is:
controlling a second GNSS receiver in the first extension unit to output a reference signal of 1pps to a second clock synchronization generator in the first extension unit;
and controlling a reference source of a second clock synchronization generator in the first extension unit to adjust the recovered clock signal into a reference signal of 1pps output by a second GNSS receiver in the first extension unit so as to perform clock synchronization of the system.
Further, if the second clock synchronization generator in the first extension unit outputs a low level, it is determined that the second GNSS receiver in the first extension unit is in a fault state;
controlling a second digital integrated circuit chip in the first extension unit to transmit the fault information of the second GNSS receiver in the first extension unit to a first digital integrated circuit chip in the station host; after a first digital integrated circuit chip in the host of the station receives the fault information, a second clock synchronous generator in a second expansion unit is controlled to be adjusted from a recovered clock state to a synchronous clock state;
judging whether a second clock synchronous generator in a second expansion unit outputs high level or not;
if yes, the clock of the system is judged to be in a synchronous state.
Further, the specific steps of controlling the second clock synchronization generator in the second expansion unit to adjust from the recovered clock state to the synchronized clock state are as follows:
controlling a second GNSS receiver in the second extension unit to output a reference signal of 1pps to a second clock synchronization generator in the second extension unit;
and controlling a reference source of a second clock synchronization generator in the second extension unit to adjust the recovered clock signal into a reference signal of 1pps output by a second GNSS receiver in the second extension unit so as to perform clock synchronization of the system.
Referring to fig. 1, a first embodiment of the present invention is:
A5G extended pico-base station redundant time service synchronization device comprises a pico-base station host 1 and more than two extension units 2, wherein the pico-base station host 1 comprises a first GNSS receiver 101, a first clock synchronization generator 102 and a first digital integrated circuit chip 103, the extension units 2 comprise a second GNSS receiver 201, a second clock synchronization generator 202 and a second digital integrated circuit chip 203, the first clock synchronization generator 102 is electrically connected with the first GNSS receiver 101 and the first digital integrated circuit chip 103 respectively, the second clock synchronization generator 202 is electrically connected with the second GNSS receiver 201 and the second digital integrated circuit chip 203 respectively, and the first digital integrated circuit chip 103 is electrically connected with the second digital integrated circuit chip 203.
The first digital integrated circuit chip 103 is connected to the second digital integrated circuit chip 203 via a cpri interface.
The output of the first GNSS receiver 101 is connected to the input of the first clock sync generator 102.
An output of the second GNSS receiver 201 is connected to an input of a second clock synchronization generator 202.
Under the condition that the first GNSS receiver 101 in the pico-station host 1 is operating normally, the first GNSS receiver 101 on the pico-station host 1 can stably output a reference 1pps second pulse signal as a synchronization pulse signal, which is provided to the pico-station host 1 as a clock synchronization reference source and transmitted to the extension unit 2 through the cpri interface, the extension unit 2 recovers the synchronization clock from the cpri interface to provide the system for use, if the first GNSS receiver 101 in the pico-station host 1 is abnormal, the first GNSS receiver 101 cannot generate the reference 1pps second pulse signal, the system rapidly switches to use the reference 1pps generated by the second GNSS receiver 201 deployed on the first extension unit 2 as the synchronization signal, and transmits the synchronization information to the pico-station host 1 through the cpri interface signal, and if the second GNSS receiver 201 on the first extension unit 2 also fails, the second GNSS receiver 201 on the second extension unit 2 is used as a reference signal, and the information is provided for the leather station host 1, and the like. After the failure of the host 1 is recovered, the synchronous reference source is switched back to the GNSS receiver of the host 1. The specific analysis is as follows:
after the 5G extended pico-base station redundant time service synchronizer designed by the scheme is installed, a reference 1pps signal generated by a first GNSS receiver 101 installed in a pico-base station host 1 is input into a first clock synchronization generator 102 as a reference, a stable synchronous clock is generated and provided for a first digital integrated circuit chip 103 on the pico-base station host 1, meanwhile, the pin of the first clock synchronous generator 102 outputs a high state to indicate that the system clock is synchronized, the first digital integrated circuit chip 103 is transmitted to a different extension unit 2 through the cpri interface, the second digital integrated circuit chip 203 in the extension unit 2 recovers the clock from the cpri interface and provides the clock to the second clock synchronous generator 202 on the extension unit 2 to generate a stable synchronous clock, so that the clock of the system and the reference 1pps signal generated by the GNSS receiver are kept in a synchronous lock state.
The first GNSS receiver 101 installed on the pico-station host 1 cannot generate a reference 1pps signal after a fault occurs, the synchronization state pin of the first clock synchronization generator 102 in the pico-station host 1 outputs a low level state indicating that the system clock has lost the synchronization reference source and enters a 30-minute hold mode, the pico-station host 1 transmits the fault information to the first extension unit 2 through the cpri interface, the first extension unit 2 receives the fault information and then adjusts the reference source of the second clock synchronization generator 202 on the first extension unit 2 from the recovered clock of the first digital integrated circuit chip 103 to the reference 1pps reference signal generated by the second GNSS receiver 201 on the first extension unit 2 for system clock synchronization, and when the synchronization state pin of the second clock synchronization generator 202 on the first extension unit 2 outputs a high level state indicating that the system clock has completed synchronization with the reference 1pps signal, the first digital integrated circuit chip 103 on the first extension unit 2 is transmitted to the host 1 of the pico-station through the cppri interface, the synchronization source of the host 1 of the pico-station is switched from the original reference 1pps to the FPGA of the host 1 of the pico-station to recover the clock, generate a stable synchronous clock, and provide the system and other extension units 2 for use.
When the second GNSS receiver 201 in the first extension unit 2 also fails to generate the reference 1pps signal, the synchronization status pin of the second clock synchronization generator 202 in the first extension unit 2 outputs a low level status indicating that the clock has lost the synchronization reference source, and enters a 30-minute hold mode, the first extension unit 2 transmits the failure information to the pico-station host 1 through the cpri interface, the pico-station host 1 receives the failure information, notifies the reference source of the second clock synchronization generator 202 in the second extension unit 2 to adjust the recovered clock of the second digital integrated circuit chip 203 in the second extension unit 2 from the reference 1pps reference signal generated by the second GNSS receiver 201 in the second extension unit 2, generates a stable synchronized clock, and when the synchronization status pin of the second clock synchronization generator 202 in the second extension unit 2 outputs a high level status indicating that the clock has been synchronized with the reference 1pps, the second digital integrated circuit chip 203 on the second expansion unit 2 is transmitted to the pico-station host 1 through the cpri interface, and notifies the clock source of the first expansion unit 2 to switch to the recovered clock of the second digital integrated circuit chip 203 in the first expansion unit 2. The clock source of the host 1 is provided by the second expansion unit 2, which generates a stable synchronous clock for the system and the rest of the expansion units 2. When the second GNSS receiver 201 of the second extension unit 2 fails, the system also switches the clock synchronization source to the third extension unit 2 in the same manner, and so on, so as to achieve the purpose of system redundancy synchronization.
When the failure of the first GNSS receiver 101 of the pico-station host 1 is resolved and the system is recovered to normal, the pico-station host 1 informs each extension unit 2 of the information, and switches the clock source to the recovery clock provided by the pico-station host 1, and the synchronization source of the first clock synchronization generator 102 in the pico-station host 1 selects the reference 1pps of the first GNSS receiver 101 as the reference, so that the whole system clock is kept in a synchronous state.
The 5G extended pico-base station system consists of a pico-base station host 1, an extension unit 2 and a radio frequency unit 3. The station host 1 mainly completes the functions of modulation and demodulation of baseband signals, radio resource management, mobility management, physical layer processing, equipment state monitoring and the like, and one station host 1 can be connected with at least four extension units 2. The expansion unit 2 mainly completes functions of data splitting and merging, data forwarding, a physical layer low layer and the like, and one expansion unit 2 can be connected with at least eight radio frequency units 3. The rf unit 3 mainly completes rf processing and transceiving of wireless signals. The 5G extended pico-base station consists of three units and a plurality of devices, so that the device and application support is provided for redundancy synchronization. According to the scheme, the 5G extended type pico base station redundant synchronous time service device does not need to be additionally provided with an expensive keeping module, ensures the synchronous stability of the 5G extended type pico base station, and has higher practical value.
Referring to fig. 2, the second embodiment of the present invention is:
a control method of a 5G extended pico-base station redundant time service synchronization device comprises the following steps:
s1, controlling the first GNSS receiver 101 in the station host 1 to output 1pps of reference signal to the first clock synchronous generator 102 in the station host 1, and taking the reference signal as a reference signal;
s2, judging whether the first clock synchronous generator 102 in the station host 1 outputs high level;
s3, if yes, determining that the clock of the system is in a synchronous state, and controlling the first digital integrated circuit chip 103 in the pico-station host 1 to transmit the reference signal to the second digital integrated circuit chips 203 in the extension units 2; and controlling the second digital integrated circuit chip 203 in the extension unit 2 to transmit the recovered clock signal to the second clock synchronization generator 202, and controlling the second clock synchronization generator 202 in the extension unit 2 to transmit the synchronous clock signal to the second digital integrated circuit chip 203 after the second clock synchronization generator 202 in the extension unit 2 receives the recovered clock signal.
Step S3 further includes the steps of:
if the first clock synchronous generator 102 in the pico-station host 1 outputs a low level, it is determined that the first GNSS receiver 101 in the pico-station host 1 is in a fault state; controlling a first digital integrated circuit chip 103 in the pico-station host 1 to transmit fault information of the first GNSS receiver 101 to a second clock synchronization generator 202 in the first extension unit 2; after receiving the failure information, the second clock synchronization generator 202 in the first extension unit 2 controls the second clock synchronization generator 202 in the first extension unit 2 to adjust from the recovered clock state to the synchronized clock state;
judging whether the second clock synchronous generator 202 in the first extension unit 2 outputs a high level;
if yes, the clock of the system is judged to be in a synchronous state.
The specific steps for controlling the second clock synchronization generator 202 in the first extension unit 2 to adjust from the recovered clock state to the synchronized clock state are as follows:
controlling the second GNSS receiver 201 in the first extension unit 2 to output a reference signal of 1pps to the second clock synchronization generator 202 in the first extension unit 2;
the reference source controlling the second clock synchronization generator 202 in the first extension unit 2 adjusts the recovered clock signal to the reference signal of 1pps output by the second GNSS receiver 201 in the first extension unit 2, so as to perform the clock synchronization of the system.
If the second clock synchronization generator 202 in the first extension unit 2 outputs a low level, it determines that the second GNSS receiver 201 in the first extension unit 2 is in a failure state;
controlling the second digital integrated circuit chip 203 in the first extension unit 2 to transmit the fault information of the second GNSS receiver 201 in the first extension unit 2 to the first digital integrated circuit chip 103 in the station host 1; after the first digital integrated circuit chip 103 in the pico-station host 1 receives the fault information, the second clock synchronous generator 202 in the second extension unit 2 is controlled to be adjusted from the recovered clock state to the synchronous clock state;
judging whether the second clock synchronous generator 202 in the second extension unit 2 outputs a high level;
if yes, the clock of the system is judged to be in a synchronous state.
The specific steps for controlling the second clock synchronization generator 202 in the second extension unit 2 to adjust from the recovered clock state to the synchronized clock state are as follows:
controlling the second GNSS receiver 201 in the second extension unit 2 to output 1pps of the reference signal to the second clock synchronization generator 202 in the second extension unit 2;
the reference source controlling the second clock synchronization generator 202 in the second extension unit 2 adjusts the recovered clock signal to a reference signal of 1pps output by the second GNSS receiver 201 in the second extension unit 2 for system clock synchronization.
The specific embodiment of the control method of the 5G extended pico-base station redundant time service synchronization device designed by the scheme is as follows:
after the 5G extended pico-base station redundant time service synchronizer designed by the scheme is installed, a reference 1pps signal generated by a first GNSS receiver 101 installed in a pico-base station host 1 is input into a first clock synchronization generator 102 as a reference, a stable synchronous clock is generated and provided for a first digital integrated circuit chip 103 on the pico-base station host 1, meanwhile, the pin of the first clock synchronous generator 102 outputs a high state to indicate that the system clock is synchronized, the first digital integrated circuit chip 103 is transmitted to a different extension unit 2 through the cpri interface, the second digital integrated circuit chip 203 in the extension unit 2 recovers the clock from the cpri interface and provides the clock to the second clock synchronous generator 202 on the extension unit 2 to generate a stable synchronous clock, so that the clock of the system and the reference 1pps signal generated by the GNSS receiver are kept in a synchronous lock state.
The first GNSS receiver 101 installed on the pico-station host 1 cannot generate a reference 1pps signal after a fault occurs, the synchronization state pin of the first clock synchronization generator 102 in the pico-station host 1 outputs a low level state indicating that the system clock has lost the synchronization reference source and enters a 30-minute hold mode, the pico-station host 1 transmits the fault information to the first extension unit 2 through the cpri interface, the first extension unit 2 receives the fault information and then adjusts the reference source of the second clock synchronization generator 202 on the first extension unit 2 from the recovered clock of the first digital integrated circuit chip 103 to the reference 1pps reference signal generated by the second GNSS receiver 201 on the first extension unit 2 for system clock synchronization, and when the synchronization state pin of the second clock synchronization generator 202 on the first extension unit 2 outputs a high level state indicating that the system clock has completed synchronization with the reference 1pps signal, the first digital integrated circuit chip 103 on the first extension unit 2 is transmitted to the host 1 of the pico-station through the cppri interface, the synchronization source of the host 1 of the pico-station is switched from the original reference 1pps to the FPGA of the host 1 of the pico-station to recover the clock, generate a stable synchronous clock, and provide the system and other extension units 2 for use.
When the second GNSS receiver 201 in the first extension unit 2 also fails to generate the reference 1pps signal, the synchronization status pin of the second clock synchronization generator 202 in the first extension unit 2 outputs a low level status indicating that the clock has lost the synchronization reference source, and enters a 30-minute hold mode, the first extension unit 2 transmits the failure information to the pico-station host 1 through the cpri interface, the pico-station host 1 receives the failure information, notifies the reference source of the second clock synchronization generator 202 in the second extension unit 2 to adjust the recovered clock of the second digital integrated circuit chip 203 in the second extension unit 2 from the reference 1pps reference signal generated by the second GNSS receiver 201 in the second extension unit 2, generates a stable synchronized clock, and when the synchronization status pin of the second clock synchronization generator 202 in the second extension unit 2 outputs a high level status indicating that the clock has been synchronized with the reference 1pps, the second digital integrated circuit chip 203 on the second expansion unit 2 is transmitted to the pico-station host 1 through the cpri interface, and notifies the clock source of the first expansion unit 2 to switch to the recovered clock of the second digital integrated circuit chip 203 in the first expansion unit 2. The clock source of the host 1 is provided by the second expansion unit 2, which generates a stable synchronous clock for the system and the rest of the expansion units 2. When the second GNSS receiver 201 of the second extension unit 2 fails, the system also switches the clock synchronization source to the third extension unit 2 in the same manner, and so on, so as to achieve the purpose of system redundancy synchronization.
When the failure of the first GNSS receiver 101 of the pico-station host 1 is resolved and the system is recovered to normal, the pico-station host 1 informs each extension unit 2 of the information, and switches the clock source to the recovery clock provided by the pico-station host 1, and the synchronization source of the first clock synchronization generator 102 in the pico-station host 1 selects the reference 1pps of the first GNSS receiver 101 as the reference, so that the whole system clock is kept in a synchronous state.
The 5G extended pico-base station system consists of a pico-base station host 1, an extension unit 2 and a radio frequency unit 3. The station host 1 mainly completes the functions of modulation and demodulation of baseband signals, radio resource management, mobility management, physical layer processing, equipment state monitoring and the like, and one station host 1 can be connected with at least four extension units 2. The expansion unit 2 mainly completes functions of data splitting and merging, data forwarding, a physical layer low layer and the like, and one expansion unit 2 can be connected with at least eight radio frequency units 3. The rf unit 3 mainly completes rf processing and transceiving of wireless signals. The 5G extended pico-base station consists of three units and a plurality of devices, so that the device and application support is provided for redundancy synchronization. According to the scheme, the 5G extended type pico base station redundant synchronous time service device does not need to be additionally provided with an expensive keeping module, ensures the synchronous stability of the 5G extended type pico base station, and has higher practical value.
In summary, in the case that the first GNSS receiver in the host of the pico-station operates normally, the first GNSS receiver on the host of the pico-station can stably output a reference 1pps second pulse signal as a synchronization pulse signal, which is provided to the host of the pico-station as a clock synchronization reference source and transmitted to the extension unit through the cppri interface, the extension unit recovers the synchronization clock from the cppri interface for use by the system, if the first GNSS receiver in the host of the pico-station is abnormal, the first GNSS receiver cannot generate the reference 1pps second pulse signal, the system rapidly switches to adopt the reference 1pps generated by the second GNSS receiver deployed on the first extension unit as the synchronization signal, and transmits the synchronization information to the host of the pico-station through the cppri interface signal, if the second GNSS receiver on the first extension unit also generates a fault, the second GNSS receiver on the second extension unit is provided to the pico-station host as a reference signal, and so on. And after the fault of the host of the pico-station is recovered, the synchronous reference source is switched back to the GNSS receiver of the pico-station host again. By arranging the GNSS receivers on the pico-station host and the extension unit respectively, redundant time service can be carried out on the 5G extension type pico-station, after the GNSS receivers fail and cannot output reference 1pps time service pulses, the reference sources can be quickly switched to other reference sources, the time service continuity is guaranteed, the synchronization stability is improved, an expensive clock maintaining module is not needed to be added, and the overall cost of the base station is reduced.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (9)
1. The 5G extended-type pico-base station redundant time service synchronization device is characterized by comprising a pico-base station host and more than two extension units, wherein the pico-base station host comprises a first GNSS receiver, a first clock synchronization generator and a first digital integrated circuit chip, the extension units comprise a second GNSS receiver, a second clock synchronization generator and a second digital integrated circuit chip, the first clock synchronization generator is respectively and electrically connected with the first GNSS receiver and the first digital integrated circuit chip, the second clock synchronization generator is respectively and electrically connected with the second GNSS receiver and the second digital integrated circuit chip, and the first digital integrated circuit chip is electrically connected with the second digital integrated circuit chip.
2. The 5G extended pico-base station redundant time service synchronization device according to claim 1, wherein the first digital integrated circuit chip and the second digital integrated circuit chip are connected through a cpri interface.
3. The 5G extended pico base station redundant time service synchronization device according to claim 1, wherein an output terminal of the first GNSS receiver is connected to an input terminal of a first clock synchronization generator.
4. The 5G extended pico base station redundant time service synchronization device according to claim 1, wherein an output terminal of the second GNSS receiver is connected to an input terminal of a second clock synchronization generator.
5. The method for controlling the 5G extended pico base station redundant time service synchronization device according to claim 1, comprising the steps of:
s1, controlling a first GNSS receiver in the station host to output a reference signal of 1pps to a first clock synchronous generator in the station host, and taking the reference signal as a reference signal;
s2, judging whether a first clock synchronous generator in the station host outputs high level;
s3, if yes, the clock of the system is judged to be in a synchronous state, and the first digital integrated circuit chip in the station host is controlled to transmit the reference signal to the second digital integrated circuit chip in each extension unit; and controlling a second digital integrated circuit chip in the extension unit to transmit a recovered clock signal to a second clock synchronous generator, and controlling the second clock synchronous generator in the extension unit to transmit a synchronous clock signal to the second digital integrated circuit chip after the second clock synchronous generator in the extension unit receives the recovered clock signal.
6. The method for controlling the 5G extended pico-base station redundant time service synchronization device according to claim 5, wherein the step S3 further comprises the steps of:
if the first clock synchronous generator in the host of the pico-station outputs a low level, judging that a first GNSS receiver in the host of the pico-station is in a fault state; controlling a first digital integrated circuit chip in a station host to transmit fault information of a first GNSS receiver to a second clock synchronous generator in a first extension unit; after receiving the fault information, the second clock synchronous generator in the first extension unit controls the second clock synchronous generator in the first extension unit to adjust from a recovered clock state to a synchronous clock state;
judging whether a second clock synchronous generator in the first extension unit outputs high level or not;
if yes, the clock of the system is judged to be in a synchronous state.
7. The method for controlling the 5G extended pico-base station redundant time service synchronization device according to claim 6, wherein the specific step of controlling the second clock synchronization generator in the first extension unit to adjust from the recovered clock state to the synchronized clock state is:
controlling a second GNSS receiver in the first extension unit to output a reference signal of 1pps to a second clock synchronization generator in the first extension unit;
and controlling a reference source of a second clock synchronization generator in the first extension unit to adjust the recovered clock signal into a reference signal of 1pps output by a second GNSS receiver in the first extension unit so as to perform clock synchronization of the system.
8. The method of claim 6, wherein if the second clock synchronization generator in the first extension unit outputs a low level, it determines that the second GNSS receiver in the first extension unit is in a fault state;
controlling a second digital integrated circuit chip in the first extension unit to transmit the fault information of the second GNSS receiver in the first extension unit to a first digital integrated circuit chip in the station host; after a first digital integrated circuit chip in the host of the station receives the fault information, a second clock synchronous generator in a second expansion unit is controlled to be adjusted from a recovered clock state to a synchronous clock state;
judging whether a second clock synchronous generator in a second expansion unit outputs high level or not;
if yes, the clock of the system is judged to be in a synchronous state.
9. The method for controlling the 5G extended pico-base station redundant time service synchronization device according to claim 8, wherein the specific step of controlling the second clock synchronization generator in the second extension unit to adjust from the recovered clock state to the synchronized clock state is:
controlling a second GNSS receiver in the second extension unit to output a reference signal of 1pps to a second clock synchronization generator in the second extension unit;
and controlling a reference source of a second clock synchronization generator in the second extension unit to adjust the recovered clock signal into a reference signal of 1pps output by a second GNSS receiver in the second extension unit so as to perform clock synchronization of the system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110614961.1A CN113259044A (en) | 2021-06-02 | 2021-06-02 | 5G extended pico-base station redundant time service synchronization device and control method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110614961.1A CN113259044A (en) | 2021-06-02 | 2021-06-02 | 5G extended pico-base station redundant time service synchronization device and control method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113259044A true CN113259044A (en) | 2021-08-13 |
Family
ID=77186042
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110614961.1A Pending CN113259044A (en) | 2021-06-02 | 2021-06-02 | 5G extended pico-base station redundant time service synchronization device and control method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113259044A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113795003A (en) * | 2021-11-10 | 2021-12-14 | 广东省新一代通信与网络创新研究院 | Multi-RRU (remote radio unit) extension system for 5G indoor wireless communication and implementation method |
-
2021
- 2021-06-02 CN CN202110614961.1A patent/CN113259044A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113795003A (en) * | 2021-11-10 | 2021-12-14 | 广东省新一代通信与网络创新研究院 | Multi-RRU (remote radio unit) extension system for 5G indoor wireless communication and implementation method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8050296B2 (en) | Radio equipment (RE)-based synchronization | |
| EP2251996B1 (en) | Clock synchronous system | |
| US8654796B2 (en) | System for synchronizing clock | |
| CN102611491B (en) | Base station clock device, base station system and clock synchronization method | |
| US20130154877A1 (en) | Wireless communication system and time synchronization method thereof | |
| US8537948B2 (en) | Clock synchronization in shared baseband deployments | |
| KR100429550B1 (en) | System and method for synchronizing a base station in a distributed radio system | |
| US6119016A (en) | Synchronizing base stations in a wireless telecommunications system | |
| CN103686982A (en) | Method for time synchronization based on clock information and node equipment | |
| US6839391B2 (en) | Method and apparatus for a redundant clock | |
| CN113259044A (en) | 5G extended pico-base station redundant time service synchronization device and control method thereof | |
| US20120327983A1 (en) | Transmitter apparatus, transmission method and transmission system | |
| EP2837117B1 (en) | Clock switching algorithm based on preferred clock source | |
| CN215420315U (en) | 5G extension type pico base station redundant time service synchronization device | |
| US9179429B2 (en) | Synchronization method, device, and system | |
| CN111162863A (en) | Access network device and data processing method | |
| CN102185687B (en) | System and method for realizing clock synchronization among different units | |
| CN105790872B (en) | A kind of network clock synchronous device and its working method | |
| US20040145400A1 (en) | Method for generating an internal clock pulse in an electric circuit and a corresponding electric circuit comprising a central clock-pulse generator | |
| JP6983726B2 (en) | Distributed antenna system and synchronization method | |
| CN101958762B (en) | Main and standby clock switching device and method | |
| JP2013153242A (en) | Base station | |
| CN108449154A (en) | A kind of clock system and clock self-healing method for synchronizing network looped network | |
| JP2637796B2 (en) | Line switching method | |
| CN108235448A (en) | Improve the device and method of ad hoc network clock accuracy |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |