CN113238788B - BIOS upgrading method and related device - Google Patents
BIOS upgrading method and related device Download PDFInfo
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- CN113238788B CN113238788B CN202110528021.0A CN202110528021A CN113238788B CN 113238788 B CN113238788 B CN 113238788B CN 202110528021 A CN202110528021 A CN 202110528021A CN 113238788 B CN113238788 B CN 113238788B
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- 238000004590 computer program Methods 0.000 claims description 9
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/572—Secure firmware programming, e.g. of basic input output system [BIOS]
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Abstract
The application discloses a BIOS upgrading method, comprising the following steps: judging whether a security module exists or not; if yes, the BMC is controlled to store the file to be upgraded into Flash through the second data selector; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector; if not, controlling the BMC to upgrade the BIOS in an out-of-band manner through the second data selector; wherein the first data selector and the second data selector are arranged in parallel in a circuit. By having the first data selector in parallel with the second data selector, the delay through the data selector in the QSPI path is reduced, reducing the overall process. The application also discloses a BIOS upgrading device, a server and a computer readable storage medium, which have the beneficial effects.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a BIOS upgrade method, a BIOS upgrade device, a server, and a computer readable storage medium.
Background
In order to improve the security of the BIOS (Basic Input Output System ) upgrade in the server, a security module is generally added in the upgrade process and the upgrade circuit, so as to implement a safer upgrade operation on the BIOS through the security module.
In the related art, in order to be compatible with the security module, a two-stage data selector (multiplexer) is placed on the QSPI (Quard Serial Peripheral Interface, four-way serial peripheral interface) path of the BIOS. When the security module exists, the security policy of the BIOS is executed by the security module, the normal security start/check path is from the security module to the first data selector to the second data selector and finally to Flash, the out-of-band upgrade path of the BIOS is the same as the check path, and the security module to the first data selector to the second data selector and finally to Flash. When the security module is not present, the out-of-band upgrade path of the BIOS is BMC (Baseboard Management Controller ) to the second data selector to Flash. And in a normal working state, an access path PCH (main board controller) of Flash goes to the first data selector to the second data selector and finally to Flash. It can be seen that in the security upgrade/check mode, the security module needs to pass through the two-stage data selector to access Flash; in normal application, PCH can access Flash only through two-stage data selector, and the delay of the whole QSPI path is relatively long, which is unfavorable for the signal integrity and time control of QSPI bus.
Therefore, how to reduce the time delay of the whole process is a major concern for the person skilled in the art.
Disclosure of Invention
The purpose of the application is to provide a BIOS upgrading method, a BIOS upgrading device, a server and a computer readable storage medium, wherein when a security module exists, the BMC or the security module can access Flash through a primary data selector and perform BIOS upgrading through a first data selector and a second data selector which are arranged in parallel; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
In order to solve the above technical problems, the present application provides a method for upgrading a BIOS, including:
judging whether a security module exists or not;
if yes, the BMC is controlled to store the file to be upgraded into Flash through the second data selector; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector;
if not, controlling the BMC to upgrade the BIOS in an out-of-band manner through the second data selector; wherein the first data selector and the second data selector are arranged in parallel in a circuit.
Optionally, controlling the BMC to store the file to be upgraded in Flash through the second data selector includes:
controlling the security module to close the output enable of the first data selector and open the output enable of the second data selector;
and controlling the BMC to store the file to be upgraded into the Flash through the second data selector.
Optionally, when the file to be upgraded is stored in the Flash, controlling the security module to perform BIOS upgrade according to the file to be upgraded through a first data selector includes:
when the file to be upgraded is stored in the Flash, controlling the security module to open the output enabling of the first data selector and closing the output enabling of the second data selector;
and controlling the security module to carry out BIOS upgrading according to the file to be upgraded through a first data selector.
Optionally, when the BIOS upgrade is completed, the method further includes:
setting the enabling of the first data selector to an on state and setting the enabling of the second data selector to an off state when the security module is present;
and controlling the security module to set the output selection of the first data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the first data selector.
Optionally, controlling the BMC to upgrade the BIOS out of band through the second data selector includes:
setting an enable of the first data selector to an off state;
setting the enabling of the second data selector to an open state;
and controlling the BMC to upgrade the BIOS out of band through the second data selector.
Optionally, when the out-of-band upgrade is completed, the method further comprises:
setting the enabling of the first data selector to a closed state and setting the enabling of the second data selector to an open state when the security module is not present;
and controlling the BMC to set the output selection of the second data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the second data selector.
Optionally, the first data selector and the second data selector are respectively disposed on TOP layer and Bottom layer at the same position in the PCB board.
The application also provides a BIOS upgrading device, which comprises:
the safety module judging unit is used for judging whether the safety module exists or not;
the in-band upgrading unit is used for controlling the BMC to store the file to be upgraded into the Flash through the second data selector when the security module exists; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector;
and the out-of-band upgrading unit is used for controlling the BMC to carry out-of-band upgrading on the BIOS through the second data selector when the security module does not exist.
The application also provides a server comprising:
a memory for storing a computer program;
and the processor is used for realizing the steps of the BIOS upgrading method when executing the computer program.
The present application also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the BIOS upgrade method as described above.
The BIOS upgrading method provided by the application comprises the following steps: judging whether a security module exists or not; if yes, the BMC is controlled to store the file to be upgraded into Flash through the second data selector; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector; if not, controlling the BMC to upgrade the BIOS in an out-of-band manner through the second data selector; wherein the first data selector and the second data selector are arranged in parallel in a circuit.
The first data selector and the second data selector are arranged in parallel, so that when the security module exists, the BMC or the security module can access Flash through the first-level data selector and perform BIOS upgrading; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
The application further provides a BIOS upgrading device, a server and a computer readable storage medium, which have the beneficial effects and are not described herein.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.
FIG. 1 is a flowchart of a BIOS upgrading method according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a BIOS upgrade circuit according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a BIOS upgrade device according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a BIOS upgrading method, a BIOS upgrading device, a server and a computer readable storage medium, wherein when a security module exists, the BMC or the security module can access Flash through the primary data selector and perform BIOS upgrading through the first data selector and the second data selector which are arranged in parallel; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In the related art, in order to be compatible with the security module, a two-stage data selector is placed on the QSPI path of the BIOS. When the security module exists, the security policy of the BIOS is executed by the security module, the normal security start/check path is from the security module to the first data selector to the second data selector and finally to Flash, the out-of-band upgrade path of the BIOS is the same as the check path, and the security module to the first data selector to the second data selector and finally to Flash. When the security module is not present, the out-of-band upgrade path of the BIOS is BMC to the second data selector to Flash. And in a normal working state, the access path PCH of Flash goes to the first data selector to the second data selector and finally to Flash. It can be seen that in the security upgrade/check mode, the security module needs to pass through the two-stage data selector to access Flash; in normal application, PCH can access Flash only through two-stage data selector, and the delay of the whole QSPI path is relatively long, which is unfavorable for the signal integrity and time control of QSPI bus.
Therefore, the application provides a BIOS upgrading method, which enables the BMC or the security module to access Flash through the primary data selector and perform BIOS upgrading when the security module exists through the first data selector and the second data selector which are arranged in parallel; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
The following describes a BIOS upgrade method provided in the present application through an embodiment.
Referring to fig. 1, fig. 1 is a flowchart of a BIOS upgrade method according to an embodiment of the present application.
In this embodiment, the method may include:
s101, judging whether a security module exists or not; if yes, executing S102; if not, executing S103;
it can be seen that this step is intended to determine whether a corresponding security module is present. That is, whether a security module is provided in the BIOS circuit and whether the security module is turned on; wherein the first data selector and the second data selector are arranged in parallel in the circuit.
The security module may be a security module employing PFR (Platform Firmware Resilence, platform firmware quick recovery) technology, among other things. When the security module is used for the main line structure of the computer, the security module can affect the bus structure and related processing procedures, so that the topology structure of the bus can have various structures, and meanwhile, the corresponding processing procedures can have various processing modes. In different processing procedures, the problem of longer processing time delay exists. In this embodiment, since the first data selector and the second data selector are arranged in parallel in the circuit, only one data selector is needed to access Flash in the link, thereby reducing the data transmission delay.
Further, in order to reduce the influence of signal stubs on signals caused by the bifurcation of the common input pch_qspi of the first data selector and the second data selector. The first data selector and the second data selector in this embodiment are respectively disposed on the TOP layer and the Bottom layer at the same position in the PCB board. The PCH_QSPI is input into the data selector and is then perforated near the input pins of the data selector, and the output of the two data selectors is combined near the output end of the data selector through perforation. Thus, the Stub effect of the bus with the split QSPI wires on the PCH side and the Flash side is reduced.
S102, controlling the BMC to store a file to be upgraded into Flash through a second data selector; when the file to be upgraded is stored in Flash, the control security module performs BIOS upgrading according to the file to be upgraded through the first data selector;
on the basis of S101, this step aims at performing different data operations by the first data selector and the second data selector when there is a corresponding security module, so that the BIOS can be upgraded by only one data selector. Further, in this step, the BMC is first controlled to store the file to be upgraded into Flash through the second data selector. That is, the file to be upgraded is written from the BMC to the Flash through the second data selector control. When the file to be upgraded is stored in Flash, the control security module performs BIOS upgrading according to the file to be upgraded through the first data selector. Therefore, in the step, whether the BMC or the security module is used, the corresponding data operation can be realized through one data selector, and the time delay of data transmission is reduced through two stages of data selectors instead of the two stages of data selectors. That is, an in-band upgrade is performed.
Further, to implement the steps in this embodiment, the steps may include:
step 1, controlling a security module to close output enabling of a first data selector and open output enabling of a second data selector;
step 2, controlling the BMC to store the file to be upgraded into Flash through a second data selector;
step 3, when the file to be upgraded is stored in Flash, controlling the security module to open the output enabling of the first data selector and closing the output enabling of the second data selector;
and 4, controlling the security module to carry out BIOS upgrading according to the file to be upgraded through the first data selector.
It can be seen that this alternative mainly describes how the BIOS upgrade is implemented by the security module. In the alternative scheme, the safety module is controlled to close the output enable of the first data selector and open the output enable of the second data selector; and then, controlling the BMC to store the file to be upgraded into the Flash through the second data selector. That is, the first data selector is turned off and the second data selector is turned on, so that the BMC writes the file to be upgraded into Flash through the second data selector. When the file to be upgraded is stored in Flash, the security module is controlled to open the output enabling of the first data selector and close the output enabling of the second data selector; finally, the control security module performs BIOS upgrading according to the file to be upgraded through the first data selector.
The output enabling of the first data selector and the second data selector mainly controls output switches of the first data selector and the second data selector, when the output enabling is opened, data can be transmitted to Flash, and when the output enabling is closed, data transmission cannot be performed.
Further, after the BIOS is updated, corresponding data read-write operation can be executed, namely, PCH reads the data in Flash. Therefore, the present embodiment may further include:
step 1, when a security module exists, setting the enabling of a first data selector to be in an open state, and setting the enabling of a second data selector to be in a closed state;
and 2, controlling the safety module to set the output selection of the first data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the first data selector.
Therefore, in this embodiment, the reading and writing of the data after the BIOS upgrade is mainly described. In the alternative, when the security module exists, the enabling of the first data selector is set to be in an open state, and the enabling of the second data selector is set to be in a closed state; and then the control security module sets the output selection of the first data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the first data selector.
S103, controlling the BMC to upgrade the BIOS in an out-of-band mode through the second data selector.
It can be seen that this step aims to control the BMC to upgrade the BIOS out-of-band through the second data selector when the security module is not present. That is, the BMC is employed for out-of-band upgrades through the second data selector. The operation of the out-of-band upgrade may refer to any operation mode of the out-of-band upgrade provided in the prior art, and is not specifically limited herein.
Further, the step may include:
step 1, setting the enabling of a first data selector to be in a closed state;
step 2, setting the enabling of the second data selector to be in an open state;
and 3, controlling the BMC to upgrade the BIOS in an out-of-band manner through the second data selector.
It can be seen that the present alternative mainly describes how to perform the out-of-band upgrade. Setting the enabling of the first data selector to an off state in the present alternative; then, setting the enable of the second data selector to an on state; finally, the BMC is controlled to upgrade the BIOS out of band through the second data selector.
Further, for the speed and efficiency of the subsequent data reading, when the out-of-band upgrade is completed, the embodiment may further include:
step 1, when a security module does not exist, setting the enabling of a first data selector to be in a closed state, and setting the enabling of a second data selector to be in an open state;
and 2, controlling the BMC to set the output selection of the second data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the second data selector.
It can be seen that, in this alternative, after the out-of-band upgrade is performed, when the security module does not exist, the enabling of the first data selector is set to the off state, and the enabling of the second data selector is set to the on state; then, the control BMC sets the output selection of the second data selector to the QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the second data selector.
In summary, in this embodiment, through the first data selector and the second data selector that are arranged in parallel, when the security module exists, the BMC or the security module can access Flash through the primary data selector, and perform BIOS upgrade; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
The following describes a BIOS upgrade method provided in the present application through a specific embodiment.
Referring to fig. 2, fig. 2 is a schematic diagram of a BIOS upgrade circuit according to an embodiment of the present application.
In this embodiment, on the access path from PCH to Flash of BIOS, there are two parallel data selectors, namely, the first data selector (i.e., MUX1 in fig. 2) and the second data selector (i.e., MUX2 in fig. 2), the OE (output enable) outputs of the first data selector and the second data selector are controlled by the security module, and the control signals are the same source but logically opposite; the output selection SEL (select) of the first data selector is controlled by the security module, and the output selection SEL of the second data selector is controlled by the BMC.
When the security module exists, the OOB (Out of Band) upgrade of Flash is divided into two steps.
Firstly, the BMC uploads a file to be upgraded through a second data selector;
the second step, the security module performs a security upgrade through the first data selector path. The out-of-band upgrade path is changed from a two-stage data selector cascade of the prior art scheme to a one-stage data selector only, thereby reducing QSPI path delay.
When the security module does not exist, the OOB upgrade path of the Flash is that the BMC obtains QSPI control right by controlling the second data selector, the upgrade is directly executed, and only one level of data selector is arranged on the upgrade path.
The normal operation mode is also divided into two cases of whether the safety module exists or not.
The security module is present, the PCH accesses Flash through the first data selector channel, the security module is absent, and the PCH accesses Flash through the second data selector. In both cases, PCH accesses Flash only through a primary data selector, so that QSPI path delay is reduced.
Based on the above circuit diagram, note that in order to reduce the signal stub effect caused by the bifurcation of the common input pch_qspi of the first data selector and the second data selector, the first data selector and the second data selector are placed in the TOP and Bottom positions of the PCB. The PCH_QSPI is input into the data selector and is then perforated near the input pins of the data selector, and the output of the two data selectors is combined near the output end of the data selector through perforation. Thus, the Stub effect of the bus with the split QSPI wires on the PCH side and the Flash side is reduced.
When the security module is present, the QSPI access path of the BIOS may be as follows:
OOB security upgrade mode of Flash. The security module first turns off the OE of the first data selector, cutting off the output of the first data selector, at which time the OE output of the second data selector is enabled. And the BMC controls the SEL of the second data selector to take over the QSPI bus control right of the FLASH, and stores the file to be upgraded in the FLASH temporary storage partition. After the placement, the BMC informs the security module that the security upgrading process can be started, and after the security template receives an instruction sent by the BMC, the OE of the second data selector is closed, meanwhile, the OE of the first data selector is opened, and the first data selector is switched to be under the control of the security template, so that the security upgrading of the BIOS is executed.
Normal mode of operation. The second data selector OE is always disabled, the first data selector OE is always enabled, and the security module controls the SEL of the first data selector to select PCH output to control QSPI bus to access Flash.
It can be seen that whether the BMC places an upgrade file or the security module upgrades the BIOS, or the PCH normally accesses the Flash, the access path to the Flash only passes through the primary data selector, the QSPI access path is short, and the possible time sequence risk caused by overlarge QSPI delay due to cascade of the two-stage data selector in the prior art is well solved.
When the security module does not exist, namely the traditional BMC OOB upgrades the Bios Flash situation. The first data selector OE is set to an Disable state, and the second data selector OE is always enabled. When the OOB of the BIOS is updated, the BMC selects the SEL of the second data selector as BMC control, so that the Flash is updated by the direct OOB; when operating normally, the BMC selects the SEL of the second data selector as PCH control. The Flash operation is only one-level data selector in this case.
Therefore, in this embodiment, the first data selector and the second data selector are arranged in parallel, so that when the security module exists, the BMC or the security module can access Flash through the first-level data selector, and BIOS is updated; when the security module does not exist, flash can be accessed only through the primary data selector, so that the data selector in the path is reduced, and the time delay of the whole process is reduced.
The following describes a BIOS upgrade device provided in the embodiments of the present application, and the BIOS upgrade device described below and the BIOS upgrade method described above may be referred to correspondingly.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a BIOS upgrade device according to an embodiment of the present application.
In this embodiment, the apparatus may include:
a security module judging unit 100 for judging whether the security module exists;
the in-band upgrading unit 200 is used for controlling the BMC to store the file to be upgraded into the Flash through the second data selector when the security module exists; when the file to be upgraded is stored in Flash, the control security module performs BIOS upgrading according to the file to be upgraded through the first data selector;
the out-of-band upgrade unit 300 is configured to control the BMC to perform out-of-band upgrade on the BIOS through the second data selector when the security module is not present.
Optionally, the in-band upgrade unit 200 is specifically configured to control the security module to turn off the output enable of the first data selector and turn on the output enable of the second data selector; the BMC is controlled to store the file to be upgraded into the Flash through the second data selector; when the file to be upgraded is stored in Flash, the security module is controlled to open the output enabling of the first data selector and close the output enabling of the second data selector; and the control security module performs BIOS upgrading according to the file to be upgraded through the first data selector.
Optionally, the apparatus may further include:
a first data access module for setting the enabling of the first data selector to an on state and setting the enabling of the second data selector to an off state when the security module is present; the control security module sets the output selection of the first data selector to be a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the first data selector.
Optionally, the out-of-band upgrade unit 300 is specifically configured to set the enabling of the first data selector to an off state; setting the enabling of the second data selector to an on state; the BMC is controlled to upgrade the BIOS out of band through the second data selector.
Optionally, the apparatus may further include:
a second data access module for setting the enabling of the first data selector to the off state and setting the enabling of the second data selector to the on state when the security module is not present; and controlling the BMC to set the output selection of the second data selector to be a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the second data selector.
The embodiment of the application also provides a server, which comprises:
a memory for storing a computer program;
and the processor is used for realizing the steps of the BIOS upgrading method when executing the computer program.
Embodiments of the present application also provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the BIOS upgrade method as described above.
In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The above describes in detail a BIOS upgrading method, a BIOS upgrading device, a server and a computer readable storage medium provided in the present application. Specific examples are set forth herein to illustrate the principles and embodiments of the present application, and the description of the examples above is only intended to assist in understanding the methods of the present application and their core ideas. It should be noted that it would be obvious to those skilled in the art that various improvements and modifications can be made to the present application without departing from the principles of the present application, and such improvements and modifications fall within the scope of the claims of the present application.
Claims (7)
1. A method for upgrading a BIOS, comprising:
judging whether a security module exists or not;
if yes, the BMC is controlled to store the file to be upgraded into Flash through the second data selector; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector;
if not, controlling the BMC to upgrade the BIOS in an out-of-band manner through the second data selector; wherein the first data selector and the second data selector are arranged in parallel in a circuit;
the controlling the BMC to store the file to be upgraded into the Flash through the second data selector comprises the following steps: controlling the security module to close the output enable of the first data selector and open the output enable of the second data selector; controlling the BMC to store the file to be upgraded into the Flash through the second data selector;
when the file to be upgraded is stored in the Flash, controlling the security module to perform BIOS upgrade according to the file to be upgraded through a first data selector, including: when the file to be upgraded is stored in the Flash, controlling the security module to open the output enabling of the first data selector and closing the output enabling of the second data selector; controlling the security module to carry out BIOS upgrading according to the file to be upgraded through a first data selector;
the controlling the BMC to upgrade the BIOS out of band through the second data selector includes: setting an enable of the first data selector to an off state; setting the enabling of the second data selector to an open state; and controlling the BMC to upgrade the BIOS out of band through the second data selector.
2. The BIOS upgrade method of claim 1, further comprising, when the BIOS upgrade is complete:
setting the enabling of the first data selector to an on state and setting the enabling of the second data selector to an off state when the security module is present;
and controlling the security module to set the output selection of the first data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the first data selector.
3. The BIOS upgrade method of claim 1, further comprising, when the out-of-band upgrade is complete:
setting the enabling of the first data selector to a closed state and setting the enabling of the second data selector to an open state when the security module is not present;
and controlling the BMC to set the output selection of the second data selector as a QSPI bus corresponding to the PCH so that the PCH accesses the Flash through the second data selector.
4. The BIOS upgrade method of claim 1, wherein the first data selector and the second data selector are respectively disposed at a TOP layer and a Bottom layer at the same location in a PCB board.
5. A BIOS upgrade device, comprising:
the safety module judging unit is used for judging whether the safety module exists or not;
the in-band upgrading unit is used for controlling the BMC to store the file to be upgraded into the Flash through the second data selector when the security module exists; when the file to be upgraded is stored in the Flash, controlling the safety module to conduct BIOS upgrading according to the file to be upgraded through a first data selector;
the out-of-band upgrading unit is used for controlling the BMC to carry out-of-band upgrading on the BIOS through the second data selector when the security module does not exist;
the in-band upgrading unit is specifically configured to control the security module to close output enable of the first data selector and open output enable of the second data selector; controlling the BMC to store the file to be upgraded into the Flash through the second data selector;
the in-band upgrading unit is specifically configured to control the security module to turn on output enable of the first data selector and turn off output enable of the second data selector when the file to be upgraded is stored in the Flash; controlling the security module to carry out BIOS upgrading according to the file to be upgraded through a first data selector;
the out-of-band upgrading unit is specifically configured to set the enabling of the first data selector to a closed state; setting the enabling of the second data selector to an open state; and controlling the BMC to upgrade the BIOS out of band through the second data selector.
6. A server, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the BIOS upgrade method as claimed in any one of claims 1 to 4 when executing said computer program.
7. A computer readable storage medium, characterized in that the computer readable storage medium has stored thereon a computer program which, when executed by a processor, implements the steps of the BIOS upgrade method according to any one of claims 1 to 4.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103460175A (en) * | 2011-01-31 | 2013-12-18 | 纳米技术方案公司 | Three-dimensional man/machine interface |
| CN104007924A (en) * | 2013-02-23 | 2014-08-27 | 三星电子株式会社 | Method and apparatus for operating object in user device |
| CN108170495A (en) * | 2018-01-29 | 2018-06-15 | 郑州云海信息技术有限公司 | A kind of BIOS upgrade methods, system, equipment and computer readable storage medium |
| CN210573744U (en) * | 2019-10-18 | 2020-05-19 | 中科可控信息产业有限公司 | BMC online upgrading device for multiple FPGA chips |
| CN111488161A (en) * | 2020-04-02 | 2020-08-04 | 深圳宝龙达信创科技股份有限公司 | BIOS upgrading system |
| WO2020211016A1 (en) * | 2019-04-17 | 2020-10-22 | 华为技术有限公司 | Device upgrade method and related device |
| CN112559004A (en) * | 2020-11-19 | 2021-03-26 | 山东云海国创云计算装备产业创新中心有限公司 | BIOS upgrading method, device, equipment and medium |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005026951A1 (en) * | 2003-09-18 | 2005-03-24 | Aristocrat Technologies Australia Pty Ltd | Bios protection device |
| CN111694579B (en) * | 2019-03-11 | 2021-10-29 | 宁德时代新能源科技股份有限公司 | Remote upgrading method of energy storage system, energy management system and battery management system |
-
2021
- 2021-05-14 CN CN202110528021.0A patent/CN113238788B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103460175A (en) * | 2011-01-31 | 2013-12-18 | 纳米技术方案公司 | Three-dimensional man/machine interface |
| CN104007924A (en) * | 2013-02-23 | 2014-08-27 | 三星电子株式会社 | Method and apparatus for operating object in user device |
| CN108170495A (en) * | 2018-01-29 | 2018-06-15 | 郑州云海信息技术有限公司 | A kind of BIOS upgrade methods, system, equipment and computer readable storage medium |
| WO2020211016A1 (en) * | 2019-04-17 | 2020-10-22 | 华为技术有限公司 | Device upgrade method and related device |
| CN210573744U (en) * | 2019-10-18 | 2020-05-19 | 中科可控信息产业有限公司 | BMC online upgrading device for multiple FPGA chips |
| CN111488161A (en) * | 2020-04-02 | 2020-08-04 | 深圳宝龙达信创科技股份有限公司 | BIOS upgrading system |
| CN112559004A (en) * | 2020-11-19 | 2021-03-26 | 山东云海国创云计算装备产业创新中心有限公司 | BIOS upgrading method, device, equipment and medium |
Non-Patent Citations (1)
| Title |
|---|
| STM32在复杂系统中实现固件自动升级的方法;宋宇宁;;单片机与嵌入式系统应用(第11期);28-32 * |
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