CN113158441A - Method for improving signal grabbing precision in chip tester - Google Patents
Method for improving signal grabbing precision in chip tester Download PDFInfo
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Abstract
The invention relates to the technical field of chip testing machines, in particular to a method for improving signal grabbing precision in a chip testing machine. The method is characterized by comprising the following steps: s1, taking an ideal change point; s2, sampling the sample points, respectively detecting and scanning each sample point and each ideal change point, and recording each detection scanning result; s3, repeating the step S2 for a plurality of times; s4, establishing a statistical data model; s5, obtaining a real change point; s6, repeating the steps S2-S5; s7, calculating the integral deviation time of the signal; s8, the whole deviation time is compensated at the signal input end. Compared with the prior art, all points in a time period are taken, multi-point and multi-time scanning is carried out on all the points to obtain the positions of a plurality of real points, then the plurality of real points are averaged to cover the condition that signals change at each position in a period, the distribution of the signals is fully considered, the accurate positions of the signal changes are obtained to compensate, and therefore the signal grabbing precision is improved.
Description
Technical Field
The invention relates to the technical field of chip testing machines, in particular to a method for improving signal grabbing precision in a chip testing machine.
Background
Because the paths of the channels of the chip tester are different, the time for the signals to reach the tail ends of the channels is different, so that the signals which are transmitted slowly need to be compensated, and the time for the signals to reach the tail ends of the channels is ensured to be consistent. The compensation requires precise capture of the location of the signal change, but because of the uncertainty of the signal, the signal will be skewed every capture. As shown in fig. 1, the ideal signal is a straight line at the time of the rising or falling change of the signal. In practical applications, the actual signal, as shown in fig. 2, has a deviation from each variation, which causes an accuracy problem in the case of high repeatability. The signal in the chip tester has deviation in each change mainly due to two reasons, one is limited by the precision of devices in the FPGA of the chip tester and on a transmission line, so that the signal actually shakes within a range, and the factor is circuit characteristics and is difficult to eliminate. Secondly, the minimum unit of the signals generated by the chip tester is a fixed value of 100ps, and the time for generating the signals is discontinuous. For example, it is desirable to produce a rising or falling edge that is a multiple of 100ps for 10ns, 10.1ns, 10.2ns, but not 10.05ns, 10.15ns, 10.25 ns. And 100ps itself is also a variable due to the accuracy limitations of the hardware. The chip tester system clock is 2ns, the signal needs to go 20 steps within a period of 2ns, and the 20 steps are different for each step of the signal due to the uncertainty of the minimum unit.
At present, the traditional method generally adopts average value, and the average value ignores the distribution of each signal, so that the obtained signal is not optimal, and the position precision of signal change is low.
When capturing a signal, if any one measurement result is processed as an actual signal of the signal, a deviation is inevitably caused. Since this is only one measurement, it would be another if the measurements were taken at other locations, times. If compensation is processed by randomly grabbing signals any time without optimization, when the test is repeatedly performed by converting different test points, the Edge Placement Accuracy (EPA) can only be +/-300Ps, and the EPA can only reach +/-200Ps by simple average processing, so that the signal stability is poor.
Therefore, the method for improving the signal capturing precision in the chip tester is designed, all points in a time period are taken, multi-point and multi-time scanning is carried out on all the points to obtain the positions of a plurality of real points, then the plurality of real points are averaged to cover the condition that the signal changes at each position in a period, the distribution of the signal is fully considered, the accurate position of the signal change is obtained to carry out compensation, and therefore the signal capturing precision is improved.
Disclosure of Invention
The invention provides a method for improving signal capturing precision in a chip tester, which overcomes the defects of the prior art, and comprises the steps of taking all points in a time period, carrying out multi-point and multi-time scanning on all the points to obtain the positions of a plurality of real points, averaging the real points to cover the change condition of signals in each position in one period, fully considering the distribution of the signals, obtaining the accurate positions of the signal changes to compensate, and improving the signal capturing precision.
In order to achieve the purpose, the method for improving the signal grabbing precision in the chip tester is characterized by comprising the following steps of:
s1, taking 21 points at 100ps time interval as ideal change points P of signal changen；
S2, with ideal changing point P1Taking 5 time points as sample points at 100ps time intervals in the previous and subsequent time periods, and calculating the ideal change point P for each sample point1Respectively carrying out detection scanning, and recording the detection scanning result of each time, wherein the detected signal change is recorded as P, and the undetected signal change is recorded as F;
s3, for each sample point and ideal change point P1Repeating the detection scanning of the step S2 for multiple times, and recording the detection scanning result of each detection scanning;
s4, establishing a statistical data model according to the scanning result, wherein the column of the statistical data model is according to each sample point and idealPoint of change P1The time sequence of the scanning sequence is sequenced, and the horizontal rows are sequenced according to the sequence of the signal change found by scanning;
s5, obtaining the ideal change point P according to the position of the signal change in the statistical data model1True change point V of signal change1；
S6, repeating the steps S2-S5, obtaining the real change point V of 21 ideal change pointsn；
S7, according to the ideal change point PnWith the true change point VnCalculating the integral deviation time Δ t of the signal;
s8, compensating the whole deviation time at the signal input end of the chip tester;
the step S5 is to obtain the actual change point V of the signal change1The method specifically comprises the following steps:
if the positions of the signal change points are consistent in multiple detection scans, taking the point as a real change point V of the signal change1(ii) a If the signal change points appear at a plurality of positions in a plurality of detection scans, the point with the largest number of times is taken as the real change point V of the signal change1。
In step S3, the number of repeated detection scans is 99.
The calculation formula of the overall deviation time Δ t in the step S7 is
。
Compared with the prior art, the method has the advantages that all points in a time period are taken, the positions of a plurality of real points are obtained by carrying out multi-point and multi-time scanning on all the points, then the plurality of real points are averaged to cover the change condition of signals in each position in the period, the distribution of the signals is fully considered, the accurate positions of the signal changes are obtained to carry out compensation, and therefore the signal grabbing precision is improved.
Drawings
FIG. 1 is a schematic diagram of a chip tester with ideal signal changes.
FIG. 2 is a schematic diagram of actual signal changes in a chip tester.
Fig. 3 is a statistical model of the data obtained in step S4 according to an embodiment of the present invention.
Fig. 4 is a table diagram of the ideal change point and the actual change point in step S6 according to the embodiment of the present invention.
Detailed Description
The first embodiment is as follows:
the embodiment is a method for improving the signal grabbing precision in a chip tester, which specifically comprises the following steps:
s1, taking 21 points at 100ps time interval as ideal change points P of signal changenAre each P1=10ns、P2=10.1ns、P3=10.2ns、P4=10.3ns、P5=10.4ns、P6=10.5ns、P7=10.6ns、P8=10.7ns、P9=10.8ns、P10=10.9ns、P11=11ns、P12=11.1ns、P13=11.2ns、P14=11.3ns、P15=11.4ns、P16=11.5ns、P17=11.6ns、P18=11.7ns、P19=11.8ns、P20=11.9ns、P21=12ns；
S2, with ideal changing point P110ns is taken as the center, 5 time points are respectively taken as sample points at 100ps time intervals in the front time and the rear time, the time points are respectively 9.5ns, 9.6ns, 9.7ns, 9.8ns, 9.9ns, 10.1ns, 10.2ns, 10.3ns, 10.4ns and 10.5ns, and each sample point and the ideal change point P are respectively used1Respectively carrying out detection scanning in 10ns, and recording detection scanning results, wherein the detected signal change is recorded as P, and the undetected signal change is recorded as F;
s3, carrying out 99 detection scans on the ideal change point P1 and 10 sample points, wherein 11 scanning results are obtained in each detection scan;
and S4, establishing a statistical data model according to the scanning result, sequencing columns of the statistical data model according to the time sequence of the ideal change point P1 and the 10 sample points, sequencing rows according to the sequence of the signal change found by scanning, and obtaining the statistical data model as shown in the figure 3.
S5, in the obtained statistical data model, it can be seen that the signal occurs at a certain pointAnd (4) changing. As can be seen from FIG. 3, when the signal change points occur at a plurality of positions, the point with the largest number of times is taken out, and 10.1ns is the true change point V of the signal change1。
S6, repeating the steps S2-S5, obtaining the real change point V of 21 ideal change pointsnAre each V2=9.9、V3=10、V4=9.7、V5=10.2、V6=10.3、V7=10.4、V8=10.4、V9=10.5、V10=10.6、V11=10.7、V12=10.8、V13=10.9、V14=11、V15=11.2、V16=11.3、V17=11.4、V18=11.5、V19=11.5、V20=11.6、V21=11.7, as shown in fig. 4.
S7, according to the ideal change point PnWith the true change point VnCalculating the integral deviation time Δ t of the signal,
；
s8, the whole deviation time t is compensated at the signal input end of the chip tester.
In step S1, the minimum unit for the chip tester signal to be implemented is 100ps, and the signal has a period of 2ns, so that 21 points can be taken to cover the position where the signal appears in the whole period. This embodiment selects 21 points between 10-12ns, covering all the positions where the signal appears within one signal period.
In step S2, the reason for taking 5 points from left to right is 10 × 100ps =1ns, which completely covers the range of possible changes of the current signal. In the step, whether the signals rise in 11 time points is detected by using a comparison unit of a channel in the chip tester.
In step S4, the columns of the statistical data model are sorted according to the sequence of the signal changes found by scanning, rather than according to the time sequence of the detection scan. For example, in fig. 3, the first detection scan finds a level variation position of 10.1ns, and the second detection scan finds a level variation position of 9.9ns, then in the statistical data model, the results of the second detection scan are arranged in the row before the first detection scan, so as to build the statistical data model.
In step S5, if the positions of the signal change points coincide during the multiple detection scans, the point is taken as the true change point V of the signal changen。
In step S6, in practical applications, the signal may appear at any time step within one period, and the probability of appearing at any time step is equal. Therefore, in order to satisfy the requirement of the minimum positional deviation of 21 steps, the time deviation of each point is averaged to be used as a compensation value of the time signal deviation in the channel.
And after the step S8 compensates the whole deviation time t, testing the EPA of the channel of the chip testing machine, and measuring that the EPA is +/-120ps, thereby improving the signal grabbing precision compared with the simple average processing of the traditional method.
The method takes all points in a time period, performs multi-point and multi-time scanning on all the points to obtain the positions of a plurality of real points, averages the plurality of real points to cover the change condition of signals in each position in the period, fully considers the distribution of the signals, obtains the accurate position of the signal change, and compensates, thereby improving the signal capturing precision.
Claims (3)
1. A method for improving the precision of signal grabbing in a chip tester is characterized by comprising the following steps:
s1, taking 21 points at 100ps time interval as ideal change points P of signal changen；
S2, with ideal changing point P1Taking 5 time points as sample points at 100ps time intervals in the previous and subsequent time periods, and calculating the ideal change point P for each sample point1Respectively carrying out detection scanning, and recording the detection scanning result of each time, wherein the detected signal change is recorded as P, and the undetected signal change is recorded as F;
s3, for each sample point and ideal change point P1Repeating the detection scanning of the step S2 for multiple times, and recording the detection scanning result of each detection scanning;
s4, establishing a statistical data model according to the scanning result, wherein the column of the statistical data model is arranged according to each sample point and the ideal change point P1The time sequence of the scanning sequence is sequenced, and the horizontal rows are sequenced according to the sequence of the signal change found by scanning;
s5, obtaining the ideal change point P according to the position of the signal change in the statistical data model1True change point V of signal change1；
S6, repeating the steps S2-S5, obtaining the real change point V of 21 ideal change pointsn；
S7, according to the ideal change point PnWith the true change point VnCalculating the integral deviation time Δ t of the signal;
s8, compensating the whole deviation time at the signal input end of the chip tester;
the step S5 is to obtain the actual change point V of the signal change1The method specifically comprises the following steps:
if the positions of the signal change points are consistent in multiple detection scans, taking the point as a real change point V of the signal change1(ii) a If the signal change points appear at a plurality of positions in a plurality of detection scans, the point with the largest number of times is taken as the real change point V of the signal change1。
2. The method of claim 1 for improving accuracy of signal capture in a chip tester, wherein: in step S3, the number of repeated detection scans is 99.
3. The method of claim 1 for improving accuracy of signal capture in a chip tester, wherein: the calculation formula of the overall deviation time Δ t in the step S7 is
。
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| TW110127216A TWI765786B (en) | 2021-03-31 | 2021-07-23 | Method of increasing accuracy of signal acquisition in chip testing equipment |
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