CN113132172A - Error code testing method and device, storage medium and electronic device - Google Patents
Error code testing method and device, storage medium and electronic device Download PDFInfo
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- H—ELECTRICITY
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- H—ELECTRICITY
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Abstract
The invention provides an error code testing method, an error code testing device, a storage medium and an electronic device, wherein the error code testing method comprises the following steps: generating an analog code stream in an error code detection device, filling data in a payload in the analog code stream with a PRBS code stream, inserting a characteristic bit corresponding to the service type into a corresponding position in the analog code stream according to the service type of the work of the photoelectric device, and carrying out error code detection on the analog code stream to obtain error code information. The invention solves the problems that the error code instrument and the service meter are required to be used for testing when the characteristics of the photoelectric device are verified, so that the instrument resource investment is large, the processing is complex, the testing period is long, the error code detection efficiency is improved, and the detection cost is reduced.
Description
Technical Field
The invention relates to the field of communication, in particular to an error code testing method and device of a photoelectric device, a storage medium and an electronic device.
Background
In the evaluation test of the photoelectric device, an error code meter or an arbitrary waveform generator is a necessary option as an excitation source as a standard signal source. After the device-level system is integrated, the system transmission performance of a service level is analyzed at the optical module level, and a service table is used as a judgment basis for service analysis in a consistency test. Service table in 802.3 protocol ethernet service and ITU-T frame structure analysis, error code testing is a core test, which is the final goal of performance verification after system integration.
With the selection of service types such as 50G 4 level Amplitude Modulation (PAM 4 for short), 12.5G PAM4 and 56GPAM4 by the market, when entering the practical application stage, a link pre-Correction Error code greater than 1.0E-8 is a normalized scenario, and the analysis of Error Correction capability of Forward Error Correction Codes (FEC for short) such as KR4(Reed-Solomon Codes, RS (528,514), namely Reed-Solomon Codes (528,514)) and KP4(Reed-Solomon Codes, RS (544,514), namely Reed-Solomon Codes (544,514)) is a main function of the service table.
The basis for analyzing the service error correction capability in the service table is an FEC error correction algorithm, which generally quantizes the FEC error correction capability by using the error rate, which refers to the ratio of the number of received error bits/the total number of received bits. In practical application, the bit error rate distribution analysis is matched with the bit error rate absolute value analysis to be a complete description of the link error code performance.
The core of the error analysis of the service table is to determine the transmission performance, i.e. the error correction capability, of the actual service on the link by means of the FEC actual error correction algorithm under the complete frame structure. But when the characteristics of the photoelectric device are verified, an error code meter and a service table are required to be used for testing simultaneously to verify the FEC error correction capability of a link, so that the instrument resource investment is large, the processing is complex, and the testing period is long.
Disclosure of Invention
The embodiment of the invention provides a method and a device for realizing a service processing function in an error code instrument in a simulation manner, which are used for at least solving the problems that the instrument resource investment is large, the processing is complex and the testing period is long because the error code instrument and a service meter are required to be used for testing when the characteristics of a photoelectric device are verified in the related technology.
According to an embodiment of the present invention, there is provided an error code testing method, including:
generating an analog code stream according to the service type of the work of the photoelectric device, wherein data in a payload in the analog code stream is filled with a pseudo-random binary sequence (PRBS) code stream, and other positions in the analog code stream are filled with characteristic bits corresponding to the service type;
and carrying out error code detection on the analog code stream to obtain error code information.
According to another embodiment of the present invention, there is provided an error code testing apparatus including:
the code stream generating module is used for generating an analog code stream according to the service type of the work of the photoelectric device, wherein data in an effective load in the analog code stream is filled by a PRBS code stream, and other positions in the analog code stream are filled by characteristic bit bits corresponding to the service type, and the code stream generating module also comprises a code stream testing module which is used for detecting error code information of the analog code stream.
The embodiment of the present invention further provides a computer-readable storage medium, which includes a stored error detection program, where the error detection program executes the method described in any one of the above.
An embodiment of the present invention further provides an electronic device, including a memory and a processor, where the memory stores an error detection computer program, and the processor is configured to execute the computer program to perform any of the steps in the method.
According to the invention, because the PRBS bit interleaving method is applied to simulate the actual service in the process of editing the code stream, the error code distribution is directly detected by using the FEC principle without an FEC encoding and decoding method, the error code instrument is not limited to an instrument, the invention is also suitable for a discrete system built by a core device, the problem that the error code instrument and a service table are required to be used for testing when the characteristics of a photoelectric device are verified is solved, the instrument resource investment is large, the processing is complex, the testing period is long, the error code detection efficiency is improved, and the testing cost is reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
fig. 1 is a flow chart of an error detection method according to an embodiment of the present invention;
fig. 2 is a flowchart of an error detection method according to a first embodiment of the present invention;
FIG. 3 is a diagram of an analog code stream structure according to an embodiment of the invention;
fig. 4 is a schematic diagram of a 50GE service frame structure according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an error detection device according to an embodiment of the present invention;
fig. 6 is a block diagram of a hardware configuration of an electronic apparatus according to an embodiment of the present invention.
Detailed Description
The invention will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Example 1
The method provided by the first embodiment of the present application may be executed in a mobile terminal, a computer terminal, or a similar computing device.
In this embodiment, a method applied to an error detecting device is provided, and the error detecting device may be an error detector. Fig. 1 is a flowchart of an error detection method according to an embodiment of the present invention, and as shown in fig. 1, the flowchart includes the following steps:
step S101, generating an analog code stream according to the service type of the work of the photoelectric device, wherein data in an effective load in the analog code stream is filled with a PRBS code stream, and other positions in the analog code stream are filled with characteristic bits corresponding to the service type;
specifically, the method comprises the step of setting the code stream rate of the error code meter according to the bandwidth parameter of the photoelectric device to be tested. According to the bandwidth characteristics of the photoelectric device, a proper pseudo-random binary sequence (PRBS) code stream rate is selected to correspond to ensure that a service link can work normally, and the PRBS code stream rate capable of ensuring that the service link works normally is set as the code stream rate of the error code meter, which is the first step of simulating actual service by using the error code meter.
As shown in FIG. 3, in ROW1, data code stream is sent from left to right, wherein bits 2 to 64 are certain bits and cannot be changed. Payload (payload) portion data is padded with the PRBS code stream.
The PRBS code stream sequence is a pseudo-random binary sequence between (0, 1). The basic generation and principle are as follows:
function bits (numbits) -is the number of bits to be generated; bits is a binary sequence
bits＝randn(1,numbits)<0.5；
Use of PRBS codes in high speed design in order to test the bit error rate of high speed serial channel transmissions, testing is typically performed by transmitting PRBS codes.
Physical layer testing of a serial bus is generally divided into transmitter testing and receiver testing, also known as TX testing and RX testing. Transmitter testing typically includes eye diagram, jitter, signal waveform, amplitude, rise and fall times, etc. test items, and receiver testing typically includes bit error rate, jitter tolerance, receiver sensitivity, etc. test items. For eye diagram testing, bit error rate and jitter tolerance testing, the most common test codes are PRBS, mainly PRBS7, PRBS15, PRBS23 and PRBS 31.
The service types in which the optoelectronic device operates include one or more of the following service types: 50G PAM4, 12.5G PAM4 and 56GPAM 4.
Taking the 50G PAM4 type as an example, and defining the 50GE service frame structure by IEEE802.3 as an example, the decomposition of each part of the frame structure is shown in fig. 4.
The 50GE service frame structure comprises a frame header and other structures, wherein the frame header occupies 7 bytes, a start frame delimiter occupies 1 byte, a single/group address bit, a global/local execution bit and a target address occupy 6 bytes, a source address occupies 6 bytes, a length/type indication bit occupies 2 bytes, a data/logic link control protocol structure occupies 46-1500 bytes, and a Frame Check Sequence (FCS) occupies 4 bytes.
The applied service frame structure performs fixed bit interpolation according to the protocol, and simulates the frame length of the real service, such as the payload filling structure of fig. 4.
And 102, detecting error code information of the analog code stream.
Specifically, after the code pattern design is finished, although the analog service has no FEC processing function, the error code analyzer can analyze bit-level error code characteristics after transmission by using the edited frame structure to obtain error code information of the analog code stream.
Connecting a photoelectric device to be tested to a physical service link, connecting the service link, and directly correlating the error code characteristic of the service link with a DUT (device under test), so that the performance of the DUT on a specific service in the specific service link can be evaluated;
the error code information includes error code bit information, error code occurrence number information, error code position information, and the like.
And after obtaining the bit error code bit information, analyzing the statistical error code distribution, and confirming the distribution of the error codes in the whole data stream, including the error code generation quantity and the error code generation position. The bit error of each bit can be seen. The error code bits are analyzed, and the error code number of each code word (codeword) is easy to accurately know. The error numbers can completely show the error distribution.
Based on the error information, it can be confirmed whether the error generation is a random error code or a burst error code.
Preferably, as shown in fig. 2, the method further comprises the steps of:
s103, correcting the link parameter information of the photoelectric device according to the error code information, and then detecting the error code information of the analog code stream.
Specifically, taking KP4FEC as an example, each 16 continuous bit errors are equivalent to uncorrectable errors, and the block errors can not be accurately described only by using the error rate, and hardware debugging is required to eliminate the block errors. By correcting link parameters and optimizing the error rate, taking KP4 as an example, when the error code of each code word is less than 15 bits, the error-free link transmission after error correction can be realized. And the characteristic that the error code is distributed to the bit level can be used for pulling through the actual service level for the evaluation of the error code meter on the link damage, and the service flow analysis function of the error code meter is expanded. The analysis method with error code distribution as the core is also the key of the performance analysis of the device and system integration level, and the expanded error code instrument function can directly provide the verification of the service flow level in the device verification and the integrated component verification. This is consistent with the FEC error correction mechanism.
Through the steps, in the process of editing the code stream, the PRBS bit interpolation method is applied to simulate the actual service, the FEC principle is utilized to directly detect the error code distribution, and an FEC encoding and decoding method is not needed.
Optionally, the executing subject of the above steps may be an error detecting device, including an error detector, etc., but is not limited thereto.
Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
Example 2
In this embodiment, an error detection device is further provided, and the error detection device is used to implement the foregoing embodiments and preferred embodiments, which have already been described and are not described again. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 5 is a block diagram of a structure of an error code detection apparatus according to an embodiment of the present invention, and as shown in fig. 5, the apparatus includes a code stream generation module, configured to generate an analog code stream according to a service type of a work of the optoelectronic device, where data in a payload in the analog code stream is filled with a PRBS code stream, and other positions in the analog code stream are filled with feature bits corresponding to the service type;
and the code stream testing module is used for detecting the error code information of the analog code stream.
The device comprises all the modules shown in fig. 5, and further comprises a rate setting module for setting the code stream rate of the analog code stream according to the bandwidth parameter of the photoelectric device, so as to ensure that a service link can work normally.
Preferably, the apparatus further comprises an error code analyzing module for determining the type of the identified error code according to the error code information.
Preferably, the device further comprises a correction module, configured to detect error code information of the analog code stream after correcting the link parameter information of the optoelectronic device according to the error code information.
And when the error code information does not meet the set condition, repeating the step of correcting the link parameter information, and continuously detecting the error code information of the analog code stream until the error code information meets the set condition.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
The embodiment of the present invention further provides a computer-readable storage medium, which includes a stored error detection program, where the error detection program executes the method described in any one of the above.
Alternatively, in the present embodiment, the storage medium may be configured to store program codes for performing the following steps:
optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing program codes, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
An embodiment of the present invention further provides an electronic device, which includes a memory and a processor, and is characterized in that the memory stores therein an error detection computer program, and the processor is configured to execute the computer program to perform any of the steps of the above methods. For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and optional implementation manners, and details of this embodiment are not described herein again.
Fig. 6 is a block diagram of a hardware structure of an electronic device of an error code testing method according to an embodiment of the present invention. As shown in fig. 6, error testing electronics 10 may include one or more (only one shown) processors 102 (processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA), and memory 104 for storing data. It will be understood by those skilled in the art that the structure shown in fig. 6 is only an illustration and is not intended to limit the structure of the electronic device. For example, the error testing electronics 10 may also include more or fewer components than shown in FIG. 6, or have a different configuration than shown in FIG. 6.
The memory 104 may be used to store software programs and modules of application software, such as program instructions/modules corresponding to the error code method in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by executing the software programs and modules stored in the memory 104, so as to implement the method described above. The memory 104 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, memory 104 may further include memory located remotely from processor 102, which may be connected to error testing electronic device 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
It will be apparent to those skilled in the art that the modules or steps of the present invention described above may be implemented by a general purpose computing device, they may be centralized on a single computing device or distributed across a network of multiple computing devices, and alternatively, they may be implemented by program code executable by a computing device, such that they may be stored in a storage device and executed by a computing device, and in some cases, the steps shown or described may be performed in an order different than that described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple ones of them may be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. An error code testing method of a photoelectric device is characterized by comprising the following steps:
generating an analog code stream according to the service type of the work of the photoelectric device, wherein data in an effective load in the analog code stream is filled by a PRBS code stream, and other positions in the analog code stream are filled by characteristic bits corresponding to the service type;
and carrying out error code detection on the analog code stream to obtain error code information.
2. The method of claim 1, wherein the traffic types include one or more of the following traffic types: 50G PAM4, 12.5G PAM4 and 56GPAM 4.
3. The method of claim 1, wherein the method further comprises: and setting the code stream rate of the analog code stream according to the bandwidth parameter of the photoelectric device.
4. The method of claim 1, wherein the method further comprises: and confirming the error code type according to the error code information.
5. The method of claim 4, wherein the error types include one or more of the following error types: random error code, burst error code.
6. The method of claim 1, wherein the method further comprises: and after the parameter information of the link where the photoelectric device is located is corrected according to the error code information, detecting the analog code stream to obtain the error code information.
7. The method of claim 6, wherein the method further comprises: when the error code information does not meet the set condition, repeating the following steps: and after correcting the link parameter information of the photoelectric device according to the error code information, detecting the analog code stream to obtain the error code information.
8. An error detection device, comprising:
a code stream generation module, configured to generate an analog code stream according to a service type of the operation of the optoelectronic device, where data in a payload in the analog code stream is filled with a PRBS code stream, and other positions in the analog code stream are filled with feature bits corresponding to the service type;
and the code stream testing module is used for detecting the error code information of the analog code stream.
9. A computer-readable storage medium comprising a stored error detection program, wherein the error detection program when executed performs the method of any of claims 1 to 7.
10. An electronic device comprising a memory and a processor, wherein an error detection computer program is stored in the memory, and wherein the processor is configured to execute the computer program to perform the method of any of claims 1 to 7.
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