CN112992079B - Method for improving display image quality and display device - Google Patents
Method for improving display image quality and display device Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/1336—Illuminating devices
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Abstract
The invention discloses a method for improving display image quality, which comprises the following steps: a mini LED is adopted as a backlight module of the display device; setting the time difference of the input signals of the backlight module and the display panel; the effect of the response time of the display panel is improved by a predetermined adjustment to achieve a better high contrast synchronous display. The invention also provides a display device, which adopts the method for improving the display image quality to improve the display image quality, specifically improves the problem of non-synchronization caused by slow response time of the LCD, improves the response time, further improves the picture smear and the like, and realizes better high-contrast synchronous display of the display device.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a method for improving display image quality and a display device.
Background
The general liquid crystal display device mainly includes a source driving circuit, a gate driving circuit, a horizontal direction circuit Board (X-Board, abbreviated as XB) disposed On a liquid crystal Panel (Panel), a System On Chip (SOC), a Timing Controller (TCON), and a flexible flat cable (Flexible Flat Cable, abbreviated as FFC) disposed On a System Board or Main Board (Main Board, abbreviated as MB), wherein the System On Chip receives an image data signal to be transmitted and outputs the image data signal to be transmitted, and then processes the input signal through a row expansion module and a column expansion module, and transmits the processed data to the Timing controller, which transmits the received data to the source driving circuit and the gate driving circuit through the horizontal direction circuit Board, thereby driving the Panel to display.
The display field is connected with two large application directions of Mini LEDs (Mini LEDs or Mini-LEDs) for small-space display and Mini LEDs such as Mini LED backlight of LCD, and becomes the most popular topic at present. Mini-LEDs are small-spacing LED products with the spacing between 2.5 mm and 0.1 mm, and the small-spacing LEDs also refer to LED backlight sources or display screen products with the spacing between adjacent LED lamp bead points below 2.5 mm. Compared with the traditional backlight source, the light-emitting wavelength of the small-space LED backlight source is more concentrated, the response speed is faster, the service life is longer, and the system light loss can be reduced from 85% to 5% of that displayed by the traditional backlight source.
As a current major display device, a Liquid Crystal Display (LCD) has a response time as a natural "defect" of the liquid crystal display, and there is no good solution. The response time refers to the response speed of the LCD display to an input signal, that is, the response time of the liquid crystal from dark to bright or from bright to dark, and is generally divided into Rising and Falling parts, i.e., the sum of the Rising and Falling parts. In addition, frame or frame time (frame time or frame time) data represents the time interval between each frame, and the smoother this parameter, the smoother the overall display.
The response time of the liquid crystal display panel is generally 5-30ms under the condition of voltage driving, and the response speed has the problem of smear when displaying dynamic pictures, so that the image quality of the panel is reduced and the ornamental value is poor. The common solution is overdrive or Over-drive (OD), which can improve the response time of the liquid crystal, but easily causes the overdrive voltage to be too high, and bright edges; in addition, the backlight of the existing LCD is normally bright, and signal delay of tens of milliseconds can be perceived by human eyes when displaying dynamic pictures, so that picture smear is caused, and the problem of OD post-derivative occurs.
Disclosure of Invention
To overcome at least some of the disadvantages and drawbacks of the related art, an aspect of an embodiment of the present disclosure provides a method of improving display image quality, including:
a mini LED is adopted as a backlight module of the display device;
setting the time difference of the input signals of the backlight module and the display panel;
the effect of the response time of the display panel is improved by a predetermined adjustment to achieve a better high contrast synchronous display.
In one embodiment of the present disclosure, the display panel is an LCD; the preset adjusting mode is to control the time of input signals of a mini LED backlight module (mini LED Plate) and the time of input signals of an LCD relatively independently, and the mini LED backlight module (mini LED Plate) and the LCD are provided with display control circuits.
The display control circuit comprises a display control IC, a signal conversion circuit, a level conversion circuit and other necessary parts; the signal conversion circuit is configured to receive a reference timing signal (e.g., STV, CKV) and an interface signal (e.g., P2P including RGB data) including image data via a connector, generate a source control signal and a second interface type image data signal (e.g., mini-LVDS) to the source driving circuit Gate COF according to the P2P interface signal, and generate an initial Gate control signal (e.g., st_in, ckx_in, lc_in, reset_in) to a level conversion circuit according to the reference timing signal STV, CKV.
The preset adjusting mode is to control the time difference of STV signals of the mini LED Plate and the LCD; the time difference can improve the influence of the liquid crystal response time of the LCD panel, thereby improving the picture smear.
The time difference is a time difference DeltaT designed for the display control IC; the reference timing signals STV of the mini LED Plate and LCD are output to a Gate COF or a Gate driving circuit GOA according to the setting of DeltaT, so that the delay of DeltaT time is generated by superposition.
The display control IC changes the time of the rising and Falling by controlling the time difference DeltaT between the min LED plate and the LCD so as to improve the image quality caused by the response time of the liquid crystal, thereby improving the image quality of the final output image.
When the delta T is different, the response time of the Raishing and the Failling is different; when the delta T time is prolonged, the rising time is reduced, and the Falling time is increased; the DeltaT is an optimal time difference design value in the interval of 4-6ms, and the time of the pulling and the Falling is less than 5ms, preferably.
In one embodiment of the present disclosure, the predetermined adjustment manner is to set and create a time difference between the rising and Falling by using the OD Table in the mini LED Plate and the LCD Tcon IC, so as to achieve the effect of improving the response time; the time difference is equal to one frame.
The input time difference between the mini LED Plate and the LCD is kept synchronous or displayed integrally; the OD gray scale of the Rising area of mini LED Plate OD Table is set to be equal to the initial gray scale; the OD gray scale of the rolling area of mini LED Plate OD Table is set to be equal to the initial gray scale; and setting the OD gray level of the rolling area of the LCD OD Table to be equal to the initial gray level.
The adjusting mode is to control and reduce the opening time delta T of mini LED Plate, improve the time of LCD drawing and rolling, so as to improve the image quality caused by the response time of liquid crystal, and finally improve the image quality of the output image.
When the delta T is different, the response time of the Raishing and the Failling is different; when the refresh frequency of the display panel is 60HZ, one frame time is 16.67ms, and the rising and Falling times are 0; when the refresh frequency of the display panel is 120HZ, one frame time is 8.3ms, and the response time is greatly improved when the rising and Falling times are 0.58 ms.
In another aspect, the embodiments of the present disclosure further provide a display device, and the display image quality is improved by adopting any one of the methods for improving the display image quality disclosed in the foregoing disclosure, which is not described herein again.
In the method for improving the display image quality and the display device, the time difference delta T between the STV signals of the mini LED Plate and the LCD is controlled by the time staggering of the mini LED Plate and the LCD, the time difference between the rising and the falling is created by using the OD Table in the mini LED Plate and the LCD Tcon IC, and the like, so that the problem of asynchronous caused by slow response time of the LCD is solved, the response time is improved, the picture smear is further improved, and the like, and the better high-contrast synchronous display of the display device is realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a schematic diagram of a method for improving display image quality according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram of a display device according to an embodiment of the disclosure;
FIG. 3 is a schematic diagram of an active matrix display device according to an embodiment of the disclosure;
FIG. 4a is a schematic diagram of a liquid crystal response of an LCD without OD in an embodiment of the present disclosure;
FIG. 4b is a schematic diagram of the liquid crystal response of an LCD with OD in one embodiment of the present disclosure;
FIG. 5a is an LCD over OD waveform intent in an embodiment of the present disclosure;
FIG. 5b is a schematic diagram of an LCD over OD bright side screen according to an embodiment of the disclosure;
FIG. 6 is a schematic diagram of backlight and LCD luminance versus time in an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a mini LED Plate versus LCD time difference in an embodiment of the present disclosure;
FIG. 8 is a schematic diagram of display control logic in an embodiment of the present disclosure;
FIG. 9 is a schematic diagram of a display control brightness waveform according to an embodiment of the disclosure;
FIG. 10 is a schematic diagram of a mini LED Plate and LCD timing design in accordance with another embodiment of the present disclosure;
FIG. 11 is a schematic diagram of display control logic in accordance with another embodiment of the disclosure;
FIG. 12 is a schematic view of a display control brightness waveform according to another embodiment of the disclosure;
fig. 13a is a waveform diagram of a mini LED Plate versus LCD time difference at Δt=0 in an embodiment of the present disclosure;
fig. 13b is a schematic diagram of the waveforms finally displayed by the LCD when Δt=0 in the embodiment of the present disclosure;
fig. 14a is a waveform diagram of the mini LED Plate and LCD time difference at Δt=2 in the embodiment of the present disclosure;
fig. 14b is a schematic diagram of the waveform finally displayed by the LCD when Δt=2 in the embodiment of the present disclosure;
fig. 15a is a waveform diagram of the mini LED Plate versus LCD time difference at Δt=4 in an embodiment of the present disclosure;
fig. 15b is a schematic diagram of the waveform finally displayed by the LCD when Δt=4 in the embodiment of the present disclosure;
fig. 16a is a waveform diagram of the mini LED Plate and LCD time difference at Δt=6 in an embodiment of the present disclosure;
fig. 16b is a schematic diagram of the waveforms finally displayed by the LCD when Δt=6 in the embodiment of the present disclosure;
fig. 17a is a waveform diagram of the mini LED Plate and LCD time difference at Δt=8 in the embodiment of the present disclosure;
fig. 17b is a schematic diagram of the waveform finally displayed by the LCD when Δt=8 in the embodiment of the present disclosure;
fig. 18a is a waveform diagram of the mini LED Plate and LCD time difference at Δt=10 in the embodiment of the present disclosure;
fig. 18b is a schematic diagram of the waveform finally displayed by the LCD when Δt=10 in the embodiment of the present disclosure;
FIG. 19 is a graph showing the response of the liquid crystal at different DeltaT in an embodiment of the disclosure;
fig. 20a is a waveform diagram of a mini LED Plate versus LCD time difference at Δt=0 in another embodiment of the present disclosure;
fig. 20b is a schematic diagram of waveforms finally displayed by the LCD when Δt=0 in another embodiment of the present disclosure;
fig. 21a is a waveform diagram of a mini LED Plate versus LCD time difference for Δt=2 in another embodiment of the present disclosure;
fig. 21b is a schematic diagram of waveforms finally displayed by the LCD when Δt=2 in another embodiment of the present disclosure;
fig. 22a is a waveform diagram of a mini LED Plate versus LCD time difference at Δt=4 in another embodiment of the present disclosure;
fig. 22b is a schematic diagram of waveforms finally displayed by the LCD when Δt=4 in another embodiment of the present disclosure;
fig. 23a is a waveform diagram of a mini LED Plate versus LCD time difference at Δt=6 in another embodiment of the present disclosure;
fig. 23b is a schematic diagram of waveforms finally displayed by the LCD when Δt=6 in another embodiment of the present disclosure;
fig. 24a is a waveform diagram of a mini LED Plate versus LCD time difference for Δt=8 in another embodiment of the present disclosure;
fig. 24b is a schematic diagram of waveforms finally displayed by the LCD when Δt=8 in another embodiment of the present disclosure;
fig. 25a is a waveform diagram of a mini LED Plate versus LCD time difference at Δt=10 in another embodiment of the present disclosure;
fig. 25b is a schematic diagram of waveforms finally displayed by the LCD when Δt=10 in another embodiment of the present disclosure;
FIG. 26 is a graph showing response curves of liquid crystals at different DeltaT according to another embodiment of the present disclosure.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but embodiments of the present invention are not limited thereto.
FIG. 1 is a schematic diagram showing steps of a method for improving display image quality according to an embodiment of the disclosure; the embodiment of the disclosure provides a method for improving display image quality, which comprises the following steps:
a mini LED Plate is adopted as a backlight module of a display device or a display;
setting the time difference of input signals of the backlight module and the display panel or the display device;
the influence of the response time of the display panel or the display device is improved by a predetermined adjustment mode to realize better high-contrast synchronous display.
In one embodiment of the present disclosure, as shown in fig. 2, fig. 2 is a schematic diagram of a display in an embodiment of the present disclosure, including a backlight module 401 and a display device 10; the display device 10 is, for example, an LCD, the backlight module 401 is, for example, a mini LED Plate, and the predetermined adjustment mode is to control the time of the input signals of the mini LED Plate and the LCD relatively independently.
In one embodiment of the present disclosure, as shown in fig. 3, fig. 3 is a schematic diagram of an active matrix display device in an embodiment of the present disclosure; one embodiment of the present application provides, for example, an active matrix display device 10 comprising: a display panel 111 having a gate driving circuit and a source driving circuit thereon; XB board 113 has thereon a drive circuit board assembly 1130, a system board 13 and a connector CL1. The active matrix display device 10 of the present embodiment is, for example, a TCONLESS LCD, and the system on chip on the system board is integrated with at least part of the functions of the conventional TCON chip, and the XB board is integrated with at least part of the functions of the conventional TCON chip, but the embodiment is not limited thereto.
The display panel 111 includes a display region 1111 and a gate driving circuit and a source driving circuit electrically connected to the display region 1111. A plurality of data lines DL, a plurality of gate lines GL, and a plurality of pixels P electrically connecting the data lines DL and the gate lines GL are disposed in the display region 1111; each pixel P is located at the intersection of the corresponding gate line GL and the data line DL. The Gate driving circuit includes, for example, two GOA (Gate-On Array) circuits 1113, where the two GOA circuits 1113 are located in the peripheral area of the display area 1111 and are separately located On opposite sides of the display area 1111, that is, the Gate driving circuit of the display panel 111 is a double-sided GOA circuit. Each GOA circuit 1113 is electrically connected to a gate line GL in the display area 1111 for providing a gate driving signal to each gate line GL in the display area 1111. The source driving circuit includes, for example, a plurality of COF (Chip-On-Flex) type source drivers 1115, such as twelve COF type source drivers 1115 shown in fig. 3; each COF type source driver 1115 is electrically connected to a data line DL in the display region 1111 for providing an image data signal to each data line DL. More specifically, the single COF type source driver 1115 includes, for example, a flexible circuit board and a source driver chip (source driver IC) provided on the flexible circuit board.
The XB board 113 may be a monolithic independent circuit board, or may be a plurality of parallel circuit sub-boards, and if the XB board is a plurality of parallel circuit sub-boards, the driving circuit board assembly 1130 may be disposed on any one of the circuit sub-boards, and each two adjacent circuit sub-boards in the plurality of circuit sub-boards are electrically connected with each other through a connector and a connector disposed respectively.
The present embodiment is illustrated with two circuit sub-boards, and the XB board 113 includes two circuit sub-boards 113a, 113b, and the two circuit sub-boards 113a, 113b are arranged on one side of the display panel 111 along the horizontal direction in fig. 3, that is, are row-direction driving circuit boards; the side of each of the circuit sub-boards 113a, 113b adjacent to the display area 1111 is provided with a connection interface of a COF type source driver 1115, for example, a mini-LVDS interface. As described above, the driving circuit board assembly 1130 is disposed on the circuit sub-board 113a, and specifically, the circuit sub-board 113a is provided with the display control circuit 1131, the connector CN1, the nonvolatile memory 1133, and the connector CN3. The circuit sub-board 113a is electrically connected to the display region 1111 through a plurality of, for example, seven COF type source drivers 1115, and is electrically connected to the GOA circuit 1113 on the right side of the display panel 111 by the rightmost COF type source driver 1115. The circuit sub-board 113b is provided with a connector CN4, and the circuit sub-board 113b is electrically connected to the display area 1111 through a plurality of, for example, five COF type source drivers 1115, and is electrically connected to the GOA circuit 1113 on the left side of the display panel 111 by the leftmost COF type source driver 1115. An electrical connection is made between connector CN3 of circuit sub-board 113a and connector CN4 of circuit sub-board 113b by connector CL2, where connector CL2 is, for example, a flexible circuit board or flexible flat cable (Flexible Flat Cable, FFC), so that signals generated on circuit sub-board 113a are transmitted to circuit sub-board 113b through connector CL 2.
Furthermore, the display control circuit 1131 is electrically connected to the first connector CN1, the connector CN3, and a plurality of seven COF source drivers 1115; in this way, the display control circuit 1131 is electrically connected to the seven COF type source drivers 1115 on the right side through the PCB (Printed Circuit Board ) traces on the circuit sub-board 113a, and is also connected to the five COF type source drivers 1115 on the left side through the connectors CN3, CL2, CN4 and PCB traces on the circuit sub-board 113 b. The XB board 113 is further provided with a plurality of Mini-LVDS interfaces, for example, the Mini-LVDS interfaces are disposed between the COF source driver 1115 and the display control circuit 1131, and the first connector includes a P2P interface, for example; the display control circuit 1131 may include a signal conversion circuit 11312, where the signal conversion circuit 11312 is electrically connected to the first connector CN1 and the Mini-LVDS interface, and is configured to receive a P2P interface signal containing image data via the first connector CN1, generate a source control signal and a second interface type image data signal according to the P2P interface signal, and output the source control signal and the second interface type image data signal to the source driving circuit through the Mini-LVDS interface, where the second interface type image data signal is a Mini-LVDS interface signal.
Further, the display control circuit 1131 includes, for example, a signal conversion circuit, a direct-current voltage conversion circuit, a level conversion circuit, a Gamma correction (Gamma correction) circuit, and the like. The signal conversion circuit electrically connects the connector CN1, the level conversion circuit, and the source driving circuit, and is configured to receive reference timing signals such as STV, CKV, and P2P interface signals containing image data (such as RGB data) via the connector CN1, generate source control signals such as TP, POL, and second interface type image data signals such as Mini-LVDS to the source driving circuit from the P2P interface signals, and generate initial gate control signals such as st_in, ckx_in, lc_in, reset_in to the level conversion circuit from the reference timing signals STV, CKV.
In the prior art, in order to match the signal sent by the SOC, the interface of the source driver needs to be adjusted correspondingly, for example, if the signal sent by the SOC is transmitted through the P2 interface, the corresponding source driver interface can only use the P2 interface, which may increase the overall manufacturing cost and the test cost. In this embodiment, if the connection CL1 transmits the signal from the SOC to the signal conversion circuit in the display control circuit 1131 through the P2P interface, the signal conversion circuit can convert the P2P interface signal into an interface signal corresponding to the panel source driver, for example, the COF type source driver interface 1115 is a Mini-LVDS interface, and correspondingly convert the P2P interface signal into a Mini-LVDS signal, and send the converted Mini-LVDS signal to the panel COF type source driver interface 1115, that is, the conversion of the interface signal is completed through the signal conversion circuit, so that the data transmission is completed without changing the original Mini-LVDS interface on the panel. By adding a signal conversion circuit (for example, presented in a chip form) in the display control circuit 1131 of the XB board 113a, on one hand, the P2P interface signal is converted into a mini-LVDS interface signal, so that the interface between the COF type source driver 1115 and the XB board 113 in the source driving circuit is changed into a mini-LVDS interface, and the cost is greatly reduced; on the other hand, the signal conversion circuit can generate time sequence control signals required by the display panel 111, panel debugging and modification can be completed by panel manufacturers, and the whole machine manufacturers can do no need to make any change, so that development cost is reduced; in yet another aspect, the new panel technology may be implemented by signal conversion circuitry, and the system board 13 may be left unchanged.
The nonvolatile memory 1133 stores therein an optical taste adjustment parameter table, and the parameters included in the optical taste adjustment parameter table are parameters strongly related to the optical taste (or optical characteristic) of the display panel 111.
The system board 13 is provided with a connector CN2, a system-on-chip 133, and a power management circuit 135. The connector CN2 of the system board 13 is connected to the connector CN1 of the driving circuit board 113a through the connection piece CL1. Furthermore, the system-in-chip 133 is electrically connected to the connector CN2 and has an optical quality adjustment IP core built therein, so that the system-in-chip 133 can read the optical quality adjustment parameters stored in the nonvolatile memory of the driving circuit board 113a in a serial communication manner through the connector CN2, the connector CL1 and the connector CN1 and load the optical quality adjustment parameters into the optical quality adjustment IP core to adjust the optical quality of the display panel 111. In addition, the connection member CL1 is, for example, a single Flexible Flat Cable (FFC). Furthermore, it should be noted that the system board 13 of the present embodiment is typically further provided with a plurality of audio/video input interfaces such as a CVBS interface, an HDMI interface, and the like; the system Board 13 is also called a Main Board (Main Board), and is used for decoding the video and audio signals input through the audio/video input interface, and outputting the video signals to the driving circuit Board assembly in a digital signal format.
Wherein the optical taste adjustment IP core 1330 includes an Over Drive (OD) IP core, and the optical taste adjustment parameter table includes an over drive parameter table 11334, accordingly. More specifically, the overdrive IP core is configured to perform an overdrive operation according to an overdrive parameter table. The parameters required for the overdrive operation are well known and mature techniques, and will not be described in detail here. As for the power management circuit 135, it is electrically connected to the connector CN2 to supply an input dc voltage such as 12V to the driving circuit board 113 a; furthermore, the power management circuit 135 uses, for example, a mature PMIC chip.
In one embodiment of the present disclosure, as shown in fig. 4, 5, and 6, fig. 4a is a schematic diagram of a liquid crystal response of an LCD not performing an OD in an embodiment of the present disclosure, fig. 4b is a schematic diagram of a liquid crystal response of an LCD performing an OD in an embodiment of the present disclosure, fig. 5a is a waveform intent of an LCD performing an OD in an embodiment of the present disclosure, fig. 5b is a bright-edge screen schematic diagram of an LCD performing an OD in an embodiment of the present disclosure, and fig. 6 is a schematic diagram of a Backlight (BLU) and an LCD luminance versus time in an embodiment of the present disclosure; for example, the display device is a conventional LCD, and the response time is about 5-30ms after the backlight is normally bright and the liquid crystal is driven by a voltage, so that the phenomenon of smear existing when displaying dynamic images is generally solved by Over-voltage Driving (Over Driving); the OD mode may have an excessively high overdrive voltage (over OD), and a bright edge phenomenon may occur.
In an embodiment of the present disclosure, as shown in fig. 7-9, fig. 7 is a schematic diagram of a time difference between a mini LED Plate and an LCD in an embodiment of the present disclosure, fig. 8 is a schematic diagram of a display control logic in an embodiment of the present disclosure, and fig. 9 is a schematic diagram of a display control brightness waveform in an embodiment of the present disclosure, where the predetermined adjustment manner is, for example, a time difference between STV signals controlling the mini LED Plate and the LCD, and the influence of the liquid crystal response time of the LCD panel is improved by the time difference, so as to improve the picture smear.
Specifically, the time difference is a time difference Δt for the display control IC design; STV signals of the mini LED and LCD are output to a Gate COF or GOA circuit according to the setting of DeltaT, so that the display superposition of the STV signals generates DeltaT time delay, the influence of the liquid crystal response time of the LCD panel is improved, and further, the image smear is improved.
Further, the display control circuit comprises, for example, a display control IC, wherein the display control IC is matched with the min LED Tcon IC and the LCD Tcon IC to control the time difference Δt between the min LED plate and the LCD, and the time of the rising and Falling is changed to improve the image quality problem caused by the response time of the liquid crystal, thereby improving the image quality of the final output image.
Preferably, as shown in fig. 13-19, fig. 13a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD in an embodiment of the present disclosure, fig. 13b is a schematic waveform diagram of a final display of an LCD in an embodiment of the present disclosure, Δt=0, fig. 14a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD in an embodiment of the present disclosure, Δt=2, fig. 14b is a schematic waveform diagram of a final display of an LCD in an embodiment of the present disclosure, Δt=2, fig. 15a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD in an embodiment of the present disclosure, Δt=4, fig. 16a is a schematic waveform diagram of a final display of a mini LED Plate and an LCD in an embodiment of the present disclosure, fig. 16b is a schematic waveform diagram of the final display of the LCD when Δt=6 in the embodiment of the present disclosure, fig. 17a is a schematic waveform diagram of the time difference between the mini LED Plate and the LCD when Δt=8 in the embodiment of the present disclosure, fig. 17b is a schematic waveform diagram of the final display of the LCD when Δt=8 in the embodiment of the present disclosure, fig. 18a is a schematic waveform diagram of the time difference between the mini LED Plate and the LCD when Δt=10 in the embodiment of the present disclosure, fig. 18b is a schematic waveform diagram of the final display of the LCD when Δt=10 in the embodiment of the present disclosure, and fig. 19 is a schematic waveform diagram of the response of the liquid crystal when Δt is different in the embodiment of the present disclosure, and the response time of the raining and Falling is different; when the delta T time is prolonged, the rising time is reduced, and the Falling time is increased; when Δt=4 to 6ms, the time of the pulling and the Falling are both less than 5ms, which is a more ideal time difference design value.
In one embodiment of the present disclosure, as shown in fig. 10-12, fig. 10 is a schematic diagram of time design of a mini LED Plate and LCD in another embodiment of the present disclosure, fig. 11 is a schematic diagram of display control logic in another embodiment of the present disclosure, and fig. 12 is a schematic diagram of display control brightness waveform in another embodiment of the present disclosure, for example, by using the OD Table in the mini LED Plate and LCD Tcon IC, setting and creating time differences of rising and Falling, achieving the effect of improving response time; said time difference is for example equal to one frame.
Specifically, the input time difference between the mini LED Plate and the LCD is kept synchronous or displayed integrally; the OD gray scale of the Rising area of mini LED OD Table is set to be equal to the initial gray scale; the OD gray scale of the rolling area of mini LED OD Table is set to be equal to the initial gray scale; and setting the OD gray level of the rolling area of the LCD OD Table to be equal to the initial gray level.
Further, for example, by controlling and reducing the on time DeltaT of mini LED Plate, the time of LCD drawing and rolling is improved, and further the image quality problem caused by the response time of liquid crystal is improved, and finally the image quality of the output image is improved.
Preferably, as shown in fig. 20-26, fig. 20a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD when Δt=0 in another embodiment of the present disclosure, fig. 20b is a schematic waveform diagram of a final display of an LCD when Δt=0 in another embodiment of the present disclosure, fig. 21a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD when Δt=2 in another embodiment of the present disclosure, fig. 21b is a schematic waveform diagram of a final display of an LCD when Δt=2 in another embodiment of the present disclosure, fig. 22a is a schematic waveform diagram of a time difference between a mini LED Plate and an LCD when Δt=4 in another embodiment of the present disclosure, fig. 22b is a schematic waveform diagram of a final display of an LCD when Δt=4 in another embodiment of the present disclosure, fig. 23a is a schematic waveform diagram of a final display of a time difference between a mini LED Plate and an LCD when Δt=6 in another embodiment of the present disclosure, fig. 23b is a schematic waveform diagram of a final display of a time difference between a mini LED Plate and an LCD when Δt=6 in another embodiment of the present disclosure, fig. 22a schematic waveform diagram of a final display of a time difference between a mini LED Plate and an LCD when Δt=24 in another embodiment of the other embodiment of the present disclosure is different embodiment of the present disclosure, and a final display of a LCD when Δt=4 in another embodiment of the present disclosure is different embodiment of the present disclosure, and a schematic waveform diagram of a final display of a mini LED Plate when Δt=4 in another embodiment of the LCD when Δt=4 in another embodiment of the present disclosure is different embodiment of the present disclosure, and a final display of the LCD when a time difference between a LCD is different embodiment of the lcd=8; when DeltaT is different, the response time of the Raishing and the Failling are different; when the refresh frequency of the display panel is 60HZ, one frame time is 16.67ms, and the rising and Falling times are 0; when the refresh frequency of the display panel is 120HZ, one frame time is 8.3ms, and the response time is greatly improved when the rising and Falling times are 0.58 ms.
In another embodiment of the present disclosure, as shown in fig. 2, fig. 2 is a schematic diagram of a display in an embodiment of the present disclosure, including a backlight module 401 and a display device 10; the display device may be configured to perform display image quality improvement by using any of the methods for improving display image quality in the respective embodiments described above.
In the method for improving the display image quality and the display device, the time difference delta T between the STV signals of the mini LED Plate and the LCD is controlled by the time sequence or the time staggering of the mini LED Plate and the LCD, and the time difference between the rising and the falling is created by using the OD Table in the mini LED Plate and the LCD Tcon IC, so that the problem of the non-synchronization caused by the slow response time of the LCD is solved, the response time is improved, the picture smear is further improved, and the like, and the better high-contrast synchronous display of the display device is realized.
In addition, it is understood that the foregoing embodiments are merely exemplary descriptions of the present application, and the technical solutions of the embodiments may be arbitrarily combined and matched without conflict in technical features and contradiction in structure and without departing from the purpose of the present application.
Furthermore, it is understood that the display device may be: LTPO display device, micro LED display device, liquid crystal panel, electronic paper, OLED panel, AMOLED panel, cell phone, tablet, television, display, notebook, digital photo frame, etc. any product or component having a display function.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in hardware plus software functional units.
The integrated units implemented in the form of software functional units described above may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium, and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk or an optical disk, a nonvolatile Memory, or other various media capable of storing program codes.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
The phrase "in one embodiment of the present disclosure" or the like is used repeatedly. The term generally does not refer to the same embodiment; but it may also refer to the same embodiment. The terms "comprising," "having," "including," and the like are synonymous, unless the context clearly dictates otherwise.
While the present disclosure has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and that any such changes and modifications as described in the foregoing embodiments are intended to be within the scope of the disclosure.
Claims (8)
1. A method for improving display quality, comprising:
a mini LED is adopted as a backlight module of the display device;
setting the time difference of the input signals of the backlight module and the display panel;
improving the influence of the response time of the display panel through a preset adjusting mode so as to realize better high-contrast synchronous display;
wherein the display panel is an LCD display panel;
the method for improving the influence of the response time of the display panel by a preset adjusting mode to realize better high-contrast synchronous display specifically comprises the following steps:
the influence of response time of the display panel is improved by respectively and independently adjusting the time difference of the miniLED backlight module and the LCD input signal so as to realize better high-contrast synchronous display;
the preset adjusting mode is to set and create ascending and descending time differences which are equivalent to the lifting response time by utilizing an overvoltage driving table in the miniLED backlight module and the LCD TconIC; the time difference is equal to one frame time; the input time difference between the mini LED backlight module and the LCD is kept synchronous; the setting of the overvoltage driving gray scale of the rising area of the mini LED overvoltage driving meter is equal to the initial gray scale; and setting the overvoltage driving gray scale of the falling area of the mini LED overvoltage driving meter to be equal to the initial gray scale.
2. The method for improving display quality according to claim 1, wherein,
the preset adjusting mode is to control the time difference of a reference time sequence signal STV of the miniLED backlight module and the LCD;
the time difference is used for improving the influence of the liquid crystal response time of the LCD panel, thereby improving the picture smear.
3. The method for improving display quality according to claim 2, wherein,
the time difference is a time difference DeltaT designed for the display control IC;
and outputting reference time sequence signals STV of the miniLED backlight module and the LCD to a flip-chip thin film gate driving circuit or a gate driving circuit according to the setting of DeltaT, so that the delay of DeltaT time is generated by display superposition.
4. The method for improving display quality according to claim 3, wherein,
the display control IC changes the rising and falling time by controlling the time difference DeltaT between the miniLED backlight module and the LCD so as to improve the image quality caused by the response time of the liquid crystal, thereby improving the image quality of the final output image.
5. The method for improving display quality according to claim 4, wherein,
when the deltat is different, the response times of the rise and fall are different;
when the delta T time is long, the rising time is reduced, and the falling time is increased;
and when the delta T is in a 4-6ms interval, the rising time and the falling time are both smaller than 5ms.
6. The method for improving display quality according to claim 1, wherein,
the adjusting mode is to control and shorten the on time DeltaT of the minisize LED backlight module, improve the rising and falling time of the LCD, improve the image quality problem caused by the response time of the LCD, and finally improve the image quality of the output image.
7. The method for improving display quality according to claim 6, wherein,
when the deltat is different, the response times of the rise and fall are different;
when the refresh frequency of the display panel is 60HZ, one frame time is 16.67ms, and the rising time and the falling time are 0;
when the refresh frequency of the display panel is 120HZ, one frame time is 8.3ms, and the rising and falling times are 0.58ms, so that the response time is greatly improved.
8. A display device, wherein the display image quality is improved by the method for improving display image quality according to any one of claims 1 to 7.
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| CN201911302747.1A CN112992079B (en) | 2019-12-17 | 2019-12-17 | Method for improving display image quality and display device |
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