CN112967982B - Transfer substrate, manufacturing method of transfer substrate, chip transfer method and display panel - Google Patents

Transfer substrate, manufacturing method of transfer substrate, chip transfer method and display panel Download PDF

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Publication number
CN112967982B
CN112967982B CN202010947374.XA CN202010947374A CN112967982B CN 112967982 B CN112967982 B CN 112967982B CN 202010947374 A CN202010947374 A CN 202010947374A CN 112967982 B CN112967982 B CN 112967982B
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chip
corrosion
substrate
transfer
transfer substrate
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CN112967982A (en
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李强
蒲洋
刘海平
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386—Separation by peeling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages

Abstract

The invention relates to a transfer substrate and a manufacturing method thereof, a chip transfer method and a display panel, wherein the transfer substrate comprises a substrate main body and a plurality of groups of corrosion-resistant structures arranged on one side of the substrate main body, one group of corrosion-resistant structures correspond to at least one chip, the chip is bonded with the region of the corrosion-resistant structures when transferred from a growth substrate to the transfer substrate and is in contact with the corrosion-resistant structures, before the chip is transferred from the region of the corrosion-resistant structures to a target carrier plate, the substrate main body is corroded by using a target corrosive agent, the substrate main body bonded with the chip is corroded, the corrosion-resistant structures are not corroded and can become weakened structures bonded with the chip.

Description

Transfer substrate, manufacturing method of transfer substrate, chip transfer method and display panel
Technical Field
The invention relates to the field of manufacturing of micro devices, in particular to a transfer substrate and a manufacturing method thereof, a chip transfer method and a display panel.
Background
In the manufacturing process of Micro LED display devices, Micro light emitting chips (i.e. Micro LED chips) on a growth substrate need to be transferred onto a target carrier many times. In the transferring process, the micro light emitting chips on the transfer substrate are generally picked up by a pickup device such as a transfer head and then placed on the target carrier.
In some technologies, the micro light-emitting chip is fixed on the transfer substrate by adhesion, and the pick-up of the micro light-emitting chip needs to overcome the adhesive force between the micro light-emitting chip and the transfer substrate. The adhesive force between the micro light-emitting chip and the transfer substrate is large, so that the micro light-emitting device is easy to lose on the display back plate due to the fact that the micro light-emitting chip cannot be successfully picked up. In the prior art, the success rate of the mode of transferring the micro light-emitting chip is low.
Therefore, how to increase the success rate of picking up the chips from the transfer substrate is an urgent problem to be solved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the related art, the present application aims to provide a transfer substrate and a manufacturing method thereof, a chip transfer method and a display panel, and aims to solve the problem of low success rate of the transferred micro light emitting device mode in the prior art.
A transfer substrate, comprising: a substrate main body; a plurality of sets of corrosion resistant structures disposed on one side of the substrate body, the corrosion resistant structures embedded in the substrate body at a predetermined depth; the positions of the corrosion-resistant structures correspond to the positions of the chips to be transferred on the growth substrate, and one group of the corrosion-resistant structures corresponds to at least one chip; wherein the chip is bonded to the region of the corrosion-resistant structure and is in contact with the corrosion-resistant structure when transferred onto the transfer substrate; before the chip is transferred to the target carrier plate from the region where the anti-corrosion structure is located, the substrate main body is partially exposed out of the anti-corrosion structure under the corrosion of a target corrosive agent.
The transfer substrate is made to pass through the corrosion-resistant structure, so that after a chip is transferred from the growth substrate and is corroded by the target corrosive agent, the substrate body bonded with the chip is corroded, the chip is bonded on one surface of the corrosion-resistant structure, the other surface of the corrosion-resistant structure is connected with the substrate body which is not corroded, the corrosion-resistant structure can form a weakening structure, and meanwhile, the process of forming the weakening structure is simple and easy to control; the bonding area between the chip and the transfer substrate is reduced, so that the bonding force is reduced, the external force required for picking up the chip from the transfer substrate is reduced, the success rate of picking up the chip is improved in some application implementation processes, the proportion of the chip missing from the display backboard is reduced, and the quality of the finally formed display backboard is improved.
Based on the same inventive concept, the present application further provides a method for manufacturing a transfer substrate, comprising: providing a substrate main body; forming a plurality of groups of corrosion-resistant structures on one side of the substrate main body according to the positions of the chips to be transferred on the growth substrate, wherein the corrosion-resistant structures are embedded in the substrate main body at a preset depth, the positions of the corrosion-resistant structures correspond to the positions of the chips to be transferred on the growth substrate, and one group of corrosion-resistant structures corresponds to one chip.
The transfer substrate manufactured by the manufacturing method of the transfer substrate comprises a substrate main body and an anti-corrosion structure, after a chip is transferred from a growth substrate and is corroded by a target corrosive agent, the substrate main body bonded with the chip is corroded, the chip is bonded on one surface of the anti-corrosion structure, the other surface of the anti-corrosion structure is connected with the substrate main body which is not corroded, the anti-corrosion structure can form a weakening structure, and meanwhile, the process of forming the weakening structure is simple and easy to control; the bonding area between the chip and the transfer substrate is reduced, so that the bonding force is reduced, the external force required for picking up the chip from the transfer substrate is reduced, the success rate of picking up the chip is improved in some application implementation processes, the proportion of the chip missing from the display backboard is reduced, and the quality of the finally formed display backboard is improved.
Based on the same inventive concept, the application also provides a chip transfer method, which comprises the following steps: providing a transfer substrate, wherein the transfer substrate is the transfer substrate; transferring a chip on a growth substrate onto the transfer substrate to bond the chip with a substrate body; etching the transfer substrate for a preset time by using a target etchant to partially expose the corrosion-resistant structure on the substrate main body, so that the chip is separated from the substrate main body and is kept adhered to the corrosion-resistant structure, wherein before etching the transfer substrate, the chip is coated with a protective layer for preventing the chip from being etched by the target etchant; and transferring the chip to a target carrier plate.
By the method, the transfer substrate is corroded for the preset time, so that the bonding area between the chip and the transfer substrate is reduced, the bonding force between the chip and the transfer substrate is reduced, the chip can be picked up more easily, the success rate of basically picking up the chip from transfer is improved in some implementation processes, the proportion of the chip missing from the display back plate is reduced, and the quality of the finally formed display back plate is improved. Meanwhile, as the anti-corrosion structure is arranged in the substrate main body, the process of forming the weakening structure is simpler, the structure and the quality of the formed weakening structure are easy to control, and the weakening structure with ideal effect is easy to form.
Based on the same inventive concept, the present application also provides a display panel, including: the circuit board is provided with a chip and serves as a target carrier plate, and the chip is transferred onto the circuit board by any one of the chip transfer methods.
The chip in the display panel is transferred to the circuit board by any one of the chip transfer methods, so that the chip loss rate is low and the display effect of the display panel is good in some implementation processes.
Drawings
Fig. 1 is a schematic structural diagram of a transfer substrate according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a transfer substrate after etching according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a transfer substrate with a chip bonded thereon after etching according to an embodiment of the present invention;
FIG. 4-a is a first schematic structural diagram of a transfer substrate according to an embodiment of the present invention;
FIG. 4-b is a schematic top view of FIG. 4-a;
FIG. 5-a is a schematic structural diagram of another transfer substrate according to an embodiment of the present invention;
FIG. 5-b is a schematic top view of FIG. 5-a;
FIG. 6-a is a schematic structural diagram of another transfer substrate according to an embodiment of the present invention;
FIG. 6-b is a schematic top view of FIG. 6-a;
FIG. 7-a is a fourth schematic structural view of another transfer substrate according to an embodiment of the present invention;
FIG. 7-b is a schematic top view of FIG. 7-a;
FIG. 8 is a schematic view of the surface topography of a corrosion resistant structure on a transfer substrate according to one embodiment of the present invention;
FIG. 9-a is a schematic structural diagram of another transfer substrate according to an embodiment of the present invention;
FIG. 9-b is a schematic top view of FIG. 9-a;
fig. 10 is a schematic flow chart illustrating a method for fabricating a transfer substrate according to another alternative embodiment of the invention;
fig. 11 is a schematic flow chart illustrating a method for fabricating another transfer substrate according to another alternative embodiment of the present invention;
FIG. 12 is a schematic diagram of a transfer substrate fabrication process according to another alternative embodiment of the invention;
fig. 13 is a schematic structural diagram of an ion implantation apparatus according to another alternative embodiment of the present invention;
fig. 14 is a schematic flow chart illustrating a method for fabricating another transfer substrate according to another alternative embodiment of the present invention;
FIG. 15 is a flowchart illustrating a chip transfer method according to yet another alternative embodiment of the invention;
FIG. 16-a is a schematic structural diagram of a transfer substrate during a chip transfer process according to yet another alternative embodiment of the present invention;
FIG. 16-b is a schematic view of the etching process performed in FIG. 16-a;
FIG. 16-c is a schematic diagram of the chip pick-up process after etching in FIG. 16-b;
FIG. 16-d is a schematic view of the process of FIG. 16-c for removing the adhesive layer after picking up the chip;
FIG. 16-e is a schematic view of the transfer process of FIG. 16-d after removal of the adhesive layer;
fig. 17 is a schematic view illustrating a detailed process of obtaining a transfer substrate with a plurality of chips bonded thereon according to yet another alternative embodiment of the present invention;
FIG. 18-a is a schematic view of a process for providing an adhesive layer according to yet another alternative embodiment of the present invention;
FIG. 18-b is a schematic view of the process of attaching the transfer substrate of FIG. 18-a;
FIG. 18-c is a schematic view of the chip detachment process of FIG. 18-b;
description of reference numerals:
1-a substrate body; 2-corrosion resistant structures; 3-chip; 31-an adhesive layer; 32-one of the poles of the chip; 4-a transfer head; 5-target carrier plate; 6-a growth substrate; 10-a silicon wafer; 11-a mask; 131-an ion source; 132-a mass analyzer; 133-an acceleration system; 134-neutral beam deflector; 135-a focusing system; 136-deflection scanning system; 137-a working chamber; a-a double columnar structure; b-a double-sided structure; c-a single-facetted structure; d-single columnar structure; f-target etchant.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In the related art, when the transfer of the micro light-emitting device is performed, the success rate of picking up the micro light-emitting device from the transfer substrate is low.
Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.
Example (b):
an embodiment of the present invention provides a transfer substrate, and referring to fig. 1, a part of the transfer substrate is shown as an illustration, and the transfer substrate provided in this embodiment includes: the substrate comprises a substrate body 1 and a plurality of groups of corrosion-resistant structures 2 arranged on one side of the substrate body 1, wherein the corrosion-resistant structures 2 are integrally embedded in the substrate body 1. The chips are formed on the growth substrate, the chips on the growth substrate can be transferred by transferring the substrate before being finally arranged on the target carrier plate, the positions of the corrosion-resistant structures 2 arranged on the substrate main body 1 correspond to the positions of the chips to be transferred on the growth substrate, and one group of corrosion-resistant structures 2 corresponds to one chip. For example, the center points of a group of corrosion-resistant structures are arranged corresponding to the center points of the chips, and it can be understood that the layout of the corrosion-resistant structures on the transfer substrate and the pitch between the center points of the groups of corrosion-resistant structures are consistent with the layout of the chips on the growth substrate and the pitch between the center points of the chips. For example, two electrodes of the chip correspond to a set of corrosion resistant structures 2, that is, one electrode corresponds to one corrosion resistant structure 2.
In order to transfer the chips from the growth substrate to the transfer substrate, the chips are attached to the transfer substrate by means of adhesion. Each chip is wrapped by an adhesive layer, and the material of the exemplary adhesive layer may be an organic glue material such as a photoresist, a thermal photoresist, etc., and it should be noted that the adhesive layers of different chips are not connected to each other, that is, each chip is independent.
It should be understood that the side of the transfer substrate on which the corrosion-resistant structure is provided is used to attach the chip, which should be aligned with the area on the transfer substrate where the corrosion-resistant structure is located. And (3) enabling the side, provided with the chip, of the growth substrate to be opposite to the side, provided with the corrosion-resistant structure, of the transfer substrate, enabling the growth substrate to be close to the transfer substrate, and enabling the surface, far away from the growth substrate, of the chip to be bonded with the transfer substrate. The chip is connected with the area of the anti-corrosion structure on the transfer substrate through the adhesive layer. It is noted that the position of the chip corresponds to the corrosion-resistant structure on the transfer substrate, so that the bonding layer of the chip is in contact with its corresponding set of corrosion-resistant structures, while the chip is also in contact with a portion of the substrate body, i.e. the total area of bonding of the chip to the transfer substrate is greater than the area of bonding with the corrosion-resistant structures; of course, contact as used herein refers to contact through the adhesive layer of the chip. That is, the adhesion portion of the transfer substrate to a chip includes both the substrate body and the corresponding set of corrosion resistant structures. It can be seen that the surface of the corrosion resistant structure is exposed from the substrate body, and in some examples, the exposed surface of the corrosion resistant structure is flush with the surface of the substrate body to better achieve adhesion to the chip. Thus, the area of the corrosion resistant structure in contact with the chip should be less than the area of the interface of the chip and the transfer substrate.
And after the micro light-emitting chip is bonded with the transfer substrate, the micro light-emitting chip is separated from the growth substrate to obtain the transfer substrate with one surface provided with the chip. As an example, the chip is a micro light emitting chip, which is grown on a sapphire substrate, in this example, a growth substrate or a part of the growth substrate, and the gallium nitride epitaxial layer and the sapphire substrate of the micro light emitting chip are peeled Off using an LLO (Laser Lift Off) technique, so that the micro light emitting chip is separated from the growth substrate. However, it is understood that the micro light-emitting chip can be peeled off from the growth substrate by other physical or chemical mechanisms according to the practical application. Because the micro light-emitting chip is adhered to the transfer substrate, the micro light-emitting chip is separated from the growth substrate and then remains on the transfer substrate. It is understood that, in other examples, the transfer substrate of the present embodiment can be applied to the transfer process of other types of chips as well.
Before transferring the chip from the region where the anti-corrosion structure is located to the target carrier, the substrate body may be etched by the target etchant to partially expose the anti-corrosion structure, which is understood to be the portion originally embedded in the substrate body. The target corrosive agent corrodes a substrate body adhered with the chip, and a protective layer is coated outside the chip before the substrate is corroded and transferred and is used for preventing the chip from being corroded by the target corrosive agent. In some embodiments, the target etchant is an etchant that is capable of etching the bulk of the substrate but does not etch the etch-resistant structure and the adhesion layer of the transfer substrate, i.e., in these embodiments, the adhesion layer itself is also a protective layer that prevents portions of the chip that may be etched by the target etchant from contacting the target etchant. In the embodiment, each chip is independently wrapped, and the bonding layers are not in contact with each other, so that the target corrosive agent can directly start to corrode from the periphery of each chip, and the corrosion effect is ensured.
Since the corrosion-resistant structure and the chip coated with the protective layer or coated with the adhesive layer not corroded by the target corrosive agent are not corroded, only the substrate main body is corroded, and thus the transfer substrate can form the structure as shown in fig. 2. Referring to fig. 3, the chip 3 is adhered to one surface of the corrosion-resistant structure 2 through the adhesive layer 31, the substrate body 1 adhered to the chip 3 is corroded, the corrosion-resistant structure 2 originally embedded in the substrate body 1 is exposed, but the other end of the corrosion-resistant structure 2 is connected to the substrate body 1 which is not corroded yet. It will be appreciated that the etch time of the transfer substrate needs to be controlled to ensure that the bulk of the substrate is not etched and that the etch resistant structure is not detached from the transfer substrate. The time for the target etchant to etch the transfer substrate can be obtained through testing, and the preset time for the target etchant to etch is different under the condition that parameters such as substrate materials, etchant concentration, temperature and the like are different. It is noted that, since the transfer substrate is provided with the corrosion-resistant structure connected to the chip, the chip is always disposed on the transfer substrate without the corrosion-resistant structure falling off from the transfer substrate.
If the chip is to be picked up from the corroded transfer substrate, the chip can be taken down from the corrosion-resistant structure by using external force, and it can be understood that the chip is only adhered to the corrosion-resistant structure at the moment, and the substrate body which is adhered to the chip once is corroded, so that the bonding area between the chip and the transfer substrate is reduced, the bonding force is greatly reduced, the external force required for picking up the lower chip from the transfer substrate is reduced, and the success rate of picking up the chip is improved. In some implementation processes, the bonding area of the chip and the corrosion-resistant structure is larger than the bonding area of the chip and the substrate body, so that the effect of reducing the bonding force of the chip is better. Therefore, after the transfer substrate is correctly corroded by the target corrosive agent, the success rate of picking up the chip can be improved, and the yield of the finally formed display back plate is improved.
After the transfer substrate is corroded, only the corrosion-resistant structure is left to be adhered to the chip, and it can be understood that, at this time, a weakening structure which is beneficial to chip pickup is formed, and the connection between the chip and the transfer substrate is weakened. In some manufacturing processes, the transfer substrate may be directly etched without providing a corrosion-resistant structure to form the weakening structure, but it can be understood that since the corrosion-resistant structure is not provided, and the etching rate is difficult to control, the final weakening structure is not well formed in such a manner that under etching or over etching is easy to occur. Further, the different depths of the embedding of the corrosion-resistant structure into the transfer substrate determines the maximum corrosion time that it can withstand, it being understood that, with the other parameters being equal, the deeper the corrosion-resistant structure is embedded into the transfer substrate, the longer the corrosion time the corrosion-resistant structure will not fall off the transfer substrate. In practical application, the depth of the corrosion-resistant structure embedded into the transfer substrate is controlled in a proper range, so that the corrosion of the transfer substrate can be controlled more easily, and the situation that a chip falls off from the transfer substrate due to excessive corrosion is not easy to occur, so that the transfer substrate can be ensured to be sufficiently corroded as far as possible in some implementation processes, the excessive corrosion is not needed, the weakened structure can be formed simply, and the structure and the quality of the formed weakened structure are easy to control. Illustratively, in some specific applications, the depth of the corrosion-resistant structure embedded in the transfer substrate may be set to not less than 5 microns, and embedding depths of 10 microns, 15 microns, etc. are feasible and should be selected according to actual conditions, and of course, longer embedding depths can support longer corrosion.
In some embodiments, the chip includes two poles formed on a side away from the growth substrate. The group of anti-corrosion structures correspondingly comprises two anti-corrosion structures, the positions of the two anti-corrosion structures respectively correspond to two poles formed by the chip, the chip is transferred to the transfer substrate, each anti-corrosion structure is adhered to a corresponding pole, and a part of surface of each two poles of the chip is adhered to the corresponding anti-corrosion structure. It should be noted that the two electrodes of the chip also have a portion of their surface bonded to the substrate body, the bonding here also being achieved by means of an adhesive layer, the surface of the chip not being in direct contact with the transfer substrate. For example, as shown in fig. 4-a and 4-b, the surface area of one corrosion-resistant structure 2 exposed from the substrate body 1 is smaller than the area of one pole 32 of the chip 3, and the position where one corrosion-resistant structure 2 is bonded may be at the center of one pole 32 of the chip 3; as shown in fig. 5-a, 5-b, a corrosion resistant structure 2 is not located opposite the center of a pole 32 of a chip 3; as shown in FIG. 6-a and FIG. 6-b, the surface area of one corrosion-resistant structure 2 exposed from the substrate body 1 is not less than the area of one of the poles 32 of the chip 3, and the corrosion-resistant structure 2 is partially in contact with the chip 3.
In some embodiments, a set of corrosion resistant structures includes a corrosion resistant structure positioned between two poles of a chip, as shown in fig. 7-a, 7-b, and a chip 3 is transferred to a transfer substrate, with both poles of the chip 3 bonded to the corrosion resistant structure 2. It should also be noted that the specific shape of the corrosion-resistant structure can be selected according to actual needs, as shown in fig. 8, which shows a schematic surface view of the adhesion of the corrosion-resistant structure 2 and the chip 3, and the corrosion-resistant structure 2 can be formed to include, but not limited to, the double-pillar structure a, the double-sided structure b, the single-sided structure c, and the single-pillar structure d in the above figures.
In some embodiments, a set of chips includes at least two chips, and a set of corrosion resistant structures includes one corrosion resistant structure, i.e., one corrosion resistant structure is bonded to multiple chips at the same time. As shown in fig. 9-a, 9-b, the corrosion resistant structure 2 is a strip shape having a length corresponding to at least two chips 3, in other words, the length of the strip-shaped corrosion resistant structure 2 is not less than the distance between the two chips 3 farthest apart of the at least two chips 3. After the chips 3 are transferred to the transfer substrate, at least two chips 3 corresponding to one corrosion-resistant structure 2 are bonded to the corrosion-resistant structure 2. It can be seen that the corrosion-resistant structure on the transfer substrate of the present embodiment can be arranged in various ways according to practical situations. It should be noted that, in order to facilitate understanding of the structure of the transfer substrate of the present embodiment, the top view portions of the drawings show the structure on the transfer substrate in a perspective manner, and are not to be understood as a true top view.
In some embodiments, the transfer substrate is a silicon wafer and the etch-resistant structure is a region of the silicon wafer doped with self-stopping etchant ions above a first concentration threshold, the self-stopping etchant ions being doped into the silicon and being of a concentration such that the silicon is not etched by the target etchant. Taking the self-stop etching ions as the boron ions as a more specific example, the transfer substrate may use a silicon wafer having a portion of a region doped with boron ions having a concentration above a first concentration threshold on one side, the position of the region doped with boron ions above the first concentration threshold corresponding to the position of the chip on the growth substrate. Due to the self-stop etching effect of silicon, when the concentration of the boron ions doped in the silicon is higher than the first concentration threshold, the target etchant does not etch or hardly etches the part of the silicon, so that the region of the transfer substrate silicon wafer doped with the boron ions with the concentration above the first concentration threshold forms an anti-corrosion structure which is not etched by the target etchant. It should be noted that the target etchant may be potassium hydroxide (chemical formula: KOH) etchant or tetramethylammonium hydroxide (chemical formula: C)4H13NO; for short: TMAH) etchant, etc., which can achieve self-stop etching of silicon.
It will be appreciated that the concentration of boron ions to be doped in the silicon may be different under different conditions of temperature, etchant concentration, etc., i.e. the first concentration threshold described above may vary under different conditions. As an example, under the condition of about 25 ℃, i.e. normal room temperature, the concentration of the tetramethylammonium hydroxide etching solution is 2.38%, the tetramethylammonium hydroxide etching solution will corrode undoped or doped boron ions with the concentration less than 5 x 1019CM-3For doping with boron ions having a concentration greater than 5 x 1019CM-3The silicon of (a) does not substantially corrode.
The transfer substrate comprises a substrate main body and a plurality of groups of corrosion-resistant structures arranged on one side of the substrate main body, wherein when the chip is transferred onto the transfer substrate, the chip is bonded with the area where the corrosion-resistant structures are located; before the chip is transferred to the target carrier plate from the area where the anti-corrosion structure is located, the target corrosive agent is used for corroding the substrate main body to partially expose the anti-corrosion structure, through the anti-corrosion structure, the chip is adhered to one surface of the anti-corrosion structure, the other surface of the anti-corrosion structure is connected with the substrate main body which is not corroded, the anti-corrosion structure is equivalent to a weakening structure, the adhesion force is reduced due to the fact that the adhesion area between the chip and the transfer substrate is reduced, external force required for picking up and taking down the chip from the transfer substrate is reduced, the success rate of picking up the chip is improved in some application implementation processes, the proportion of the chip missing from the display back plate is reduced, and the quality of the finally formed display back plate is improved. Meanwhile, through the corrosion-resistant structure arranged in the substrate main body, a weakening structure can be simply formed in some implementation processes, the structure and the quality of the formed weakening structure are easy to control, and the condition that the forming effect of the weakening structure is not ideal due to the fact that the etching process is difficult to control when the etching is directly carried out on the substrate main body is avoided.
Another alternative embodiment of the invention:
the present embodiment provides a method for manufacturing a transfer substrate, please refer to fig. 10, which includes:
s101, providing a substrate main body;
and S102, forming a plurality of groups of corrosion-resistant structures on one side of the substrate body according to the position of the chip to be transferred on the growth substrate.
The corrosion-resistant structures formed in the above step S102 are embedded in the substrate main body at a predetermined depth, and it is understood that a group of corrosion-resistant structures corresponds to a group of chips, corresponding to the position of the chips to be transferred on the growth substrate, depending on the position of the chips to be transferred on the growth substrate.
When the chip on the growth substrate is transferred to the transfer substrate formed in the step, the side of the growth substrate provided with the chip is opposite to the side of the transfer substrate provided with the corrosion-resistant structure, the growth substrate is close to the transfer substrate, and the surface of the chip far away from the growth substrate is bonded with the transfer substrate.
In some embodiments, the transfer substrate is a silicon wafer, and the step S102 may specifically be:
s1021, doping self-stop etching ions higher than a first concentration threshold value to one side of the substrate main body according to the position of a chip to be transferred on the growth substrate;
it should be noted that in this embodiment, the regions of the silicon wafer doped with self-stopping etching ions above the first concentration threshold form corrosion-resistant structures. Due to the self-stop etching effect of silicon, when the concentration of the self-stop etching ions doped in the silicon is higher than the first concentration threshold, the target etchant does not etch or hardly etches the part of the silicon, so that the region of the transfer substrate silicon wafer doped with the self-stop etching ions with the concentration above the first concentration threshold forms an anti-corrosion structure which is not etched by the target etchant. It should be noted that, taking the self-stop etching ions as the boron ions as an example, the target etchant may be potassium hydroxide (KOH) etchant or tetramethylammonium hydroxide (C4H 13 NO; TMAH) etchant, which can achieve self-stop etching of silicon doped with high concentration of boron ions.
It should be understood that the concentration of the self-stop etchant ions to be doped in the silicon may be different under different conditions of temperature, etchant concentration, etc., i.e., the first concentration threshold described above may vary under different conditions. As an example, under the condition of about 25 ℃, i.e. normal room temperature, the concentration of the tetramethylammonium hydroxide etching solution is 2.38%, the tetramethylammonium hydroxide etching solution will corrode undoped or doped boron ions with the concentration less than 5 x 1019CM-3For doping with boron ions having a concentration greater than 5 x 1019CM-3The silicon of (a) does not substantially corrode.
The following describes the manufacturing process of the transfer substrate by a specific example, please refer to a flow diagram of manufacturing the transfer substrate in fig. 11 and a schematic diagram of a forming process of the transfer substrate corresponding to the flow diagram in fig. 11 shown in fig. 12:
s201, obtaining a silicon wafer;
the silicon wafer 10 is about the same size or larger than the growth substrate, and in this example, a silicon wafer 10 of the same size as the growth substrate may be used. The silicon wafer 10 is cleaned for use as a substrate body.
S202, obtaining a mask plate forming a pattern according to the position of a chip to be transferred on a growth substrate;
the reticle 11 may be made of at least one of a variety of alternative materials such as silicon dioxide, metal films, and photoresist. According to the position of the chip to be transferred on the growth substrate, the position corresponding to the chip on the mask plate 11 can be penetrated by ions.
S203, attaching the mask to a silicon wafer;
the side of the silicon wafer 10 to which the mask 11 is attached is the side on which the corrosion resistant structure is to be formed.
S204, implanting boron ions into the silicon wafer attached with the mask;
the silicon wafer 10 may be set in a chamber using an ion implantation apparatus as shown in fig. 13, with the surface to which the mask 11 is attached facing the ion implantation direction, and boron ions emitted from the ion source 131 sequentially pass through the mass analyzer 132, the acceleration system 133, the neutral beam deflector 134, the focusing system 135, and the scanning system 136, and then enter the chamber 137 to be implanted into the silicon wafer 10. The depth of the ion implantation (which in this example may be referred to as the junction depth) may also be controlled by adjusting corresponding parameters, illustratively 5 microns.
S205, taking down the mask plate to obtain a transfer substrate.
After the implantation of boron ions is completed, boron ions are doped into the silicon wafer 10, according to the pattern on the mask plate 11, the part which is not shielded by the mask plate 11 is doped with the boron ions to form the corrosion-resistant structure 2, the depth of the corrosion-resistant structure 2 embedded into the substrate body is the junction depth, and the rest area is not doped with the boron ions because of being shielded by the mask plate 11.
In another example, see fig. 14:
s301, obtaining a silicon wafer;
s302, obtaining a mask plate forming a pattern according to the position of a chip to be transferred on a growth substrate;
s303, attaching the mask to a silicon wafer;
s304, doping boron ions into the silicon wafer by using a vapor deposition method;
and carrying out vapor deposition on the surface of the silicon wafer attached with the mask, wherein due to the pattern on the mask, boron ions are not deposited in the area shielded by the mask. It is thereby achieved that a region of high concentration boron doping is formed only at a position corresponding to the chip to be transferred on the growth substrate, which region forms the corrosion-resistant structure in this embodiment.
S305, taking down the mask plate to obtain a transfer substrate.
In yet another example, boron ions may be doped into a silicon wafer by means of boron ion diffusion. Selecting a proper boron diffusion source (such as a boron microcrystalline glass source and the like), arranging the boron diffusion source at a position corresponding to a chip to be transferred on the growth substrate, and doping boron ions in the boron diffusion source into the silicon wafer through a corresponding diffusion process.
In practical applications, the manner of doping the silicon wafer with boron ions is not limited to the above-listed examples, and boron ion doping may be performed in any manner.
The transfer substrate manufactured by the manufacturing method of the transfer substrate provided by the embodiment comprises a substrate main body and an anti-corrosion structure embedded in the substrate main body in a preset depth, and by using the transfer substrate, the success rate of picking up chips can be improved in the process of transferring chips, so that the proportion of the chips missing from the display back plate is reduced, and the quality of the finally formed display back plate is improved. Meanwhile, through the corrosion-resistant structure arranged in the substrate main body, a weakening structure can be formed simply in some implementation processes, the structure and the quality of the formed weakening structure are easy to control, and the situation that the effect of forming the weakening structure is not ideal due to the fact that the etching process is difficult to control when the etching is directly carried out on the substrate main body can be avoided.
Yet another alternative embodiment of the invention:
the present embodiment provides a chip transfer method, and the present embodiment transfers a chip based on the transfer substrate shown in the above example, please refer to fig. 15, and the chip transfer method includes:
s401, providing a transfer substrate;
it should be noted that the transfer substrate is the one shown in the above example.
S402, transferring the chip on the growth substrate to a transfer substrate;
as shown in fig. 16-a, after the chips are transferred to the transfer substrate, the transfer substrate in this embodiment is adhered with a plurality of chips 3, and the two poles of the chips 3 face downward, in this embodiment, the chips 3 may be transferred from the growth substrate to the transfer substrate, or may be transferred from another carrier board in some implementation processes. In this embodiment, the chip 3 may be a micro light emitting chip.
The chips 3 on the transfer substrate are respectively wrapped by the adhesive layers 31, the material of the adhesive layers 31 can be photolysis glue, and the adhesive layers 31 of different chips 3 are not connected with each other, that is, each chip 3 is independent. Each chip 3 is bonded to the substrate main body 1 and the corrosion-resistant structure 2 of the transfer substrate, that is, the bonding area of the chip 3 and the corrosion-resistant structure 2 is smaller than the total bonding area of the chip 3, and further, in some embodiments, the bonding area of the chip 3 and the corrosion-resistant structure 2 is smaller than the bonding area of the chip 3 and the substrate main body 1, so as to achieve a better effect of reducing the bonding force between the chip 3 and the transfer substrate.
S403, etching the transfer substrate for a preset time by using the target etchant to partially expose the anti-corrosion structure on the substrate main body;
prior to etching the transfer substrate with the target etchant, the chip is coated with a protective layer that prevents the chip from being etched by the target etchant. In some embodiments, the protective layer is applied to the chip after die attach and before etching, and in other embodiments, the adhesive layer applied to the chip is not itself etched by the targeted etchant.
As shown in fig. 16-b, the transfer substrate with the chip 3 adhered thereon can be entirely immersed in the target etchant f, so that the surface of the transfer substrate is sufficiently contacted with the target etchant f for reaction. It should be noted that the target etchant f used is an etchant that is capable of etching the substrate body 1, but does not etch the etch-resistant structure 2 and the adhesive layer 31 in the transfer substrate.
Under the action of the target etchant f, the part of the substrate main body 1 bonded with the chip 3 is gradually etched away, and the bonding area between the chip 3 and the transfer substrate is gradually reduced. However, since the chip 3 is also bonded to the corrosion-resistant structure 2, the target etchant f does not react, or hardly reacts, with the corrosion-resistant structure 2 after contacting the corrosion-resistant structure 2, and thus, the etching of the target etchant f in the lateral direction with respect to the transfer substrate stops at the corrosion-resistant structure 2.
The preset time for etching in step S403 may be flexibly adjusted according to actual conditions, and in practical applications, the preset time may be measured by a technician, and the technician observes the degree of etching of the transfer substrate by the target etchant, and when the degree of etching of the transfer substrate reaches an expected effect, the preset time may be measured. In one example, after the preset time of corrosion, the substrate body bonded with the chip is completely corroded, the chip is completely separated from the substrate body, the chip is only bonded with the corrosion-resistant structure, one surface of the corrosion-resistant structure is bonded with the chip, and the other surface of the corrosion-resistant structure is still connected with the substrate body which is not corroded yet; in other examples, the substrate main body bonded with the chip is not completely corroded, but is partially corroded, the chip is partially separated from the substrate main body, the bonding area between the chip and the transfer substrate is reduced, the bonding force between the chip and the transfer substrate can be reduced, and the success rate of picking up the chip is improved.
This step is also illustrated by an example in which the transfer substrate is a silicon wafer, the corrosion resistant structure is a region of the silicon wafer doped with boron ions at a doping concentration above a first concentration threshold, it being understood that the first concentration threshold may be different under different conditions, requiring testing by a skilled person based on specific manufacturing conditions. As a more specific example, at a temperature of about 25 degrees, i.e., normal room temperature conditionsThe doping concentration of boron ions is 5 x 1019CM-3In the above case, the transfer substrate is etched for a predetermined time by using a tetramethylammonium hydroxide etchant having a concentration of 2.38% as a target etchant. It is understood that the etching time is determined according to the depth of boron ion doping (i.e. junction depth), and in general, the etching time is relatively short when the junction depth is small, and in practical applications, a skilled person can select a suitable etching time through experiments or calculation.
S404, transferring the chip to a target carrier plate;
in an example, the manner of transferring the chip to the target carrier board may specifically include the following steps S4041, S4042, S4043:
s4041, picking up the chip;
specifically, an external force is applied to the chip in a direction away from the substrate body to perform pickup. The chip is separated from the corrosion-resistant structure by external force, and the bonding force between the corroded transfer substrate and the chip is weakened only by the adhesion of the corrosion-resistant structure and the chip, so that the chip can be easily picked up and taken down.
As a more specific example, as shown in fig. 16-c, the chip 3 is picked up by the transfer head 4, and after the transfer head 4 is attracted to the chip 3, the chip 3 is pulled off the corrosion-resistant structure 2 by the transfer head 4 by moving in a direction away from the substrate body 1.
S4042, removing the adhesive layer on the picked chip;
the adhesive layer in this embodiment is formed by photolysis, and in other embodiments, an organic adhesive material such as thermal decomposition adhesive may be used, and for such organic adhesive, an organic solvent such as acetone may be used to remove the adhesive layer.
As in fig. 16-d, continuing with the transfer head 4 shown in step S4031 as an example on the basis of fig. 16-c, the bonding layer 31 on the chip 3 is removed using an organic solvent.
In this example, only the adhesive layer is taken as an example, and if other protective layers are applied in other embodiments, the protective layers are also removed in a corresponding manner.
S4043, arranging the picked chip on a target carrier plate;
the target carrier board may be a circuit board on which a chip is finally mounted, or may be another substrate or substrate in an actual manufacturing process. In other examples, other ways of transferring the chips to the target carrier may also be used.
Continuing the example from fig. 16-e, on the basis of fig. 16-d, it can be seen that the chips 3 are oriented in two poles, the target carrier board 5 in this example being the circuit board on which the chips 3 are to be mounted. The step of placing the picked chip 3 onto the target carrier 5 may include:
s501, moving a transfer head, and aligning a chip picked by the transfer head with a region (also called a die bonding region) for mounting the chip on a circuit board;
s502, the transfer head is lowered, so that the chip is placed in the area where the chip is installed on the circuit board.
In some embodiments, the area of the circuit board where the chip is mounted is configured as a mounting slot, and the slot-shaped structure more easily and stably accommodates the chip.
S503, binding the chip and the circuit board;
the bonding method in this step can use any method for bonding the chip and the circuit board, such as laser bonding.
Thus, the process of transferring the chips on the transfer substrate to the target carrier board is completed.
Of course, for manufacturing display devices such as a display backplane, the above steps are repeatedly performed to gradually transfer the chips on the transfer substrate to the target carrier.
In some embodiments, referring to fig. 17, the step S402 of transferring the chip on the growth substrate to the transfer substrate in the chip transfer method may include:
s601, arranging an adhesive layer for each chip to be transferred on the growth substrate;
as shown in fig. 18-a, before the chips 3 on the growth substrate 6 are transferred to the transfer substrate, an adhesive layer 31 is formed on each chip 3 to be transferred by using an adhesive material, and the formed adhesive layer 31 can provide an adhesive force, so that the chip 3 can be adhered to the transfer substrate in a subsequent transfer process, and meanwhile, the adhesive layer 31 in this embodiment is not corroded by the target corrosive agent, so that after the chip 3 is wrapped, the chip 3 can be protected, and the chip 3 is prevented from being damaged by the target corrosive agent in a subsequent corrosion process of the transfer substrate.
It should also be understood that, since the target corrosive agent is required to be used to corrode the transfer substrate adhered with the chips 3 subsequently, the chips 3 are independent, specifically, in the embodiment, the adhesive layers 31 of the chips 3 are not connected with each other, and a gap is formed between each chip 3, so that the target corrosive agent can be ensured to be in good contact with the substrate body around each chip 3 to react.
S602, attaching the surface of the transfer substrate provided with the corrosion-resistant structure to the surface of the growth substrate provided with the chip;
it should be understood that the position of the corrosion-resistant structure provided on the transfer substrate corresponds to the chip on the growth substrate, as shown in fig. 18-b, after the transfer substrate is attached to the growth substrate 6 in an opposite manner, the chips 3 are bonded to the transfer substrate, and a part of the bonding surface of each chip 3 to be transferred is bonded to the corresponding corrosion-resistant structure, and another part of the bonding surface is bonded to the substrate body 1. At this time, one surface of the chip 3 is bonded to the transfer substrate, and the other surface is still provided on the growth substrate 6.
S603, stripping the chip to be transferred from the growth substrate;
as an example, as shown in fig. 18-c, the chip 3 is grown on a sapphire substrate, which is the growth substrate 6 or a part of the growth substrate 6 in this example, and the gallium nitride epitaxial layer and the sapphire substrate of the chip 3 are peeled Off using an LLO (Laser Lift Off) technique so that the chip 3 is detached from the growth substrate 6. It is understood that the peeling of the chip 3 from the growth substrate 6 may be achieved by other physical or chemical mechanisms, depending on the actual application. Since the chip 3 and the transfer substrate are already bonded, the chip 3 and the growth substrate 6 are separated and remain on the transfer substrate.
According to the chip transfer method provided by the embodiment, the transfer substrate is corroded for the preset time, so that the bonding area between the chip and the transfer substrate is reduced, the bonding force between the chip and the transfer substrate is reduced, the chip can be picked up more easily, the success rate of basically picking up the chip from transfer is improved in some implementation processes, the proportion of the chips missing from the display backboard is reduced, and the quality of the finally formed display backboard is improved. Meanwhile, the corrosion-resistant structure arranged in the substrate main body enables the process of forming the weakening structure to be simpler, the structure and the quality of the formed weakening structure are easy to control, and the weakening structure with ideal effect is easy to form.
The present embodiment further provides a display panel, which includes a circuit board, the circuit board is provided with a chip as a target carrier, and the chip on the display panel of the present embodiment is transferred onto the circuit board by the chip transfer method in the above example.
The chip may be an epitaxial structure, or may be a cut LED chip.
Furthermore, the chip can be plated with electrodes or not plated with electrodes.
In the embodiments of the present application, a flip chip plated with an electrode is taken as an example for illustration.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.

Claims (10)

1. A transfer substrate, comprising:
a substrate main body;
a plurality of sets of corrosion resistant structures disposed on one side of the substrate body, the corrosion resistant structures embedded in the substrate body at a predetermined depth; the positions of the corrosion-resistant structures correspond to the positions of the chips to be transferred on the growth substrate, and one group of the corrosion-resistant structures corresponds to at least one chip;
wherein the chip is bonded to the region of the corrosion-resistant structure and is in contact with the corrosion-resistant structure when transferred onto the transfer substrate;
before the chip is transferred to the target carrier plate from the region where the anti-corrosion structure is located, the substrate main body is partially exposed out of the anti-corrosion structure under the corrosion of a target corrosive agent.
2. The transfer substrate of claim 1, wherein the chips comprise two poles disposed on a side away from the growth substrate, and wherein a set of the corrosion resistant structures comprises two of the corrosion resistant structures and corresponds to one of the chips, the two corrosion resistant structures being positioned to correspond to the two poles of one of the chips, respectively, and wherein after the chips are transferred to the transfer substrate, the two poles have respective surfaces that are adhered to the corresponding corrosion resistant structures.
3. The transfer substrate of claim 1, wherein the chips comprise two poles disposed on a side away from the growth substrate, a plurality of the corrosion resistant structures comprise one of the corrosion resistant structures and correspond to one of the chips, one of the corrosion resistant structures is positioned between the two poles of the chip, and a portion of the surface of each of the two poles is adhered to the corrosion resistant structure after the chips are transferred to the transfer substrate.
4. The transfer substrate of claim 1, wherein a set of said corrosion-resistant structures comprises one said corrosion-resistant structure, one said corrosion-resistant structure corresponding to at least two said chips, and wherein after said chips are transferred to said transfer substrate, a portion of each of two poles of at least two said chips corresponding to said corrosion-resistant structures is adhered to said corrosion-resistant structures.
5. The transfer substrate of any one of claims 1-4, wherein the transfer substrate is a silicon wafer, the etch-resistant structure is a region of the silicon wafer doped with self-stopping etching ions above a first concentration threshold, and the target etchant is for etching silicon that is not doped with self-stopping etching ions and that is doped with self-stopping etching ions below the first concentration threshold.
6. A method for manufacturing a transfer substrate is characterized by comprising the following steps:
providing a substrate main body;
forming a plurality of groups of corrosion-resistant structures on one side of the substrate main body according to the positions of the chips to be transferred on the growth substrate, wherein the corrosion-resistant structures are embedded in the substrate main body at a preset depth, the positions of the corrosion-resistant structures correspond to the positions of the chips to be transferred on the growth substrate, and one group of corrosion-resistant structures corresponds to one chip.
7. The method of claim 6, wherein the substrate body is a silicon wafer, and the forming of the plurality of sets of corrosion resistant structures on one side of the substrate body according to the position of the chip to be transferred on the growth substrate comprises:
and doping self-stop corrosion ions higher than a first concentration threshold value to one side of the substrate main body according to the position of the chip to be transferred on the growth substrate so as to form a plurality of groups of corrosion-resistant structures.
8. A method of chip transfer, comprising:
providing a transfer substrate according to any one of claims 1 to 5;
transferring a chip on a growth substrate onto the transfer substrate to bond the chip with a substrate body;
etching the transfer substrate for a preset time by using a target etchant to partially expose the corrosion-resistant structure on the substrate main body, so that the chip is separated from the substrate main body and is kept adhered to the corrosion-resistant structure, wherein before etching the transfer substrate, the chip is coated with a protective layer for preventing the chip from being etched by the target etchant;
and transferring the chip to a target carrier plate.
9. The chip transfer method of claim 8, wherein said transferring the chip on the growth substrate onto the transfer substrate to bond the chip to the substrate body comprises:
arranging an adhesive layer on each chip to be transferred on the growth substrate, wherein the adhesive layer wraps each chip to be transferred respectively;
attaching one surface of a transfer substrate provided with the corrosion-resistant structures to one surface of a growth substrate provided with chips, wherein one chip corresponds to one group of corrosion-resistant structures;
and peeling the chip to be transferred from the growth substrate.
10. A display panel comprising a circuit board on which a chip is disposed, the circuit board being a target carrier board, the chip being transferred onto the circuit board by the chip transfer method according to any one of claims 8 to 9.
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