CN112948242A - Debugging method of embedded controller, terminal equipment and storage medium - Google Patents
Debugging method of embedded controller, terminal equipment and storage medium Download PDFInfo
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Abstract
The invention discloses a debugging method of an embedded controller, a terminal device and a storage medium, wherein the debugging method of the embedded controller is applied to the terminal device, the terminal device comprises an embedded controller and a processor, the embedded controller is in communication connection with the processor, and the debugging method of the embedded controller comprises the following steps: the processor reads debugging parameters in the embedded controller through a communication interface connected with the embedded controller; and the processor debugs the embedded controller according to the debugging parameters. The efficiency of debugging the embedded controller is improved.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a debugging method for an embedded controller, a terminal device, and a storage medium.
Background
When the embedded controller of the notebook computer is debugged, the embedded controller is arranged in the notebook computer, after the shell of the notebook computer needs to be disassembled, the embedded controller is in communication connection with the debugging jig through the system management bus interface, and is further in communication connection with the debugging computer through the debugging jig, so that the debugging is completed on the debugging computer.
Disclosure of Invention
The invention mainly aims to provide a debugging method of an embedded controller, terminal equipment and a storage medium, and aims to solve the technical problem of low debugging efficiency of the embedded controller.
In order to achieve the above object, the present invention provides a method for debugging an embedded controller, where the method for debugging an embedded controller is applied to a terminal device, the terminal device includes an embedded controller and a processor, the embedded controller is in communication connection with the processor, and the method for debugging an embedded controller includes:
the processor reads debugging parameters in the embedded controller through a communication interface connected with the embedded controller;
and the processor debugs the embedded controller according to the debugging parameters.
Optionally, the communication interface is a low pin count interface or an enhanced serial peripheral interface.
Optionally, the step of reading, by the processor, the debugging parameters in the embedded controller through a communication interface connected to the embedded controller includes:
the processor reads the value of a target register in the embedded controller through the communication interface;
the processor determines the value of the target register as the debug parameter.
Optionally, before the step of reading the value of the target register in the embedded controller through the communication interface, the processor further includes:
the processor controls a display unit to display a register list of the embedded controller;
when the processor detects a selection instruction of the register list, the processor determines the target register corresponding to the selection instruction.
Optionally, the step of the processor reading the debugging parameters in the embedded controller through a communication interface connected with the embedded controller and the step of the processor debugging the embedded controller according to the debugging parameters further include:
the processor controls the display unit to display the debugging parameters.
Optionally, the step of debugging, by the processor, the embedded controller according to the debugging parameter includes:
when the processor detects a modification instruction for the target register, acquiring a modification value in the modification instruction;
and the processor writes the modification value into the target register to modify the debugging parameter, and debugs the running state of the hardware corresponding to the target register according to the modified debugging parameter.
Optionally, the step of debugging, by the processor, the embedded controller according to the debugging parameter includes:
when the processor detects a key modification instruction, modifying the debugging parameters according to the key modification instruction;
the processor reads the modified debugging parameters;
the processor controls the display unit to display the modified debugging parameters.
Optionally, after the step of determining the target register corresponding to the selection instruction, the processor further includes:
and when detecting the instruction for quitting debugging, the processor closes the debugging process.
In addition, in order to achieve the above object, the present invention further provides a terminal device, where the terminal device includes an internal communication bus, an embedded controller, a processor, a memory, and a debugging program of the embedded controller that is stored in the memory and is executable on the processor, the embedded controller is communicatively connected to the processor, and the debugging program of the embedded controller, when executed by the processor, further implements the steps of the debugging method of the embedded controller according to any one of the above aspects.
In addition, to achieve the above object, the present invention further provides a computer-readable storage medium, on which a debugging program of an embedded controller is stored, where the debugging program of the embedded controller, when executed by a processor, implements the steps of the debugging method of the embedded controller according to any one of the above items.
According to the debugging method of the embedded controller, the terminal device and the storage medium provided by the embodiment of the invention, when debugging is carried out, the processor in the terminal device reads the debugging parameters in the embedded controller through the communication interface connected with the embedded controller, and debugs the embedded controller according to the debugging parameters, so that debugging can be realized.
Drawings
Fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a debugging method of an embedded controller according to a first embodiment of the present invention;
FIG. 3 is a flowchart illustrating a second embodiment of a debugging method of an embedded controller according to the present invention;
FIG. 4 is a flowchart illustrating a third exemplary embodiment of a debugging method of an embedded controller according to the present invention;
FIG. 5 is a flowchart illustrating a fourth embodiment of a debugging method of an embedded controller according to the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a terminal device according to an embodiment of the present invention.
The terminal equipment of the embodiment of the invention can be a notebook computer, and other computer equipment with a processor in communication connection with the embedded controller and capable of reading debugging parameters in the embedded controller.
As shown in fig. 1, the terminal device may include: a processor 1001, such as a CPU, a memory 1002, and a communication bus 1003. The communication bus 1003 is used to implement connection communication among these components. The memory 1002 may be a high-speed RAM memory or a non-volatile memory (e.g., a disk memory). The memory 1002 may alternatively be a storage device separate from the processor 1001.
Those skilled in the art will appreciate that the configuration of the terminal device shown in fig. 1 does not constitute a limitation of the terminal device and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a memory 1002, which is a kind of computer storage medium, may include therein a debugging program of an operating system and an embedded controller.
In the terminal device shown in fig. 1, the processor 1001 may be configured to call a debugging program of the embedded controller stored in the memory 1002, and perform the following operations:
the processor reads debugging parameters in the embedded controller through a communication interface connected with the embedded controller;
and the processor debugs the embedded controller according to the debugging parameters.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
the processor reads the value of a target register in the embedded controller through the communication interface;
the processor determines the value of the target register as the debug parameter.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
the processor controls a display unit to display a register list of the embedded controller;
when the processor detects a selection instruction of the register list, the processor determines the target register corresponding to the selection instruction.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
the processor controls the display unit to display the debugging parameters.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
when the processor detects a modification instruction for the target register, acquiring a modification value in the modification instruction;
and the processor writes the modification value into the target register to modify the debugging parameter, and debugs the running state of the hardware corresponding to the target register according to the modified debugging parameter.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
when the processor detects a key modification instruction, modifying the debugging parameters according to the key modification instruction;
the processor reads the modified debugging parameters;
the processor controls the display unit to display the modified debugging parameters.
Further, the processor 1001 may call a debugger of the embedded controller stored in the memory 1002, and also perform the following operations:
and when detecting the instruction for quitting debugging, the processor closes the debugging process.
Referring to fig. 2, a first embodiment of the present invention provides a method for debugging an embedded controller, where the method for debugging an embedded controller is applied to a terminal device, the terminal device includes an embedded controller and a processor, the embedded controller is in communication connection with the processor, and the method for debugging an embedded controller includes:
step S10, the processor reads the debugging parameters in the embedded controller through the communication interface connected with the embedded controller;
the terminal device is a computer device, In this embodiment, the computer device includes an Embedded Controller and a processor, the communication Interface is an Interface of a communication connection established between the Embedded Controller and the processor, the communication Interface is, for example, a Low Pin Count (LPC) Interface or an Enhanced Serial Peripheral Interface (eSPI), wherein the LPC Interface is a dedicated Interface between a Low speed Peripheral and a PC Chipset, the facing device includes, but is not limited to, a SuperIO, a BMC, an EC (Embedded Controller), the eSPI Bus uses and multiplexes functions of an SPI Bus, and converts general input and output of an Out-of-Band (Out-of-Band, OOB) System Management Bus (SMBUS) and a Sideband (Sideband) into In Band signaling that can be transmitted over the eSPI Bus, and can also share flash memory (flash memory) In real time, in addition, the communication interface can also select I2A C (Inter-Integrated Circuit) interface or other communication interface; the debugging parameters are computer data for debugging the embedded controller, and the debugging parameters may include values of registers in the embedded controller and may also include addresses of the registers in the embedded controller.
The embedded controller in the terminal equipment can be used for controlling components such as a fan, a keyboard, a touch panel and the like, the terminal equipment takes a notebook computer as an example, in order to debug the embedded controller in the notebook computer, an exemplary method is to disassemble the shell of the notebook computer, then connect a computer mainboard comprising the embedded controller with a debugging tool through a system management bus interface, further connect the debugging tool with another debugging computer through a data line in a communication way, and run debugging software on the debugging computer for debugging, therefore, the shell is required to be disassembled by adopting the method, the debugging efficiency is low, and because the system management bus interface is originally in communication connection with the keyboard, the system management bus interface is occupied when the debugging is carried out through the system management bus interface, and the debugging can not receive the instruction of the keyboard under the condition, so that the keyboard can not be debugged, in addition, the debugging is carried out through the debugging jig, so that the cost of the debugging jig is increased; on this basis, to solve the above problems of the exemplary method, the present embodiment directly reads the debugging parameters in the embedded controller, such as directly reading the values of the registers in the embedded controller, through the computer program running on the processor and the communication interface of the embedded controller, without detaching the shell of the terminal device.
After the processor reads the debugging parameters in the embedded controller, the processor controls the display unit of the terminal device to display the debugging parameters, so that debugging personnel can check the timing parameters to know the current state of the embedded controller.
And step S20, the processor debugs the embedded controller according to the debugging parameters.
After the debugging parameters are obtained, the embedded controller is further debugged, and in the debugging process, the processor can modify the embedded controller according to a modification instruction of the embedded controller so as to debug the state of the embedded controller under different parameter settings, thereby realizing debugging, and also can debug in other modes.
In this embodiment, when debugging, the processor in the terminal device reads the debugging parameters in the embedded controller through the communication interface connected with the embedded controller, and debugs the embedded controller according to the debugging parameters, so as to realize debugging.
Referring to fig. 3, a second embodiment of the present invention provides a debugging method for an embedded controller, based on the first embodiment shown in fig. 2, before the step S10, the method includes:
step S30, the processor controls the display unit to display the register list of the embedded controller;
the register list is an interface for displaying register information, the register list may be composed of M rows and N columns of subunits, each subunit includes an address of a certain register and a value of the register, in addition, when the register list is displayed, the register type, the register function information, the register reading mode prompt information and the like may also be displayed, the register type includes, but is not limited to, a configuration register, an EC controller and a peripheral register, wherein the configuration register function includes, but is not limited to, configuration of the EC controller, enabling and accessing addresses of the peripheral register, the EC controller function includes, but is not limited to, temperature control and fan control, and the peripheral register function includes, but is not limited to, control of a Universal Asynchronous Receiver/Transmitter (UART), a parallel port, a Real-time clock (Real-time clock, RTC), General-purpose input/output (GPIO) and keyboard, wherein the read/write method includes but is not limited to I2EC method and Super I/O read/write method.
When debugging is carried out, a debugging program is operated on the processor to control the display unit to display the register list, so that a debugging person can select a register to be debugged from the register list to carry out debugging.
Step S40, when detecting a selection instruction for the register list, the processor determines the target register corresponding to the selection instruction.
The selection instruction is a computer instruction for executing selection operation on the register list, and the target register is a register corresponding to the selection instruction, namely a register needing debugging.
It is to be understood that, within a preset time period after the register list is displayed, the processor waits for a selection instruction for the register list, where the selection instruction may be an instruction for an input device such as a mouse or a touch panel to click the register list, and specifically, the selection instruction may be an instruction for a certain register button control in the register list to click.
In addition, after the target register is determined, the processor can also detect whether the debugging needs to be quitted, wherein the debugging needs to be quitted through detecting the quitted key operation, and when an instruction of quitting the debugging is detected, the debugging process is closed and the debugging program is quitted; when the retired instruction is not detected, the debugger is not retired, and the value of the target register is read.
The S10 includes:
step S11, the processor reads the value of the target register in the embedded controller through the communication interface;
after detecting the selected target register, the processor reads the value of the target register through a communication interface, for example, an LPC interface, specifically, the reading mode of I2EC may refer to fields such as "UART 1LDN ═ 0x 01", "KBC LDN ═ 0x 05", "GPIO LDN ═ 0x 07", and "EC LDN ═ 0x 04" when the register type is a configuration register, the reading mode of I2EC refers to "Base addr ═ 0x2a 00" and the reading mode of Super I/O refers to "Base addr ═ 0x 0290" when the register type is an EC controller, and the reading mode of I2EC refers to "Default Base addr: 1 Base addr ═ 0x03F8 when the register type is an external register; KBC base addr is 0x1D00 ", and the Super I/O reading method refers to" Default base addr: UART1 base addr is 0x 2700; GPIO base addr is 0x0000 ", where KBC is a key of the keyboard, addr represents an address, and a value of the target register can be read according to the address of the target register.
In step S12, the processor determines that the value of the target register is the debug parameter.
After the value of the target register is read, the value of the target register is determined as a debugging parameter, and after the debugging parameter is determined, the display unit can be controlled to display the debugging parameter, so that debugging personnel can check the value of the debugging parameter in real time to determine the state of the register under different debugging parameters.
In this embodiment, the register list is displayed by controlling the display unit, when a selection instruction for the register list is detected, a target register corresponding to the selection instruction is determined, a value of the target register in the embedded controller is read through the communication interface, and the value of the target register is determined as a debugging parameter, so that a parameter of a register to be debugged is obtained, wherein a debugging parameter of a keyboard can be obtained, the keyboard is debugged, and therefore the technical problem that the keyboard cannot be debugged is solved.
Referring to fig. 4, a third embodiment of the present invention provides a debugging method for an embedded controller, based on the second embodiment shown in fig. 3, where the step S20 includes:
step S21, when detecting the modification instruction to the target register, the processor obtains the modification value in the modification instruction;
the modification instruction is a modification instruction for the value of the target register, the modification instruction may be an instruction for writing the modification value into the target register, and since the value of the register is associated with the hardware operating state of the terminal device, the operating state of the hardware of the terminal device may be changed when the value of the register is modified; and when the modification instruction is detected, extracting a modification value in the modification instruction, wherein the modification value is a value required to be written into the target register.
Step S22, the processor writes the modification value into the target register to modify the debugging parameter, and debugs the running state of the hardware corresponding to the target register according to the modified debugging parameter.
After obtaining the modified value, the processor writes the modified value into the target register so as to modify the value of the target register and further change the running state of the hardware of the terminal equipment; the running state of hardware such as the on or off state of a lamp of a GPIO, the processor can modify the high level and the low level of the GPIO by modifying the value of a target register, wherein 1 represents the high level, and 0 represents the low level, when the GPIO port is at the low level, voltage drop is generated at two ends of a light-emitting diode, the light-emitting diode has current to pass through and emits light, when the GPIO port is at the high level, the light-emitting diode can be turned off, and at the moment, a debugger can debug the register by observing the on or off state of the lamp.
In this embodiment, when a modification instruction for the target register is detected, a modification value in the modification instruction is obtained, the modification value is written into the target register to modify the debugging parameter, and the running state of the hardware corresponding to the target register is debugged according to the modified debugging parameter, so that a debugger can intuitively debug the embedded controller in combination with the running state of the hardware of the terminal device.
Referring to fig. 5, a fourth embodiment of the present invention provides a debugging method for an embedded controller, based on the second embodiment shown in fig. 3, where the step S20 includes:
step S23, when the processor detects a key modification instruction, modifying the debugging parameters according to the key modification instruction;
the key modification instruction comprises a modification instruction triggered by a keyboard on the click terminal device and a modification instruction triggered by a keyboard of an external device connected with the click terminal device, when the key modification instruction is detected, a register corresponding to the key instruction is determined, the value of the corresponding register is modified according to the modification instruction, after the value of the register is modified, the value of the modified register is read, and the value of the modified register is used as a modified debugging parameter.
Step S24, the processor reads the modified debugging parameters;
and step S25, the processor controls the display unit to display the modified debugging parameters.
After the debugging parameters are modified, the processor reads the modified debugging parameters of the register and controls the display unit to display the modified debugging parameters, and when the display unit is controlled to display the modified debugging parameters, the modified debugging parameters can be displayed in the register list and displayed in the corresponding display area of the register list.
In this embodiment, when the key modification instruction is detected, the debugging parameters are modified according to the key modification instruction, the modified debugging parameters are read, and the display unit is controlled to display the modified debugging parameters, so that a debugging worker can check whether the debugging parameters are designed values, thereby realizing the debugging of the embedded controller.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for causing a terminal device to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. The debugging method of the embedded controller is applied to terminal equipment, the terminal equipment comprises the embedded controller and a processor, the embedded controller is in communication connection with the processor, and the debugging method of the embedded controller comprises the following steps:
the processor reads debugging parameters in the embedded controller through a communication interface connected with the embedded controller;
and the processor debugs the embedded controller according to the debugging parameters.
2. The method of debugging an embedded controller of claim 1, wherein the communication interface is a low pin count interface or an enhanced serial peripheral interface.
3. The debugging method of the embedded controller according to claim 1 or 2, wherein the step of the processor reading the debugging parameters in the embedded controller through a communication interface connected with the embedded controller comprises:
the processor reads the value of a target register in the embedded controller through the communication interface;
the processor determines the value of the target register as the debug parameter.
4. The embedded controller debugging method of claim 3, wherein the step of the processor reading the value of the target register in the embedded controller through the communication interface is preceded by the step of:
the processor controls a display unit to display a register list of the embedded controller;
when the processor detects a selection instruction of the register list, the processor determines the target register corresponding to the selection instruction.
5. The method for debugging an embedded controller according to claim 4, wherein between the step of the processor reading the debugging parameters in the embedded controller through a communication interface connected with the embedded controller and the step of the processor debugging the embedded controller according to the debugging parameters, the method further comprises:
the processor controls the display unit to display the debugging parameters.
6. The method for debugging an embedded controller according to claim 5, wherein the step of debugging the embedded controller by the processor according to the debugging parameters comprises:
when the processor detects a modification instruction for the target register, acquiring a modification value in the modification instruction;
and the processor writes the modification value into the target register to modify the debugging parameter, and debugs the running state of the hardware corresponding to the target register according to the modified debugging parameter.
7. The method for debugging an embedded controller according to claim 5, wherein the step of debugging the embedded controller by the processor according to the debugging parameters comprises:
when the processor detects a key modification instruction, modifying the debugging parameters according to the key modification instruction;
the processor reads the modified debugging parameters;
the processor controls the display unit to display the modified debugging parameters.
8. The method for debugging an embedded controller according to claim 5, wherein after the step of determining the target register corresponding to the selection instruction by the processor, the method further comprises:
and when detecting the instruction for quitting debugging, the processor closes the debugging process.
9. A terminal device, characterized in that the terminal device comprises an internal communication bus, an embedded controller, a processor, a memory, and a debugging program of the embedded controller stored on the memory and operable on the processor, the embedded controller is communicatively connected to the processor, and the debugging program of the embedded controller, when executed by the processor, further implements the steps of the debugging method of the embedded controller according to any one of claims 1 to 8.
10. A computer-readable storage medium, on which a debugging program of an embedded controller is stored, the debugging program of the embedded controller implementing the steps of the debugging method of the embedded controller according to any one of claims 1 to 8 when executed by a processor.
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