CN112929117B

CN112929117B - Compatible definable deterministic communication Ethernet

Info

Publication number: CN112929117B
Application number: CN202110117977.1A
Authority: CN
Inventors: 颜钢锋; 劳凯垚; 李极致; 张龙
Original assignee: Hangzhou Walangge Intelligent Manufacturing Co ltd
Current assignee: Hangzhou Walangge Intelligent Manufacturing Co ltd
Priority date: 2021-01-28
Filing date: 2021-01-28
Publication date: 2022-03-15
Anticipated expiration: 2041-01-28
Also published as: CN112929117A

Abstract

The invention provides a compatible definable communication Ethernet, which divides network messages transmitted in the network into two types of real-time control messages and regular messages, wherein the real-time control messages are triggered and transmitted by a transmitting terminal at a determined time point according to a global synchronization time period and are maintained for a specified time period, a high-priority static flow table triggered by a switching device at a fixed time is forwarded and received by a receiving terminal in a determined real-time domain, the regular messages are transmitted by the transmitting terminal in the regular time domain, are forwarded by a low-priority dynamic flow table of the switching device and are received by the receiving terminal outside the real-time domain of the real-time control message receiving and transmitting, the high-priority static flow table and the low-priority dynamic flow table define the transmitting terminal and the receiving terminal of the network messages, the flow tables define the triggering time and the maintaining time of the flow tables, the devices in the Ethernet realize the global/regional networking based on the time synchronization according to the flow tables, the time-division domain enables deterministic as well as regular communication.

Description

Compatible definable deterministic communication Ethernet

Technical Field

The present invention relates to an ethernet network, and more particularly, to a compatible definable deterministic communication ethernet network.

Background

The explosive development of information technology in the twenty-first century also brought new opportunities and challenges to the traditional industry. The industrial digital transformation of industrial 4.0 is based on the cooperative work of various technologies such as cloud computing and edge computing, which puts higher demands on the industrial communication field.

Compared with other field buses, the Ethernet is more and more widely applied to industrial production process control occasions due to higher bandwidth and stronger flexibility, but due to the problems of easy congestion, large network delay and the like caused by a flooding forwarding mechanism of the Ethernet, a special network needs to be built in industrial real-time control, a bottleneck is easily formed to prevent deep fusion of control and management information through the gateway and the Ethernet of the management information, and the quick response capability of the industrial production process is reduced.

In this context, in order to improve the delay and congestion phenomena of the ethernet, a series of high-real-time network concepts based on time synchronization, such as time triggered network TTE and time sensitive network TSN, are proposed. The networks carry out global synchronization on the time of the whole network through time synchronization protocols such AS IEEE1588, AS6802 and the like, and time-sharing scheduling transmission is carried out according to the synchronized global time, so that the certainty of key information transmission is ensured, the packet loss rate is reduced, and the real-time performance of network messages is improved. On the other hand, these networks with high certainty are generally static networks highly customized according to the actual application scenario, and need to be reconfigured when the usage environment changes, and the operation is complex, the cost is high, and the flexibility is low.

In addition to real-time networking for network determinism, there is a software defined ethernet SDN technology for network flexibility in commercial ethernet applications. The conventional data switching device generally includes a control plane, a data plane, and a management plane, where the management plane and the control plane always have high coupling, and the SDN is to separate the control plane from the original architecture, so as to form a three-layer architecture of an application layer, a control layer, and a forwarding (data) layer. This has the advantage that the switching device can be simplified to become a remote software controlled forwarding device, making both network configuration and fault response easier.

To improve network flexibility/definability, real-time/determinability, and compatibility, a compatible definable deterministic communication ethernet is proposed.

Disclosure of Invention

To address the issues of real-time and flexibility in ethernet networks, the present invention provides a compatible definable deterministic communications ethernet network.

The invention provides a compatible and definable deterministic communication Ethernet which is used for realizing communication between network devices in the Ethernet, the Ethernet enables the types of network messages transmitted in the network to comprise Real-time control messages (RM) and regular messages (NM), the Real-time control messages are triggered and transmitted by a transmitting end at a determined time point according to a global synchronization time period and are maintained for a specified period of time, the messages are forwarded through a high-priority static flow table triggered in a switching device at a fixed time and are received by a receiving end in a determined Real-time domain to realize deterministic communication, the regular messages are randomly triggered by each node in the Ethernet according to events, the regular messages are transmitted by the transmitting end in a regular time domain, are forwarded through a low-priority dynamic flow table in the switching device and are received by the receiving end outside the Real-time domain of the transceiving of the Real-time control messages to realize regular communication, wherein, the high priority static flow table and the low priority dynamic flow table define the sending end and the receiving end of the network message, the high priority static flow table and the low priority dynamic flow table define the triggering time and the maintaining time through the scheduling table, the device in the Ethernet realizes the global/regional networking based on the time synchronization according to the high priority static flow table or the low priority dynamic flow table, the time division domain realizes the deterministic communication and the conventional communication, the Ethernet separates the real-time control message with real-time property and the non-real-time conventional message transmission by dividing the traditional Ethernet into the real-time control layer and the information transmission layer on the time domain, and fundamentally solves the link congestion and the packet loss problem of the real-time control message caused by other network information transmission on the link, and simultaneously, in order to improve the reliability and the flexibility of the real-time control message, the flow table forwarding rules are controlled through the scheduling table, the flow table forwarding rules can be modified through software or scripts, the faulty link is avoided actively, the communication content of the information transmission layer can be compatible with an OSI seven-layer network model of the traditional Ethernet, namely, the messages of the traditional Ethernet are transmitted in the Ethernet as conventional messages, and the compatibility of the network structure is guaranteed.

Preferably, the ethernet network comprises a controller, a switching device and a terminal device, wherein the controller controls the dispatch of a scheduling table, a high-priority static flow table and a low-priority dynamic flow table, the switching device and the terminal device perform global/regional time synchronization based on a clock calibration module, the terminal device serving as a sending end sends a network message to the switching device when the ethernet network performs network communication, the switching device distinguishes the type of the network message according to the scheduling table and the flow table type issued by the controller after receiving the network message, judges a time domain and an output interface forwarded by the network message and then sends the time domain and the output interface to the terminal device serving as a receiving end, and the combination of the devices is a minimum regional networking unit of the ethernet network. When the Ethernet is accessed into a larger control network, synchronous domains can be synchronously divided according to the regional time. Different synchronization domains cannot directly send RM messages but can still transmit NM messages because the clocks synchronized by the RM messages are different, and the RM messages are transmitted as NM messages in another synchronization domain when crossing the synchronization domains, so that the transmission paths of the RM messages and related equipment are required to be considered preferentially when the synchronization domains are divided, and then according to the principle of proximity, a star network structure (or a tree network structure) formed by synchronous slaves to synchronous hosts in the same synchronization domain is balanced as much as possible, and the consistency of synchronization precision is ensured. For other devices which do not support PTP synchronization and switching devices which do not support SDN control, the compatibility may be performed, but the compatibility cannot be performed, that is, the RM-type message cannot be transmitted, but the NM-type message may still be transmitted.

Preferably, the switching device includes a predetermined number of network ports, a main control module, a power module, a storage module, a plurality of physical layer chips and a plurality of network transformers, a network message is input into the switching device from one of the network ports and is identified and controlled by the main control module, the network message is distinguished as deterministic communication or conventional communication according to the matching of a scheduling table issued by the controller and a flow table with global/regional time synchronization, and a time domain and an output interface for forwarding the network message are judged, wherein the main control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, network message forwarding and scheduling, and flow table timed addition and deletion; the storage module comprises an SD card, a FLASH, an SRAM or a DDR and is used for storing a system bootloader, a file system and temporary data; the physical layer chip is used for creating, maintaining or dismantling a physical link; the network transformer is used for electrical isolation and noise suppression of network equipment.

Preferably, the embedded operating system run by the main control module of the switching device includes Linux or OpenWRT, the ethernet may install all software supported by the ethernet based on the operating system, run complex control instructions, and provide thread scheduling to facilitate modular management of different applications, the operating system is installed with an Open vSwitch virtual switch, one of the ports is used as a controller interface, and the other ports are added to a network bridge created by the Open vSwitch, and are different from a MAC/port mapping table of a common bridge, the Open vSwitch manages forwarding rules through a flow table, and the flow table has advantages over the MAC/port mapping table in that it can not only forward network messages to corresponding ports according to link layer MAC addresses, but also divide vslans and forward the messages through vLAN IDs and priorities, and is not limited to the link layer, and can also forward the messages according to source IP addresses of the messages in the network layer and the transport layer, When the network synchronization protocol is higher than a second layer link layer and needs to relate to a network layer and a transmission layer, the network interface managed by the network bridge is divided into the same vLAN, the IP address needs to be configured for the network bridge, the synchronous message frame can be ensured to be received and processed by a main control panel of the switching equipment, the switching equipment is also positioned in the same global time synchronization domain, and a controller connected with the control port can selectively participate in the global time synchronization.

The controller is an SDN controller, an OpenFlow protocol is installed on an operating system of the switching device and used for supporting the SDN controller to participate in network communication management, the SDN controller is connected with a controller interface of an Open vSwitch, an Open vSwitch flow table is managed based on the OpenFlow protocol or the controller interface is directly operated on certain switching device to directly control the device and other slave devices connected to the device. The user can manually add or delete the flow table and customize the forwarding rule.

Preferably, the control strategy of the SDN controller needs to obtain relevant information of the entire network and schedule the RM message, in addition to satisfying the dynamic flow table issue required by NM message forwarding. The SDN controller can acquire network information such as current network topology, link flow, physical bandwidth and the like through an OpenFlow protocol, but cannot directly acquire information such as devices supporting PTP, PTP synchronous domains, non-SDN switches and the like. Therefore, for information acquisition of PTP-related synchronization classes, an additional TCP server and a designated port need to be added to the RYU controller, which facilitates connection of PTP devices. After the PTP device is connected to the TCP server, it needs to send information such as its own device type, the synchronization domain where it is located, the specific period/length/destination address of the RM message, and the like to the RYU controller. And the RYU controller solves the scheduling of the RM message through a particle swarm-based static scheduling algorithm according to the information, generates a scheduling table for each synchronous domain, and issues a high-priority static flow table which needs time triggering to the Open vSwitch according to the scheduling table. When a new device is added in the network, the device is waited to be connected with the TCP server within a period of time, if the waiting time is exceeded, the device is considered not to support PTP and RM messages, if relevant information sent by the device is received, scheduling planning is carried out once again, and a static flow table is issued.

Preferably, the terminal device includes a computer terminal connected to a network card device, the network card device includes a main control module, a power module, a storage module, a serial communication module, a plurality of physical layer chips and a plurality of network transformers, when a network message needs to be sent, the network message generated by the current computer terminal is sent to the main control module through the serial communication interface, the main control module judges the message type and then sends a corresponding message to the switch at a corresponding time domain at regular time, when the network message needs to be received, the main control module receives the network message from the switch and processes the message and then transmits the message to the computer terminal through the serial communication interface, wherein the main control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, serial communication and network message timing triggering; the storage module comprises an SD card, a FLASH, an SRAM or a DDR and is used for storing a system bootloader, a file system and temporary data; the serial communication module comprises PCI, PCIe and USB and is responsible for the communication between the main control module and the computer end; the physical layer chip is used for creating, maintaining or dismantling a physical link;

the network transformer is used for electrical isolation and noise suppression of network equipment.

Preferably, the embedded operating system run by the main control module of the terminal device includes Linux or FreeRTOS, and the terminal device can decouple the functions required by the device based on the operating system, and has the functions of supporting a network protocol stack, customizing user applications and other functions.

Preferably, the terminal device comprises an embedded device, the embedded device comprises a main control module, a power module, a physical layer chip, a network transformer, a network port, and a predetermined number of digital input module, digital output module, analog input module, and analog output module, when a network message is required to be sent, the main control module collects digital/analog signals from the digital input module/analog input module to perform network message encapsulation, the main control module judges the type of the network message and then sends a corresponding message to the switch at a corresponding time domain through the network port, when a network message is required to be received, the main control module receives the network message from the switch through the network port, the main control module analyzes the network message and then outputs the digital/analog signals at the designated digital output module/analog output module, the master control module is used for protocol encapsulation and analysis, signal conversion, global/regional clock calibration, network message caching, serial communication and network message timing triggering; the physical layer chip is used for creating, maintaining or dismantling a physical link; the network transformer is used for electrical isolation and noise suppression of network equipment.

Preferably, the operating system run by the main control module of the embedded device comprises a FreeRTOS or μ C/OS, so that the embedded device has an ethernet module and can support a lightweight network protocol stack, a custom digital-to-analog input-output conversion protocol, a custom control protocol and a thread.

Preferably, the switching device and the terminal device implement global/regional time synchronization based on a global clock calibration module, the clock calibration module provides clock synchronization and a network message timestamp for the terminal device, the network message timestamp includes a hardware timestamp and a software timestamp, the global clock calibration module includes a global time register, a cycle time register, a time correction register, a time step length register, a cycle register and a plurality of trigger time registers, wherein the global time register is a system time source and is an output result of the global clock correction module; the cycle time register is accumulated relative to the global time register and is not cleared in a timing mode, a timing result is cleared periodically, and a clear period is a value stored in the cycle register; the time correction register is a register for obtaining correction control quantity through a correction algorithm according to synchronous time errors obtained through calculation of a synchronous protocol, and the register value is updated to correct the local system time timing rate; the time step size register has an effect on the time timing rate but its value is related to the input system clock; the trigger time register is the basis for triggering the timer, and when the value of the cycle time register is equal to the value of any trigger time register, a corresponding trigger signal is generated.

Preferably, the switching device sets a plurality of timers for controlling forwarding of the real-time control message based on global synchronization time, the timers for messages in the same channel cannot be triggered at the same time based on a set period, and need to have fixed time offset in the period, when a certain timer is triggered, an RM message flow table corresponding to the timer is added to the Open vSwitch, and other NM message flow tables are deleted, so as to ensure forwarding of the real-time control message, and after the fixed period, the flow table is removed and the original flow table is restored, so that normal communication of other messages is ensured.

Preferably, the terminal device sets a plurality of timers for sending and receiving the real-time control message based on the global synchronization time, the timers require to trigger the control and the reception of the real-time control message at a fixed time offset point in a set period based on the set period, at a non-timer trigger time, a message sent by the computer end enters a buffer queue of the real-time control message to wait for the timer trigger, when the timer triggers, the link state is switched to a real-time control layer to block the sending and receiving of other common messages and only transmits the real-time control message, and after the transmission of the control message is finished, the link is switched back to an information transmission layer state to recover the sending and receiving of the common message.

The compatible definable deterministic communication Ethernet provided by the invention can realize definable area/global synchronous communication based on global time synchronization, can provide time trigger service for real-time control messages, separate the real-time control messages with real-time property from non-real-time conventional message transmission, fundamentally solve the link congestion and packet loss problems of the real-time control messages caused by other network information transmission from a link, realize deterministic communication of network messages, and also can define the time domain and transmission path of the real-time control messages through a scheduling table and a flow table to achieve the aim of dynamic planning.

Drawings

FIG. 1 is a schematic diagram of a compatible definable deterministic communications Ethernet global network device connection scenario provided by the present invention;

FIG. 2 is a schematic diagram of a compatible definable deterministic communications Ethernet message schedule provided by the present invention;

FIG. 3 is a compatible definable deterministic communications Ethernet networking flow diagram provided by the present invention;

FIG. 4 is a schematic diagram of the compatible definable deterministic communications Ethernet synchronization domain partitioning provided by the present invention;

FIG. 5 is a diagram of a generic hardware architecture for a compatible definable deterministic communications Ethernet network device provided by the present invention;

FIG. 6 is a schematic diagram of a synchronization process when a PTP synchronization protocol based on IEEE1588 standard is adopted in the compatible definable deterministic communication Ethernet provided by the present invention;

FIG. 7 is a block diagram of a timing correction module in a host module of a compatible definable deterministic communication Ethernet network device in accordance with the present invention;

FIG. 8 is a schematic diagram of a synchronization model for a compatible definable deterministic communication Ethernet network using a PTP synchronization protocol based on the IEEE1588 standard;

FIG. 9 is a schematic diagram illustrating the synchronization effect of the compatible definable deterministic communication Ethernet provided by the present invention on the optimization of the PTP synchronization protocol;

FIG. 10 is a diagram of a compatible definable deterministic communications Ethernet switch host module software architecture provided by the present invention;

FIG. 11 is a schematic diagram of a software architecture of a host module of a compatible definable deterministic communication Ethernet card device according to the present invention;

FIG. 12 is a schematic diagram of a compatible definable deterministic communication Ethernet embedded device host module software architecture provided by the present invention;

FIG. 13 is a software flow diagram of a compatible definable deterministic communications Ethernet switching device provided by the present invention;

FIG. 14 is a software flow diagram of a compatible definable deterministic communications Ethernet card device provided by the present invention;

FIG. 15 is a schematic diagram of the software flow of a compatible definable deterministic communications Ethernet embedded device provided by the present invention.

Detailed Description

The compatible definable deterministic communication ethernet provided by the present invention is further described below with reference to the accompanying drawings, and it should be noted that the technical solution and design principle of the present invention are described in detail below with reference to only one optimized technical solution.

Specifically, the implementation process is described in detail with reference to fig. 1 to 15:

referring to fig. 1, the compatible definable deterministic communication ethernet is composed of a plurality of switching devices 2, a plurality of terminal devices 3, a plurality of embedded devices 4, and a controller 1, wherein the controller controls the issuance of a schedule table, a high-priority static flow table, and a low-priority dynamic flow table, the switching devices and the terminal devices perform global/regional time synchronization based on a clock calibration module, when the ethernet performs network communication, the terminal device serving as a sending end sends a network message to the switching devices, after receiving the network message, the switching devices distinguish the type of the network message according to the schedule table and the type of the flow table issued by the controller, determine a time domain and an output interface to which the network message is forwarded, and then send the time domain and the output interface to the terminal device serving as a receiving end, and the combination of the devices is a minimum regional networking unit of the ethernet. The controller is any device for operating software of the SDN controller, and may be connected to the switching device in a wireless or wired 5 manner, and when the device is connected in a wired manner, the device needs to be connected to the control network port 6 of the switching device 2, and when the device is connected in a wireless manner, each switching device 2 needs to have an independent wifi module to be connected to the SDN controller 1. In addition to the wired and wireless connection, the SDN controller 1 may also directly run on a certain switching device 1, that is, one switching device may have two functions at the same time. Except for controlling the network port 6, the switching device 2 is arranged under the same network bridge structure, and is managed by Open vSwitch. The terminal device 3 is specifically a computer with a network card device inserted into a PCIe slot, and the network card device is connected to the switching device in a limited manner. The embedded device 4 participates in the global network synchronization, complies with the specified digital-analog signal input-output protocol and has a time-triggered function, and is also connected to the rest of the network ports of the switching device except the control network port in a wired manner.

With particular reference to fig. 2, a compatible definable deterministic communications ethernet message schedule provided by the present invention is shown. Scheduling operation needs to be performed on the RM message in the SDN controller, a scheduling table of each device is calculated, and the scheduling table is issued to the corresponding device. The device adds or deletes the high priority stream table item at regular time according to the period, the offset, the RM message length, the stream table item and other contents in the dispatch table, thereby finally realizing the time division multiplexing function of the network link and ensuring the reliability and the certainty of the RM message.

In this embodiment, the controller is an SDN controller, an OpenFlow protocol is installed on an operating system of the switching device to support the SDN controller to participate in network communication management, the SDN controller is connected to a controller interface of an Open vSwitch, and manages an Open vSwitch flow table based on the OpenFlow protocol, or directly operates on a certain switching device to directly control the device and other slave devices connected to the device. The user can manually add or delete the flow table and define the forwarding rule, and the control strategy of the SDN controller meets the requirement of dynamic flow table issuing required by NM message forwarding, and needs to acquire the related information of the whole network and schedule the RM message. The SDN controller can acquire network information such as current network topology, link flow, physical bandwidth and the like through an OpenFlow protocol, but cannot directly acquire information such as devices supporting PTP, PTP synchronous domains, non-SDN switches and the like. Therefore, for information acquisition of PTP-related synchronization classes, an additional TCP server and a designated port need to be added to the RYU controller, which facilitates connection of PTP devices. After the PTP device is connected to the TCP server, it needs to send information such as its own device type, the synchronization domain where it is located, the specific period/length/destination address of the RM message, and the like to the RYU controller. And the RYU controller solves the scheduling of the RM message through a particle swarm-based static scheduling algorithm according to the information, generates a scheduling table for each synchronous domain, and issues a high-priority static flow table which needs time triggering to the Open vSwitch according to the scheduling table. When a new device is added in the network, the device is waited to be connected with the TCP server within a period of time, if the waiting time is exceeded, the device is considered not to support PTP and RM messages, if relevant information sent by the device is received, scheduling planning is carried out once again, and a static flow table is issued. Referring to fig. 3, a compatible definable deterministic communications ethernet networking flow provided by the present invention is shown. And after the system is started, generating the whole network topology structure through a spanning tree protocol of the SDN. Then, the SDN controller opens a TCP port, and in the whole network, the device provided by the invention actively connects the TCP port and reports the information of the PTP clock level of the device and the type, length, period and the like of the RM message required to be sent. The SDN controller calculates a scheduling table of the RM messages according to the collected information based on a particle swarm algorithm so as to avoid link collision of the RM messages. The scheduling table of each device is a scheduling table for the RM message of the device, and includes information such as the RM message cycle, the time offset of transmission, the synchronization field, and the like, and the switching device also needs flow table entry information. After each equipment node receives the scheduling table, the scheduling table is synchronized to the host clock of the corresponding synchronous domain according to the number of the own synchronous domain, and then scheduling of the RM message and transmission of other NM messages are started. When a new device is added, waiting for the new device to transmit RM message information, if the RM message information is not received by the SDN controller after a certain time, considering that the RM message is not supported by the device, and if the RM message information is received, scheduling and planning the whole network again.

When the Ethernet is accessed into a larger control network, synchronous domains can be synchronously divided according to the regional time. Different synchronization domains cannot directly send RM messages but can still transmit NM messages because the clocks synchronized by the RM messages are different, and the RM messages are transmitted as NM messages in another synchronization domain when crossing the synchronization domains, so that the transmission paths of the RM messages and related equipment are required to be considered preferentially when the synchronization domains are divided, and then according to the principle of proximity, a star network structure (or a tree network structure) formed by synchronous slaves to synchronous hosts in the same synchronization domain is balanced as much as possible, and the consistency of synchronization precision is ensured. For other devices which do not support PTP synchronization and switching devices which do not support SDN control, the compatibility may be performed, but the compatibility cannot be performed, that is, the RM-type message cannot be transmitted, but the NM-type message may still be transmitted. With particular reference to fig. 4, the compatibility-definable deterministic communications ethernet network synchronization domain partitioning diagram provided by the present invention. The SDN controller is software running on an independent host, the network port of the SDN controller is expanded through the common switch and is connected with a plurality of switching devices of the invention, and the terminals and embedded devices of the invention are connected to the switching devices. The SDN controller and the switching device do not participate in time synchronization. RM messages cannot be transmitted but NM messages can be transmitted between different synchronization domains, so that the synchronization domains are divided according to the principle of proximity and RM message transmission paths.

Referring to fig. 5, in the embodiment of local hardware devices of the switching device and the terminal device, since the two devices are locally identical in hardware structure, a general hardware device diagram is adopted, and specific differences are described in detail below:

the switching equipment comprises a preset number of network ports, a main control module, a power supply module, a storage module, a plurality of physical layer chips and a plurality of network transformers, wherein a network message is input into the switching equipment from one of the network ports, is identified and controlled by the main control module, is distinguished to be deterministic communication or conventional communication according to the matching of a scheduling table and a flow table issued by a controller with global/regional time synchronization, and judges a time domain and an output interface for forwarding the network message, wherein the main control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, network message forwarding and scheduling, and flow table timed addition and deletion, and in the implementation, the specific model of the chip of the main control module is XC7Z020-2CLG 484I; the storage module comprises an SD card, a FLASH, an SRAM or a DDR and is used for storing a system bootloader, a file system and temporary data; the physical layer chip is used for establishing, maintaining or removing a physical link, and the physical layer chip adopts a kilomega KSZ9031RN physical layer chip; in the embodiment, a conventional RJ45 interface HR911130C is adopted, a power supply module is a DCDC conversion circuit, an input 12V voltage is reduced, and 3.3V, 5V, 1.8V and 1.2V voltages are provided for other modules by adjusting the size of a resistor.

The terminal device comprises a computer end connected with a network card device, the network card device comprises a main control module, a power supply module, a storage module, a serial communication module, a plurality of physical layer chips and a plurality of network transformers, when the network message is required to be sent, the network message generated by the current computer end is sent to the main control module through the serial communication interface, the main control module judges the message type and then sends the corresponding message to the switch at the corresponding time domain at regular time, when the network message needs to be received, the main control module receives the network message from the switch, processes the network message and transmits the processed network message to the computer end through the serial communication interface, wherein the master control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, serial communication, network message timing triggering, in this implementation, the specific model of the chip of the main control module is XC7Z015-2CLG485I in ZYNQ7000 series; the storage module comprises an SD card, a FLASH, an SRAM or a DDR and is used for storing a system bootloader, a file system and temporary data; the serial communication module comprises PCI, PCIe and USB and is responsible for the communication between the main control module and the computer end; the physical layer chip is used for creating, maintaining or removing a physical link, and in this embodiment, the physical layer chip selects a gigabit KSZ9031RN physical layer chip; the network transformer is used for electrical isolation and noise suppression of network equipment, and in the embodiment, a conventional RJ45 interface HR911130C is adopted; referring to fig. 5, the power module is a DCDC conversion circuit, and reduces the voltage of 12V, and provides 3.3V, 5V, 1.8V, and 1.2V to other modules by adjusting the resistance.

The terminal equipment comprises an embedded equipment, the embedded equipment comprises a main control module, a power supply module, a physical layer chip, a network transformer, a network port, a preset number of digital quantity input modules, digital quantity output modules, analog quantity input modules and analog quantity output modules, when a network message needs to be sent, the main control module collects digital/analog signals from the digital quantity input modules/analog signal input modules for network message encapsulation, the main control module judges the type of the network message and then sends corresponding messages to a switch at regular time through the network port in corresponding time domains, when the network message needs to be received, the main control module receives the network message from the switch through the network port, the main control module analyzes the network message and then outputs the digital/analog signals at the appointed digital quantity output modules/analog quantity output modules, the main control module is used for protocol encapsulation and analysis, signal conversion, global/regional clock calibration, network message caching, serial communication and network message timing triggering, and in the implementation, the specific model of a chip of the main control module is STM32F 107; the physical layer chip is used for creating, maintaining or removing a physical link, and in this embodiment, the physical layer chip is a LAN8720A physical layer chip; the network transformer is used for electrical isolation and noise suppression of network equipment, and in the embodiment, a conventional RJ45 interface HR911130C is adopted; referring to fig. 5, the power module is a DCDC conversion circuit, and reduces the voltage of 12V, and provides 3.3V, 5V, 1.8V, and 1.2V to other modules by adjusting the resistance.

Referring to fig. 6, a PTP synchronization protocol based on IEEE1588 standard may be used in a compatible and definable deterministic communication ethernet network provided by the present invention, where the synchronization protocol is a master-slave synchronization protocol, and assuming that the same link delay is equal, the deviation of the slave node from the master node clock and the link delay are calculated through message exchange of the master node and the slave node. In PTP synchronization, the synchronization master first transmits a synchronization frame (Sync) to the synchronization slave, and records a timestamp t1 of the master when the synchronization frame is transmitted, and when the synchronization slave receives the synchronization frame from the synchronization master, records a timestamp t2 of the slave when the synchronization slave receives the synchronization frame. If PTP is set to one-step synchronization, the timestamp t1 will be written into the message of the synchronization frame before the synchronization frame is sent, and the synchronization slave can extract the timestamp t1 directly from the synchronization frame; if PTP is set to two-step synchronization, then timestamp t1 will be encapsulated into the following frame (Follow _ Up), from which the synchronization slave takes timestamp t 1. In addition to the synchronization master sending a synchronization frame to the synchronization slave, the synchronization slave needs to send a delay request frame to the synchronization master. Considering that the link delay generally does not vary much in a short time, the frequency of transmission of the delay request frame is generally lower than the frequency of transmission of the synchronization frame. When the request is delayed, the synchronous slave sends a Delay request frame (Delay _ Req) to the synchronous master, records a time stamp t3 of the slave at the sending time, receives a master time stamp t4 after the synchronous master receives the time stamp, and encapsulates t4 into a Delay response frame (Delay _ Resp) to send the Delay response frame back to the synchronous slave. Through the message exchange of the above steps, the slave is now synchronized with four timestamps known as t1, t2, t3 and t 4.

Let T _ s be T _ m + offset, where T _ m is the current time of the synchronization master, T _ s is the current time of the synchronization slave, and offset is the clock offset from the slave to the master. Assuming that the delay of the message between the master and the slave on the link is delay, the following relationships exist among t1, t2, t3 and t 4:

t1+offset＝t2-delay

t3-offset＝t4-delay

from this, the offset and delay can be calculated:

offset＝(t3-t1+t2-t4)/2

delay＝(t2+t4-t1-t3)/2

the delay request is generally lower than the synchronous frequency, and when the request is not delayed for a period, the clock deviation can be obtained by directly using the link delay obtained by the last calculation. After the deviation of the slave clock relative to the master clock is obtained, the slave clock can be corrected by adopting a phase-locked loop and other modes.

Referring to fig. 7, the timing correction module in each main control module of the compatible definable deterministic communication ethernet device is designed similarly to a phase-locked loop, and the increment register increases the value in the increment register every system clock cycle, and if the 32-bit increment register overflows, the value in the increment register is added to the sub-second register, and if the sub-second register overflows again, the value is carried into the second register. The time stamp register is composed of a sub-second register and a second register. It can be seen that the three variables that affect the local clock are the addend register, the increment register, and the real system clock frequency. The value of the increment register is determined by the frequency of the system clock, and is not changed after the determination, and the PTP adjusts the value in the addend register, namely the timing speed of the timing module can be understood.

The initial value of the addend register is calculated in the following way, and the PTP clock frequency represented by pclk is accumulated

The increment register is a constant that does not change after initialization, and represents the step size of the sub-second register,

the PTP calculates the time deviation of the slave relative to the master and then controls the slave through addend, and the calculation formula is as follows:

addend(n+1)＝Δaddend(n)+addend_init

referring to fig. 85, the compatible definable deterministic communication ethernet provided by the present invention optimizes the PTP synchronization protocol based on IEEE1588 standard, and modifies the low pass filter and the synchronization process. For the figure

Optimization is as follows

The feedforward link in the model is optimized, the optimized model is changed from a filter to an attenuator, and the phenomenon that the error of the synchronization result is larger and larger due to the fact that the critical stable state generated by the pole z being 1 diverges under the interference of other external jitters is avoided.

Preferably, in order to ensure the synchronization rapidity and shorten the synchronization establishment time, the PTP precise synchronization stage is subdivided into two sub-stages, namely a rapid convergence sub-stage and a stable synchronization sub-stage. In the fast convergence sub-stage, the attenuator and the PI controller do not participate in the correction of the system clock, after waiting for a plurality of fixed synchronization cycles, the synchronization error is considered to be unable to be further reduced or reach the current optimal state, at this moment, the stable synchronization sub-stage is entered, the attenuator and the PI controller are simultaneously involved, the synchronization error is further reduced, and therefore higher synchronization precision is obtained.

Referring to fig. 9, after the PTP synchronization protocol based on IEEE1588 standard is optimized by the compatible definable deterministic communication ethernet provided by the present invention, the synchronization error convergence speed is greatly increased, and when the fast convergence stage is fixed to 3 synchronization cycles (i.e. 3s), the synchronization accuracy on the test platform is increased from 5 seconds to within 70ns to 3 seconds to within 10ns, which has a significant effect.

Referring to fig. 10, a software architecture of a switching device compatible with a definable deterministic communication ethernet is shown. In this embodiment, the switch device is customized using an FPGA platform, and the underlying logic terminal can be freely programmed to meet the requirements of the compatible definable deterministic communication ethernet switch device.

The FPGA platform comprises a logic end and an ARM end, wherein the logic end comprises a plurality of Ethernet IP cores and a timing correction module, one end of each Ethernet IP core and a physical layer chip interact with the physical layer chip through one of interfaces such as RGMII/GMII/RMII/MII/SGMII and the like to realize the sending and receiving of network messages, the other end of each Ethernet IP core is connected with an AXI bus interface, the AXI bus is a bridge for the communication between the ARM end and the logic end and is used for the data exchange between the ARM end and the logic end, and the network messages interact between the ARM end and the logic end through the bus interface. The timing correction module records a network message sending or receiving timestamp according to the signal as a trigger signal, stores the timestamp in a timestamp register in the module, and the ARM end accesses the timestamp register through an SPI bus interface to read the timestamp in the timestamp register and provides the timestamp for a PTP synchronization protocol to use. And an embedded Linux operating system is operated on the ARM end, and is supported by a bootloader and a file system stored in the SD card. An Open vSwitch virtual switch is installed on the Linux operating system, an Ethernet interface at a logic end in the device tree is managed by a bridge newly built by the Open vSwitch, and an Ethernet module interface carried by an ARM end is used as a control network interface for the SDN switch to access. The bridge newly built by the Open vSwitch is assigned an IP address of the same network segment as the synchronization domain, so that the bridge can receive UDP/IP multicast messages to support a PTP synchronization protocol. Based on the trigger signal from the logic end period register, the time trigger module can periodically trigger the directional addition, deletion, backup and recovery of the flow table, and provides support for the synchronous real-time control message forwarding. On the other hand, the flow table in the Open vSwitch also supports the SDN controller to control through a control network port, so that the purpose of forwarding network messages customized by a user is achieved.

Referring to fig. 11, the present invention provides a switching device software architecture compatible with a definable deterministic communications ethernet. In this embodiment, the network card device is customized by using an FPGA platform, and the bottom logic terminal can be freely programmed to meet the requirement of the compatible definable deterministic communication ethernet network card device.

The FPGA platform comprises a logic end and an ARM end, wherein the functions of the logic end are basically consistent with those of the logic end in the switching equipment, only 1 Ethernet IP core can be reserved, but a PCIe IP core for serial communication needs to be added, and the IP core also communicates with the ARM end in an AXI bus mapping mode to access the memory address of the ARM end. The computer end needs to be correspondingly driven to access the memory of the ARM end through PCIe, and the mapping of PCIe addresses and AXI addresses needs to be configured in the middle.

And the ARM end of the network card equipment runs a FreeRTOS real-time operating system and integrates LwIP to provide network protocol stack support. PTP is operated as an application in FreeRTOS, and transmits and receives synchronization message frames using a UDP/IP multicast interface provided by LwIP. The user can also customize some task applications, network communication is carried out through a TCP/IP protocol stack and the like provided by LwIP, and network messages generated by the task applications are added into the buffer queue. In addition, network messages generated from the computer end through PCIe are also added into the buffer queue, the network messages in the buffer queue can be triggered at a synchronous global time point according to the type code of each message, the real-time control message is extracted and sent, and the time triggering function is also generated by a cycle register at the logic end.

Referring to fig. 12, a software architecture for an embedded device compatible with a definable deterministic communication ethernet is shown. In this embodiment, the embedded device uses an MCU platform, and in order to integrate the timing correction module, the FPGA may intervene between the MCU and the physical layer to provide functions required by the timing correction module, or an MCU supporting an IEEE1588 ethernet module may be used to replace a part of the functions of the timing correction module. The latter scheme is adopted in the figure, the timing correction module is integrated inside the Ethernet module, FreeRTOS is run in ARM, and LwIP is also integrated to provide a network protocol stack. Similar to the network card part, PTP is also used for receiving and sending synchronous message frames through UDP/IP multicast interface provided by LwIP, and task applications can use other supported network protocols for forwarding. The task application generally comprises digital input, digital output, analog input and analog output functions, and a message serialization and deserialization program for packaging digital quantity and analog quantity, and provides analog and digital quantity sampling and analog and digital quantity control functions for the end controlled equipment.

Referring to fig. 13, a compatible definable deterministic communications ethernet switching device program flow is shown. The switching device operates PTP protocol, for PTP synchronous host, each synchronous period multicasts synchronous frame once, and each synchronous delay request period of synchronous slave sends a delay request frame to the synchronous host. In addition, the PTP synchronous master needs to respond when receiving the delay request frame, and the PTP synchronous slave calculates according to a PTP synchronous principle when receiving the synchronous frame, calculates a time correction amount through a correction algorithm after obtaining the time deviation with the synchronous master, corrects the timing rate of the local clock and waits for the next synchronous period. When the time in the period register reaches a preset time point, a trigger signal is generated, the time trigger module judges a flow table corresponding to the currently forwarded real-time control message according to the time point, then the current flow table is backed up and deleted, the forwarding flow table of the real-time control message is added, after the message forwarding is finished, the flow table is restored, and the next time trigger is waited. The switching device analyzes the OpenFlow control message from the SDN controller after receiving the OpenFlow control message, and then adds or deletes a specified flow table according to the control content, so that the remote flexible definition of the flow table is realized.

Referring to fig. 14, a process flow of the compatible definable deterministic communication ethernet card device of the present invention is shown. The network card device participates in global time synchronization by operating the PTP protocol, and the operation flow of the PTP protocol is the same as that of the switching device, which is not described again. When the time in the periodic register reaches a preset time point, a trigger signal is generated, at this time, the sending of other network messages is stopped, the real-time control message is taken out from the buffer queue and sent, and the sending of other messages is resumed after the transmission of the real-time control message is finished. And sending the common messages at the non-time-triggering time point in sequence according to the sequence in the buffer queue. Because the network card device needs to be inserted into a PCIe slot of a computer, the network card device can communicate with a computer end through a PCIe channel, network messages from the computer end also enter a buffer queue, and other configuration information such as clock cycles, trigger time points, PTP register preset values and the like is directly written into corresponding registers.

Referring to fig. 15, a compatible definable deterministic communication ethernet embedded device program flow provided by the present invention is shown. The embedded device participates in global time synchronization by operating a PTP (precision time protocol), the operation flow of the PTP is the same as that of the switching device, and the functions of the time trigger module are substantially the same as those of the network card device, which is not described herein again. When the embedded device receives the control output message, the embedded device analyzes the message and determines the digital or analog quantity to be output, and the required control quantity is output through digital-analog or analog-digital conversion to achieve the purpose of controlling the controlled device at the tail end; or, the digital or analog signals can be periodically acquired, are subpackaged into information acquisition messages and then are stored in a buffer queue, and are divided into real-time control signal types and common message types according to actual requirements, and are sent when waiting time is triggered or sent at other times.

The compatible definable deterministic communication Ethernet provided by the invention adopts the flow table form provided by Open vSwitch to forward the message on the basis of synchronizing the global network time by the network time synchronization protocol, and each network device can trigger the sending or forwarding of the real-time control message according to the synchronized global time, thereby improving the reliability and flexibility of the real-time control message.

The above is only a preferred embodiment of the present invention, and it should be noted that the above preferred embodiment should not be considered as limiting the present invention, and the protection scope of the present invention should be subject to the scope defined by the claims. It will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the spirit and scope of the invention, and these modifications and adaptations should be considered within the scope of the invention.

Claims

1. A compatible definable deterministic communication Ethernet for implementing communication between network devices in the Ethernet, characterized in that the Ethernet divides network messages transmitted in the network into two types, real-time control messages and regular messages, the real-time control messages are triggered and transmitted by a transmitting end at a determined time point according to a global synchronization time period and are maintained for a specified period, the messages are forwarded by a high-priority static flow table triggered at a fixed time in a switching device and received by a receiving end in a determined real-time domain for implementing deterministic communication, the regular messages are randomly triggered by each node in the Ethernet according to events, the regular messages are transmitted by the transmitting end in the regular time domain, the messages are forwarded by a low-priority dynamic flow table in the switching device and received by the receiving end outside the real-time domain of the transceiving of the real-time control messages for implementing regular communication, wherein, the high-priority static flow table and the low-priority dynamic flow table define a sending end and a receiving end of a network message, the high-priority static flow table and the low-priority dynamic flow table define a trigger time and a maintenance time through a scheduling table, a device in the Ethernet realizes global/regional networking based on time synchronization according to the high-priority static flow table or the low-priority dynamic flow table, and realizes deterministic communication and conventional communication in a time division domain, the compatible definable deterministic communication Ethernet comprises a controller, a switching device and a terminal device, the controller controls the dispatching of the scheduling table, the high-priority static flow table and the low-priority dynamic flow table, the switching device and the terminal device carry out global/regional time synchronization based on a clock calibration module, and the terminal device serving as the sending end sends the network message to the switching device when the Ethernet carries out network communication, the switching device distinguishes the network message type according to the scheduling table and the flow table type issued by the controller after receiving the network message, judges the time domain and the output interface of the network message forwarding and sends the time domain and the output interface to the terminal device as a receiving end, the switching device sets a plurality of switching timers for controlling the real-time control message forwarding based on the global synchronization time, the switching timers for the same channel messages cannot be triggered at the same time and need to have fixed time deviation in the period, when a certain switching timer is triggered, the real-time control message flow table corresponding to the switching timer is added to the Open vSwitch, and other conventional message flow tables are deleted to ensure the forwarding of the real-time control message, the flow table is removed after the fixed period and the original flow table is recovered to ensure the normal communication of other messages, the terminal device is based on the global synchronization time, setting a plurality of terminal timers for sending and receiving the real-time control message, wherein the terminal timers require to trigger the control and the receiving of the real-time control message at a fixed time offset point in a set period, when the non-terminal timers trigger time, the message sent by a computer end waits for the triggering of the terminal timers when entering a buffer queue of the real-time control message, when the terminal timers trigger, the link state is switched to a real-time control layer to block the receiving and sending of other common messages and only transmit the real-time control message, and after the transmission of the control message is finished, the link is switched back to the state of an information transmission layer to recover the receiving and sending of the common messages.

2. The Ethernet network of claim 1, wherein the switching device comprises a predetermined number of ports, a host, a power module, a memory module, a plurality of physical layer chips and a plurality of network transformers, wherein a network message is input into the switching device from one of the ports, is identified and controlled by the host, is matched with the flow table for global/regional time synchronization according to a schedule table issued by the controller, is differentiated into deterministic communication or regular communication, and is forwarded by the network message at a time domain and an output interface, wherein,

the master control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, network message forwarding and scheduling, and flow table timing addition and deletion;

the storage module comprises an SD card, a FLASH, an SRAM or a DDR and is used for storing a system bootloader, a file system and temporary data;

the physical layer chip is used for creating, maintaining or dismantling a physical link;

3. A compatible definable deterministic communication ethernet according to claim 2, characterised in that the operating system run by the host module of the switching device comprises Linux or OpenWRT, on which an Open vSwitch virtual switch is installed, one of the ports of the switching device being a controller interface, the other ports being added to the network bridge created by the Open vSwitch.

4. A compatible definable deterministic communication ethernet network according to claim 3, wherein the controller is an SDN controller, and wherein an OpenFlow protocol is installed on the operating system of the switching device for supporting the SDN controller to participate in network communication management.

5. A compatible definable deterministic communication Ethernet according to claim 1, characterized in that the terminal device comprises a computer side connected to a network card device, the network card device comprises a main control module, a power supply module, a storage module, a serial communication module, physical layer chips and network transformers, when a network message needs to be sent, the network message generated by the current computer side is sent to the main control module via the serial communication interface, the main control module judges the type of the message and then sends a corresponding message to the switch at a corresponding time domain at a fixed time, when a network message needs to be received, the main control module receives the network message from the switch, processes the message and transmits the message to the computer side via the serial communication interface, wherein,

the master control module is used for protocol encapsulation and analysis, global/regional clock calibration, network message caching, serial communication and network message timing triggering;

the serial communication module comprises PCI, PCIe and USB and is responsible for the communication between the main control module and the computer end;

6. A compatible definable deterministic communication Ethernet network according to claim 5, characterised in that the operating system run by the host module of the terminal device comprises Linux or FreeRTOS.

7. A compatible and definable deterministic communication ethernet according to claim 1, wherein the terminal device comprises an embedded device, the embedded device comprises a main control module, a power module, a physical layer chip, a network transformer, a network port, a predetermined number of digital input modules, digital output modules, analog input modules, and analog output modules, when a network message needs to be sent, the main control module collects digital/analog signals from the digital input modules/analog input modules for network message encapsulation, the main control module determines the type of the network message and then sends a corresponding message to the switch at a corresponding time domain through the network port, when a network message needs to be received, the main control module receives the network message from the switch through the network port, and after the main control module parses the network message, the main control module outputs the digital/analog message at the designated digital output modules/analog output modules The number of which is, among others,

the master control module is used for protocol encapsulation and analysis, signal conversion, global/regional clock calibration, network message caching, serial communication and network message timing triggering;

8. A compatible definable deterministic communication ethernet network according to claim 7, characterised in that the operating system run by the master module of the embedded device comprises a FreeRTOS or a μ C/OS.

9. A compatible definable deterministic communication Ethernet according to any of claims 1 to 8 characterised in that the switching devices and the terminal devices implement global/regional time synchronisation based on a global clock alignment module providing clock synchronisation and network message timestamps to the terminal devices, the network message timestamps including hardware and software timestamps, the global clock alignment module including a global time register, a cycle time register, a time correction register, a time step register, a cycle register and trigger time registers, wherein,

the global time register is a system time source and is an output result of the global clock correction module;

the cycle time register is accumulated relative to the global time register and is not cleared in a timing mode, a timing result is cleared periodically, and a clear period is a value stored in the cycle register;

the time correction register is a register for obtaining correction control quantity through a correction algorithm according to synchronous time errors obtained through calculation of a synchronous protocol, and the register value is updated to correct the local system time timing rate;

the trigger time register is the basis for triggering the exchange timer and the terminal timer, and when the value of the cycle time register is equal to the value of any trigger time register, a corresponding trigger signal is generated.