CN112888199A - Method for forming pin jack of multilayer PCB - Google Patents
Method for forming pin jack of multilayer PCB Download PDFInfo
- Publication number
- CN112888199A CN112888199A CN202110056374.5A CN202110056374A CN112888199A CN 112888199 A CN112888199 A CN 112888199A CN 202110056374 A CN202110056374 A CN 202110056374A CN 112888199 A CN112888199 A CN 112888199A
- Authority
- CN
- China
- Prior art keywords
- hole
- pcb
- middle layer
- outer layer
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 21
- 230000000149 penetrating effect Effects 0.000 claims abstract description 10
- 238000003825 pressing Methods 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 155
- 238000005553 drilling Methods 0.000 claims description 11
- 238000010030 laminating Methods 0.000 claims description 9
- 239000002356 single layer Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 6
- 150000003071 polychlorinated biphenyls Chemical class 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a method for arranging pin jacks of multilayer PCBs.A multilayer PCB laminated on an inner layer forms a middle layer plate group, a middle layer through hole is drilled on the middle layer plate group after the middle layer plate group is laminated and molded, and the middle layer through hole penetrates through the whole middle layer plate group; pressing PCB plates on two sides of the middle layer plate set respectively to form two groups of outer layer plate sets respectively; an outer layer through hole is arranged on the outer layer plate group on one side in a penetrating manner, the outer layer through hole is aligned with the middle layer through hole to form a blind hole, and the depth of the blind hole is larger than the length of the pin to be inserted; the outer layer board group of both sides is middle with middle layer board group clamp, forms a complete PCB board group, and the middle level through-hole is equivalent to buried hole at whole PCB board group, and outer through-hole and middle level through-hole set up independently respectively, and final common combination forms the blind hole for the cartridge pin, adopt this structure to reduce the length of pin jack, reduced antenna effect, owing to there are some PCB sheet layers that do not trompil, the wiring of these PCB sheet layers does not receive the influence of blind hole, therefore space utilization has been promoted.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming pin jacks of a multilayer PCB.
Background
With the rapid development of electronic products, the electronic products currently show two obvious trends, namely, light, thin, short, and high-speed and high-frequency, and the development of corresponding PCB (Printed Circuit Board) boards also develops in the direction of high density, high integration, packaging, miniaturization, and multilayering. The high-rise plate wiring has short length, low circuit impedance, high-frequency and high-speed work and stable performance, can bear more complex functions, and is mainly used in the fields of high-rise plate communication equipment, high-end servers, medical electronics, aviation, industrial control, military and the like.
The connector is essential on the PCB as an interface for connecting the PCB with external equipment. The connectors are classified into SMT (Surface Mount Technology) components and DIP (dual inline-pin package) components.
The DIP connector requires a PTH (plated Through Hole) Hole to be correspondingly formed in a PCB, and a metallization process is performed in the Hole, so that a connection function is realized between the inner parts of the lines of each layer.
The PIN foot of DIP type connector designs into PTH hole form on PCB, and PTH hole all will be avoided to all aspect around the through-hole, can not walk the line, and the part can not be placed to the back of connector. The area utilization of the PCB is reduced. Copper is plated in the whole hole in the production process of the PCB, and the copper can be conducted with the inner layer wiring, but the wiring of the connector is only distributed in a plurality of laminated layers, particularly the wiring of the high-speed wire, and a pair of high-speed wires is only designed in one laminated layer. The traces of other stacks run on the vias, which can cause short circuits, so the via design can increase the risk of short circuits. The DIP type connector is many external high-speed device, and it is mostly the high-speed line to be qualified for the next round of competitions, and the high-speed line wiring is mostly the inlayer, and the remaining copper foil of through-hole will become the antenna, is called stub, forms the antenna effect, influences the high-speed line signal.
For those skilled in the art, how to solve the disadvantages of inserting the PTH holes into the pins is a technical problem to be solved at present.
Disclosure of Invention
The invention provides a method for forming pin jacks of a multilayer PCB (printed circuit board), which adopts a blind hole arrangement mode, reduces the depth of holes, and reduces the influence on wiring and antenna effect, and the specific scheme is as follows:
a method for forming pin jacks of a multilayer PCB comprises the following steps:
laminating the multilayer PCB plates of the inner layer to form a middle layer plate group;
drilling a middle layer through hole on the middle layer plate group;
pressing PCB plates on two sides of the middle layer plate set respectively to form two groups of outer layer plate sets respectively;
and outer layer through holes are arranged on the outer layer plate group on one side in a penetrating manner, the outer layer through holes are aligned with the middle layer through holes to form blind holes, and the depth of each blind hole is larger than the length of a pin to be inserted.
Optionally, the outer layer plate group on one side is provided with an outer layer through hole in a penetrating manner, specifically including:
pressing a layer of PCB on the middle layer board group, and drilling a hole on the single layer of PCB by laser to form a through hole;
and repeating the steps, laminating layer by layer and forming holes until the whole outer plate group is formed.
Optionally, the outer plate group on one side of the middle plate group seals the middle through hole, and the outer through hole is formed in the outer plate group on the other side.
Optionally, the number of layers of the outer plate group arranged on one side of the middle plate group is equal to the number of layers of the outer plate group without holes on the other side.
Optionally, the difference between the depth of the blind hole and the length of the pin to be inserted is smaller than the thickness of one PCB.
Optionally, the inner diameter of the minimum inner diameter position of the blind hole formed by the middle layer through hole and the outer layer through hole is larger than the outer diameter of the pin by 0.7-0.9 mm.
The invention provides a method for arranging pin jacks of multilayer PCBs.A multilayer PCB laminated on an inner layer forms a middle layer plate group, a middle layer through hole is drilled on the middle layer plate group after the middle layer plate group is laminated and molded, and the middle layer through hole penetrates through the whole middle layer plate group; pressing PCB plates on two sides of the middle layer plate set respectively to form two groups of outer layer plate sets respectively; an outer layer through hole is arranged on the outer layer plate group on one side in a penetrating manner, the outer layer through hole is aligned with the middle layer through hole to form a blind hole, and the depth of the blind hole is larger than the length of the pin to be inserted; the outer layer board group of both sides is middle with middle layer board group clamp, forms a complete PCB board group, and the middle level through-hole is equivalent to buried hole at whole PCB board group, and outer through-hole and middle level through-hole set up independently respectively, and final common combination forms the blind hole for the cartridge pin, adopt this structure to reduce the length of pin jack, reduced antenna effect, owing to there are some PCB sheet layers that do not trompil, the wiring of these PCB sheet layers does not receive the influence of blind hole, therefore space utilization has been promoted.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart of a method for forming pin holes in a multi-layer PCB according to the present invention;
fig. 2 is a schematic structural view of a multi-layer PCB.
The figure includes:
middle layer plate group 1, middle layer through hole 11, outer layer plate group 2, outer layer through hole 21.
Detailed Description
The core of the invention is to provide a method for forming pin jacks of a multilayer PCB, which adopts a blind hole arrangement mode, reduces the depth of the holes, and reduces the influence on wiring and the antenna effect.
In order to make those skilled in the art better understand the technical solution of the present invention, the method for forming pin holes in a multi-layer PCB of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
FIG. 1 is a flow chart of a method for forming pin holes in a multi-layer PCB according to the present invention; fig. 2 is a schematic structural diagram of a multilayer PCB, and it should be noted that the present invention is directed to a PCB with a large number of layers, and the depth of a blind hole is at least greater than three layers, because the conventional way of drilling a blind hole by using laser is usually not greater than three layers, the depth of a deeper blind hole drilled by laser is difficult to process, and 10 layers of PCBs are taken as an example in the drawing; the method comprises the following steps:
s1, pressing the multilayer PCB plates of the inner layer to form a middle layer plate group 1; the middle layer plate group 1 is formed by overlapping and laminating a plurality of layers of PCB plates, and each layer of PCB plate has an independent structure.
S2, drilling a middle layer through hole 11 on the middle layer plate group 1; firstly, the multilayer PCB is pressed to form a whole, then through holes are drilled in the whole at preset positions to form middle layer through holes 11, and the middle layer through holes 11 penetrate through two sides of the middle layer plate group 1.
S3, respectively pressing PCB plates on two sides of the middle layer plate group 1 to form two groups of outer layer plate groups 2; the processing sequence of the PCB group is that the PCB plates are laminated from the inner layer to the outer layer, the PCB plates of the inner layer are firstly laminated, then the PCB plates of the outer layer are laminated, the outer layer group 2 is also formed by laminating a plurality of layers of PCB plates, and the two groups of outer layer group 2 positioned at the two sides of the middle layer group 1 have the same layer number. .
S4, arranging an outer layer through hole 21 on the outer layer plate group 2 on one side in a penetrating manner, aligning the outer layer through hole 21 with the middle layer through hole 11 to form a blind hole, wherein the depth of the blind hole is larger than the length of the pin to be inserted; the outer layer plate group 2 is provided with an outer layer through hole 21 in a penetrating manner, the middle layer plate group 1 is provided with a middle layer through hole 11 in a penetrating manner, the outer layer through hole 21 and the middle layer through hole 11 jointly form a blind hole, namely, only the outer layer plate group 2 on one side is provided with the outer layer through hole 21 opposite to the middle layer through hole 11, the outer layer plate group 2 on the other side is not communicated with the middle layer through hole 11, the middle layer through hole 11 is communicated with the outside through the outer layer through hole 21 arranged at one end, and the end is used for inserting a pin.
According to the invention, the length of the pin jack is reduced by adopting the structure of the blind hole, the depth of the blind hole can just allow the pin to be inserted, and compared with the jack form adopting a through hole, the length of the copper coating in the through hole is shorter, so that the antenna effect is reduced, and the risk of short circuit is reduced; because there are some PCB sheet layers without opening hole, the routing of these PCB sheet layers is not influenced by the blind hole, therefore has promoted the space utilization of these PCB sheet layers.
On the basis of the above technical solution, step S4 of the present invention includes the steps of: outer layer through-hole 21 runs through on outer layer plate group 2 of one side and sets up, specifically includes:
s41, laminating a PCB on the middle layer plate group 1; s42 laser drilling holes on the single-layer PCB to form through holes; and repeating the steps S41 and S42, laminating the PCB boards layer by layer from inside to outside and drilling holes until the whole outer board group 2 is formed.
That is to say, in the process of pressing and processing the outer plate group 2, laser drilling is performed on each layer of pressed PCB, as shown in fig. 2, the diameter of the opening formed by the laser drilling is large outside and small inside, so that the cross section of the opening is in an inverted trapezoid shape, the space shape of the hole is in a cone shape, a step structure with abrupt size change is formed between two adjacent layers of PCB of the outer plate group 2, and the middle layer through hole 11 is integrally pressed and molded and then processed in a mechanical drilling manner, so that a cylindrical through hole with the same inner diameter can be formed.
For the whole PCB group formed by assembling the middle layer plate group 1 and the outer layer plate group 2, the middle layer through hole 11 is equivalent to an internal buried hole, the outer layer through hole 21 is equivalent to a blind hole, the whole PCB group adopts a mode of adding the blind hole and the buried hole to form a large blind hole, the depth of the large blind hole is slightly larger than the length of a pin, and the pin can be inserted into the large blind hole.
Specifically, the outer layer plate group 2 on one side of the middle layer plate group 1 seals the middle layer through hole 11, and the outer layer plate group 2 on the other side is provided with the outer layer through hole 21, that is, the outer layer plate group 2 on one side is provided with the outer layer through hole 21 in a penetrating manner, and the outer layer plate group 2 on the other side is not perforated at all, so that the solid structure is completely maintained; it should be noted that the present invention does not exclude another solution, that is, the outer layer plate group 2 on one side is provided with the outer layer through holes 21, and the plurality of layers of the outer layer plate group 2 on the other side are also provided with the blind holes, but not completely through, and these specific arrangement forms are all included in the protection scope of the present invention.
Preferably, the number of layers of the middle plate group 1 provided with the outer plate group 2 on one side is equal to the number of layers of the outer plate group 2 without holes on the other side.
The difference between the depth of the blind hole formed by the middle layer through hole 11 and the outer layer through hole 21 and the length of the pin to be inserted is smaller than the thickness of one PCB, the depth of the whole blind hole is slightly larger than the length of the pin, the depth is reduced to the maximum extent on the basis of ensuring the complete insertion of the pin, and the PCB is kept in a complete state as much as possible.
Preferably, the outer layer through hole 21 is a tapered hole drilled layer by layer, and the inner diameters of the tapered hole are not completely equal, so that the range that the inner diameter of the minimum part of the inner diameter of the blind hole formed by the middle layer through hole 11 and the outer layer through hole 21 is larger than the outer diameter of the pin is 0.7-0.9 mm, preferably 0.8mm, the pin can be just inserted, and the gap cannot be too large.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (6)
1. A method for forming pin jacks of a multilayer PCB is characterized by comprising the following steps:
laminating the multilayer PCB plates of the inner layer to form a middle layer plate group (1);
drilling a middle layer through hole (11) on the middle layer plate group (1);
pressing PCB plates on two sides of the middle layer plate group (1) respectively to form two groups of outer layer plate groups (2) respectively;
an outer layer through hole (21) is arranged on the outer layer plate group (2) on one side in a penetrating mode, the outer layer through hole (21) is aligned with the middle layer through hole (11) to form a blind hole, and the depth of the blind hole is larger than the length of a pin to be inserted.
2. The method for forming pin holes in a multilayer PCB as recited in claim 1, wherein the outer layer plate group (2) on one side is provided with outer layer through holes (21) in a penetrating manner, and specifically comprises:
laminating a layer of PCB on the middle layer plate group (1), and performing laser drilling on the single layer of PCB to form a through hole;
and repeating the steps, laminating layer by layer and perforating until the whole outer plate group (2) is formed.
3. The method for forming pin jack of multilayer PCB board according to claim 2, wherein the outer layer board set (2) on one side of the middle layer board set (1) seals the middle layer through hole (11), and the outer layer through hole (21) is formed on the outer layer board set (2) on the other side.
4. The method for forming pin holes in multilayer PCB boards as claimed in claim 2, wherein the number of layers of the middle layer board group (1) provided with the outer layer board group (2) on one side is equal to the number of layers of the outer layer board group (2) without holes on the other side.
5. The method of claim 2, wherein the difference between the depth of the blind hole and the length of the pin to be inserted is less than the thickness of one PCB board.
6. The method for forming the pin jack of the multilayer PCB as claimed in claim 2, wherein the inner diameter of the minimum inner diameter part of the blind hole formed by the middle layer through hole (11) and the outer layer through hole (21) is 0.7-0.9 mm larger than the outer diameter of the pin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110056374.5A CN112888199A (en) | 2021-01-15 | 2021-01-15 | Method for forming pin jack of multilayer PCB |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110056374.5A CN112888199A (en) | 2021-01-15 | 2021-01-15 | Method for forming pin jack of multilayer PCB |
Publications (1)
Publication Number | Publication Date |
---|---|
CN112888199A true CN112888199A (en) | 2021-06-01 |
Family
ID=76048409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110056374.5A Pending CN112888199A (en) | 2021-01-15 | 2021-01-15 | Method for forming pin jack of multilayer PCB |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112888199A (en) |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08288656A (en) * | 1995-04-18 | 1996-11-01 | Hitachi Chem Co Ltd | Manufacture of multilayered printed wiring board |
CN202587601U (en) * | 2012-05-30 | 2012-12-05 | 江苏伟信电子有限公司 | Printed circuit board (PCB) multi-layer board with blind holes and buried holes |
CN103179812A (en) * | 2013-04-18 | 2013-06-26 | 梅州市志浩电子科技有限公司 | Manufacturing method of high-order multistage HDI (High Density Interconnection) printed circuit board |
CN203482494U (en) * | 2013-08-29 | 2014-03-12 | 深圳市深联电路有限公司 | Any layer interconnectable HDI (high density interconnectable) board |
CN104684276A (en) * | 2013-11-28 | 2015-06-03 | 深圳崇达多层线路板有限公司 | Printed wiring board and processing method thereof |
CN105246270A (en) * | 2015-10-22 | 2016-01-13 | 深圳崇达多层线路板有限公司 | Preparation process of plug-in type blind hole HDI board |
US20160323995A1 (en) * | 2013-12-27 | 2016-11-03 | Zte Corporation | Pcb processing method and pcb |
CN106102352A (en) * | 2016-07-04 | 2016-11-09 | 广州兴森快捷电路科技有限公司 | A kind of method solving non-symmetrical line slab warping |
CN106304696A (en) * | 2016-08-11 | 2017-01-04 | 广州杰赛科技股份有限公司 | Printed wiring board of tool multilamellar intersection blind slot and preparation method thereof |
CN108684160A (en) * | 2018-06-04 | 2018-10-19 | 珠海崇达电路技术有限公司 | A kind of multistage blind hole HDI board manufacturing methods |
CN110602900A (en) * | 2019-09-17 | 2019-12-20 | 深圳明阳电路科技股份有限公司 | Multilayer and multistage HDI plate manufacturing method and device |
CN110691466A (en) * | 2019-09-17 | 2020-01-14 | 深圳明阳电路科技股份有限公司 | HDI board manufacturing method and device |
-
2021
- 2021-01-15 CN CN202110056374.5A patent/CN112888199A/en active Pending
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08288656A (en) * | 1995-04-18 | 1996-11-01 | Hitachi Chem Co Ltd | Manufacture of multilayered printed wiring board |
CN202587601U (en) * | 2012-05-30 | 2012-12-05 | 江苏伟信电子有限公司 | Printed circuit board (PCB) multi-layer board with blind holes and buried holes |
CN103179812A (en) * | 2013-04-18 | 2013-06-26 | 梅州市志浩电子科技有限公司 | Manufacturing method of high-order multistage HDI (High Density Interconnection) printed circuit board |
CN203482494U (en) * | 2013-08-29 | 2014-03-12 | 深圳市深联电路有限公司 | Any layer interconnectable HDI (high density interconnectable) board |
CN104684276A (en) * | 2013-11-28 | 2015-06-03 | 深圳崇达多层线路板有限公司 | Printed wiring board and processing method thereof |
US20160323995A1 (en) * | 2013-12-27 | 2016-11-03 | Zte Corporation | Pcb processing method and pcb |
CN105246270A (en) * | 2015-10-22 | 2016-01-13 | 深圳崇达多层线路板有限公司 | Preparation process of plug-in type blind hole HDI board |
CN106102352A (en) * | 2016-07-04 | 2016-11-09 | 广州兴森快捷电路科技有限公司 | A kind of method solving non-symmetrical line slab warping |
CN106304696A (en) * | 2016-08-11 | 2017-01-04 | 广州杰赛科技股份有限公司 | Printed wiring board of tool multilamellar intersection blind slot and preparation method thereof |
CN108684160A (en) * | 2018-06-04 | 2018-10-19 | 珠海崇达电路技术有限公司 | A kind of multistage blind hole HDI board manufacturing methods |
CN110602900A (en) * | 2019-09-17 | 2019-12-20 | 深圳明阳电路科技股份有限公司 | Multilayer and multistage HDI plate manufacturing method and device |
CN110691466A (en) * | 2019-09-17 | 2020-01-14 | 深圳明阳电路科技股份有限公司 | HDI board manufacturing method and device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4408343B2 (en) | Multilayer printed wiring board connection structure | |
US5404637A (en) | Method of manufacturing multilayer printed wiring board | |
US7338892B2 (en) | Circuit carrier and manufacturing process thereof | |
JP2009158815A (en) | Method of manufacturing multilayer wiring board, and multilayer wiring board structure | |
KR100499008B1 (en) | Two-sided PCB without via hole and the manufacturing method thereof | |
EP1443810A1 (en) | Multilayer backplane with vias for pin connection | |
US6802120B2 (en) | Method of manufacturing a printed wiring board having a non-through mounting hole | |
WO2018130229A1 (en) | Printed circuit board and method for preparing same | |
CN107645853B (en) | Manufacturing method of multilayer circuit board and multilayer circuit board | |
EP1813001B1 (en) | Two piece mid-plane | |
JP4705400B2 (en) | Manufacturing method of multilayer printed wiring board | |
US20150008029A1 (en) | Circuit board and method of manufacturing the same | |
CN112888199A (en) | Method for forming pin jack of multilayer PCB | |
WO2023109048A1 (en) | Pcb and manufacturing method therefor | |
CN111465170B (en) | Circuit board, plug-in module and preparation process of circuit board | |
CN104254191A (en) | Coreless layer packaging substrate and manufacturing method thereof | |
CN111787715B (en) | Method for manufacturing interconnection of inner layers of circuit board | |
US11234331B2 (en) | Multilayer printed circuit board and method for manufacturing the same | |
CN218735224U (en) | LCP (liquid Crystal display) embedded type inductance circuit board | |
WO2023184729A1 (en) | Circuit-buried pcb manufacturing method and circuit-buried pcb | |
JP2019029559A (en) | Multilayer wiring board and manufacturing method thereof | |
CN112888163A (en) | Circuit board and manufacturing method thereof | |
CN115580996A (en) | Multilayer circuit board and method for manufacturing same | |
JP3202836B2 (en) | Manufacturing method of multilayer printed wiring board | |
CN117320320A (en) | Processing method of high-speed signal micro-structure PCB |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210601 |
|
RJ01 | Rejection of invention patent application after publication |