CN112817532A - Data processing method, device and computer storage medium - Google Patents
Data processing method, device and computer storage medium Download PDFInfo
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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Abstract
The application discloses a data processing method, a data processing device and a computer readable storage medium. The method comprises the step of opening a storage space occupying a preset space capacity value in a target board in advance. And the target board receives the data to be processed sent by the digital signal processing board, stores the data to be processed into a storage space and sends a response signal to the DSP board. And after the communication between the target board and the digital signal processing board is finished, the target board stores the storage data in the storage space to the flash memories in batches. This application is guaranteeing that the target board can normally handle the basis from the data that DSP end received based on MODBUS agreement communication, and both the data that have deposited the receipt are in order to ensure that the outage does not lose the data, still can guarantee other application function's normal operating simultaneously, do not take place the card phenomenon of dying.
Description
Technical Field
The present application relates to the field of computer technologies, and in particular, to a data processing method and apparatus, and a computer-readable storage medium.
Background
With the rapid development of automation technology and intelligent technology, intelligent equipment is applied to various industries, cutting beds are used as intelligent equipment for batch production and processing of flexible materials in industries such as textile clothing, automobile decorations and the like, in order to meet the practical requirements of users on high utilization rate, high-quality processing and high-efficiency processing of fabrics, the automatic fabric cutting technology is rapidly developed, and a full-automatic fabric cutting system is also applied.
The printed circuit board of the full-automatic cutting system comprises a digital signal processing board (DSP) board and a target board (GPRS) board, the DSP board needs to transmit data to the target board and store the data to the target board, a MODBUS protocol RTU mode is used for carrying out data exchange with a Micro Controller Unit (MCU) on the target board, and the DSP board is required to read back the data stored to the target board for reuse when the system is powered on again next time, so that the stored data are not lost in power failure. The MCU in the target board communicates with the DSP board to exchange data in an MODBUS protocol RTU mode, and the MCU can directly write the communication data into Flash memory Flash once acquiring the communication data. However, if the MCU needs to write data into Flash every time it acquires communication data, it takes a while to cause protocol interruption, and lengthening the communication time increases the risk of protocol interruption. If the MCU on the target board directly writes all data in the memory into Flash once after the communication with the DSP board is completed, a certain time will be occupied, the target board will be stuck, and the defect that all other functions are temporarily disabled will occur.
Although the Real Time Operating System (RTOS) is an Operating System that can guarantee that a specific function is completed within a certain Time limit, it refers to an Operating System that can accept and process data quickly enough when an external event or data occurs, and the processing result can control the production process or make a quick response to the processing System within a specified Time, and control all Real-Time tasks to run in a coordinated and consistent manner. However, many small-sized single-chip microcomputers cannot use the RTOS (Real Time Operating System). For a single chip microcomputer system which cannot use the RTOS, real-time task coordination and consistent operation cannot be achieved, and multi-task execution efficiency generally cannot meet similar requirements.
In view of this, how to store the received data to ensure that the machine is not powered off and to ensure normal operation of other application functions without causing a jam phenomenon on the basis of ensuring that the target board and the DSP can normally process the received data based on MODBUS protocol communication is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
The application provides a data processing method, a data processing device and a computer readable storage medium, on the basis of ensuring that a target board can normally process data received from a DSP (digital signal processor) end based on MODBUS protocol communication, the target board can store the received data to ensure that the data is not lost during power failure, and meanwhile, the normal operation of other application functions can be ensured without the occurrence of a blocking phenomenon.
In order to solve the above technical problems, embodiments of the present invention provide the following technical solutions:
an embodiment of the present invention provides a data processing method applied to a target board, including:
presetting a storage space occupying a preset space capacity value;
when receiving data to be processed sent by a digital signal processing board, storing the data to be processed into the storage space and sending a response signal;
and when the communication with the digital signal processing board is detected to be finished, storing the storage data in the storage space to a flash memory in batches.
Optionally, the setting of the storage space occupying the preset space capacity value includes:
and setting a memory, the occupied space capacity value of which is a preset space capacity value, in the microcontroller of the target board as the storage space.
Optionally, after the preset storage space occupying the preset space capacity value, the method further includes:
when a data reading request sent by the digital signal processing board is received, judging whether data to be read is stored in the storage space;
if the data to be read is stored in the storage space, reading the data to be read from the storage space and sending the data to be read to the digital signal processing board;
and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to be read to the digital signal processing board.
Optionally, the storing the storage data in the storage space to the flash memory in batches includes:
and transmitting the storage data in the storage space to the flash memory by adopting a time slice polling method.
Optionally, the receiving the to-be-processed data sent by the digital signal processing board includes:
when communication data sent by the digital signal processing board is received, judging whether the communication data is valid data to be stored;
and if the communication data is valid data to be stored, taking the communication data as the data to be processed.
Another aspect of the embodiments of the present invention provides a data processing apparatus applied to a target board, including:
the memory opening module is used for presetting a storage space occupying a preset space capacity value;
the data pre-storage module is used for storing the data to be processed into the storage space and sending a response signal when receiving the data to be processed sent by the digital signal processing board;
and the data storage module is used for storing the storage data in the storage space to the flash memory in batches when the communication with the digital signal processing board is detected to be finished.
Optionally, the apparatus further includes a data reading and storing module, where the data reading and storing module includes:
the judgment submodule is used for judging whether the data to be read is stored in the storage space or not when receiving a data reading request sent by the digital signal processing board;
the data reading submodule is used for reading the data to be read from the storage space and sending the data to be read to the digital signal processing board if the data to be read is stored in the storage space; and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to be read to the digital signal processing board.
Optionally, the data pre-storage module further includes an effectiveness judgment sub-module, where the effectiveness judgment sub-module is configured to judge whether the communication data is valid data to be stored when the communication data sent by the digital signal processing board is received; and if the communication data is valid data to be stored, taking the communication data as the data to be processed.
An embodiment of the present invention further provides a data processing apparatus, which includes a processor, and the processor is configured to implement the steps of the data processing method according to any one of the foregoing when executing the computer program stored in the memory.
Finally, an embodiment of the present invention provides a computer-readable storage medium, where a data processing program is stored on the computer-readable storage medium, and when the data processing program is executed by a processor, the data processing method implements the steps of the data processing method according to any one of the foregoing items.
The technical scheme provided by the application has the advantages that a storage space is opened up in advance in the target board to temporarily store the data received from the DSP board for preventing the target board from receiving the data of the DSP core board and writing the data into Flash for a period of time to cause communication protocol interruption. After the communication is completed, a part of data in the storage space is written into Flash in each cycle, and the cycle is carried out until the data in the storage space is completely stored into Flash, so that the communication time of the target board and the DSP board is saved, and the phenomenon of blocking due to the fact that the target board cannot timely respond to other task work because the target board occupies too much time for writing the data into the Flash and other functions are affected is avoided.
In addition, the embodiment of the invention also provides a corresponding implementation device and a computer readable storage medium for the data processing method, so that the method has higher practicability, and the device and the computer readable storage medium have corresponding advantages.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the related art, the drawings required to be used in the description of the embodiments or the related art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention;
FIG. 2 is a flow chart illustrating another data processing method according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating an organization of a memory module according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a computer program implementation process provided by an embodiment of the present invention;
FIG. 5 is a block diagram of an embodiment of a data processing apparatus according to the present invention;
fig. 6 is a block diagram of another embodiment of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and claims of this application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may include other steps or elements not expressly listed.
Having described the technical solutions of the embodiments of the present invention, various non-limiting embodiments of the present application are described in detail below.
Referring to fig. 1, fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present invention, which is applied to a target board, that is, an execution subject of the embodiment is a target board GPRS board, further, the execution subject may be a microcontroller MCU of the GPRS board, the GPRS board is used to process a Flash memory Flash board, receives and stores data on a digital signal processing board of a DSP board into a Flash memory Flash, and the DSP board queries data stored on the target board in an earlier stage through a MODBUS protocol when a system is powered on. Embodiments of the invention may include the following:
s101: the storage space occupying the preset space capacity value is preset.
The preset space capacity value in this step may be determined according to the total amount of data that needs to be stored in the DSP board, and for a fixed application scenario or a fixed product, the amount of data that needs to be stored in the DSP board each time generally does not change too much, for example, may be 15KB, and correspondingly, the preset space capacity value may be not less than the total amount of data that needs to be stored in the DSP board at one time, for example, may also be 15K. The storage space can be a memory in the MCU of the target board GPRS board, namely, the memory which occupies the space capacity value as the preset space capacity value in the MCU of the target board is set as the storage space. Of course, the storage space can also be opened up in other storage spaces in the GPRS board, and those skilled in the art can set the storage space according to actual application scenarios.
S102: and when receiving the data to be processed sent by the digital signal processing board, storing the data to be processed into a storage space and sending a response signal.
The data to be processed may be, for example, the high-speed cruising data of the DSP board, generally, the GPRS board needs 1S to store 1K bytes to the flash memory, and if the data to be stored by the DSP board at one time is 15K, 15S is needed, and the 15S may cause interruption of data communication between the GPRS board and the DSP board. In order to prevent the target board from receiving the data of the DSP board and writing the data into Flash for a period of time to cause communication interruption. If a 15K memory is opened in the target board micro controller unit MCU, the data is directly stored in the memory, so that the data transmission can be finished in the fastest time, then a response signal that the data is stored is directly fed back to the DSP board, the communication between the DSP board and the DSP board is finished, the duration of the data transmission and the response signal receiving of the DSP board from the data transmission is short, and the problem of communication interruption can be avoided.
S103: and when the communication with the digital signal processing board is detected to be finished, storing the storage data in the storage space to the flash memory in batches.
Whether the communication with the digital signal processing board is finished is detected to be qualified by whether the response signal is sent or not, if the response signal is sent, the communication is finished, and if the response signal is not sent, the communication is not finished. After the communication is completed, the data in the storage space is divided into a plurality of parts to be circularly written into Flash until the completion of the communication is completed, and the normal operation of other task works of the target board cannot be influenced. The size of data volume sent each time or the number of times of cycle sending can be set according to parameters in an actual application scene, such as the frequency of data needing to be stored by a DSP board and the condition of running service, which do not affect the implementation of the method.
In the technical scheme provided by the embodiment of the invention, in order to prevent the interruption of a communication protocol caused by a period of time delay when the target board receives the data of the DSP core board and writes the data into Flash, a storage space is pre-opened in the target board to temporarily store the data received from the DSP board. After the communication is completed, a part of data in the storage space is written into Flash in each cycle, and the cycle is carried out until the data in the storage space is completely stored into Flash, so that the communication time of the target board and the DSP board is saved, and the phenomenon of blocking due to the fact that the target board cannot timely respond to other task work because the target board occupies too much time for writing the data into the Flash and other functions are affected is avoided.
It is understood that the DSP board will not only store data but also read previously stored data from the target board, and accordingly, this embodiment also provides a data reading embodiment, and the target board can directly communicate with the DSP board when reading data due to its fast speed, which may include the following:
when a data reading request sent by a digital signal processing board is received, judging whether data to be read is stored in a storage space;
if the data to be read is stored in the storage space, the data to be read is read from the storage space and sent to the digital signal processing board;
and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to the digital signal processing board.
Further, in order to improve the data storage efficiency, this embodiment provides another embodiment, and an implementation manner of the steps in the foregoing embodiment when receiving the to-be-processed data sent by the digital signal processing board may include:
when communication data sent by the digital signal processing board is received, judging whether the communication data is valid data to be stored;
and if the communication data is valid data to be stored, taking the communication data as data to be processed.
In the foregoing embodiment, how to perform the step of storing the data in batches is not limited, and this embodiment further provides an implementation manner, as shown in fig. 2, which may include:
the time slice polling method is one of the simpler and easier system architectures, and is a time-sharing process for the task scheduling algorithm in the system, and the method is to time-share the time of a Central Processing Unit (CPU) for each task. The time slice polling method adopts a timer as a timing method, and can simply realize the time slice polling method by putting a scheduler in the timing. The time slice polling method comprises the division of tasks, the priority of the tasks, the execution of the tasks and the division of time. The task division means that the tasks are necessarily divided reasonably, and the tasks are relatively independent as much as possible; the task priority refers to the design of the task priority which must be paid attention to, and the task which needs to be processed in time is arranged at the forefront of the task; the task execution means that the task execution is as fast as possible and is guaranteed to be in a millisecond level, otherwise, the task is not executed, other tasks are waited, the requirement of a real-time system cannot be met, and multiple tasks cannot be mentioned; the time division means that the time slice division is the key of the whole system, and the task must be ensured to enter the executed task when needing to be executed, otherwise, the real time slice polling cannot be realized. However, communication between all tasks, switching between tasks, and the like in the slot polling method must be performed by a programmer. The embedded operating system only needs to divide tasks and communication among the tasks, and does not need to know the switching among the tasks. In the embodiment, the time slice polling method is applied to the microcontroller of the target board GPRS board, that is, the time slice polling method is applied to the single chip microcomputer system, so that the storage data in the storage space is stored in the flash memory in batches. The implementation process of storing the storage data in the storage space to the flash memory in batches by using the time slice polling method is described in conjunction with fig. 2-4:
after power-on, the target board micro controller MCU is initialized firstly, and the initialization process comprises the initial values of the defined variables such as serial port pointers p1 and p2 pointing positions, the flag bits of some functional states, system clock selection, tick task clock configuration, IO port initialization, serial port initialization and the like. In an illustrative example, the initialization parameters may include, for example, p1 ═ Uart1_ Rev _ Buffer; p2 ═ Uart2_ Rev _ Buffer, art2_ State ═ 0; UART2_ Rev _ Buf1_ Number ═ 0; GPRS _ num is 0; rebot _ Flag is 0; version _ Flag is 0; write _ DSPxunhang _ Flag is 0; dspxundang _ Count _ max is 0; DSPxunhang _ Count is 0. As shown in fig. 2, after the initialization is completed, the system enters a while loop program, and the time slice polling method framework defines task.1s, task.10ms and task.20ms according to the configuration of the tick task clock, configures the tick task clock to enter 1 interrupt every 1mS, and adds 1 to the task.10ms, task.20ms and task.1s in each interrupt, so that the variable value of 10mS for the task.10ms, 20mS for the task.20ms and 1s for the task.1s is indicated. The microcontroller of this embodiment executes each instruction at a fast speed, which is greater than but approximately equal to actual 10ms, 20ms, and 1s, determines the values of variables if (task.10ms > -10), if (task.20ms > -20), and if (task.1s > -1000) in the while program, and executes the corresponding task instruction in the if statement if the variable value is clear 0.
As shown in fig. 3, the USART3 serial port is configured to receive interrupt for receiving information transmitted by DSP serial port, if it is really useful information, data is saved in the interrupt and the interrupt flag bit is set, after it is inquired that the flag bit is changed after entering if (task.10ms > -10) statement, corresponding processing is made according to the protocol content: if the DSP board needs to read data from the target board, the target board reads the data from the address of the target flash storing the data and transmits the data to the DSP board; if the DSP board needs to store data, the received effective data is temporarily stored in a memory array, the received same data is sent to the DSP as a response, the DSP sends an ending instruction after the data transmission is finished, the target board receives the response DSP and sets Write _ DSPxunhuang _ Flag to be 1, then each time the program enters an if (task.tc1s > -1000) statement, a part of data is written into the flash until the data is stored, the Write _ DSPxunhuang _ Flag is cleared to be 0, and therefore the DSP board stores the information needing to be stored;
in the embodiment, a computer program relied on by the time slice polling method is circularly written into Flash until the completion of the writing of a part of data as shown in fig. 4, so that the communication time between the target board and the DSP board is saved, and the target board does not take too much time to write data into Flash and is not too late to respond to other tasks.
It should be noted that, in the present application, there is no strict sequential execution order among the steps, and as long as a logical order is met, the steps may be executed simultaneously or according to a certain preset order, and fig. 1 to fig. 2 are only schematic manners, and do not represent only such an execution order.
The embodiment of the invention also provides a corresponding device for the data processing method, thereby further ensuring that the method has higher practicability. Wherein the means can be described separately from the functional module point of view and the hardware point of view. In the following, the data processing apparatus provided by the embodiment of the present invention is introduced, and the data processing apparatus described below and the data processing method described above may be referred to correspondingly.
Based on the angle of the functional module, referring to fig. 5, fig. 5 is a structural diagram of a data processing apparatus according to an embodiment of the present invention, applied to a target board, where the apparatus may include:
the memory development module 501 is configured to preset a storage space occupying a preset space capacity value.
And the data pre-storing module 502 is configured to store the data to be processed in the storage space and send a response signal when receiving the data to be processed sent by the digital signal processing board.
The data storage module 503 is configured to store the storage data in the storage space to the flash memory in batches when detecting that the communication with the dsp board is ended.
Optionally, in some embodiments of this embodiment, the memory tunneling module 501 may be a module that sets a memory, which occupies a space capacity value of a preset space capacity value in a microcontroller of a target board, as a storage space.
In an optional embodiment of the present application, the data storage module 503 is further configured to send the storage data in the storage space to the flash memory by using a time slice polling method.
Optionally, in another embodiment of this embodiment, the apparatus may further include a data reading and storing module, where the data reading and storing module may include:
the judgment submodule is used for judging whether the data to be read is stored in the storage space or not when receiving a data reading request sent by the digital signal processing board;
the data reading submodule is used for reading the data to be read from the storage space and sending the data to be read to the digital signal processing board if the data to be read is stored in the storage space; and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to the digital signal processing board.
As some optional embodiments of the present application, the data pre-storage module may further include an effectiveness judgment sub-module, where the effectiveness judgment sub-module is configured to judge whether the communication data is valid data to be stored when the communication data sent by the digital signal processing board is received; and if the communication data is valid data to be stored, taking the communication data as data to be processed.
The functions of the functional modules of the data processing apparatus according to the embodiment of the present invention may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the description related to the foregoing method embodiment, which is not described herein again.
Therefore, the embodiment of the invention can store the received data to ensure that the data is not lost in power failure and can ensure normal operation of other application functions without jamming on the basis of ensuring that the target board can normally process the data received from the DSP end based on MODBUS protocol communication.
The data processing device mentioned above is described from the perspective of functional modules, and further, the present application also provides a data processing device described from the perspective of hardware. Fig. 6 is a block diagram of another data processing apparatus according to an embodiment of the present application, applied to a target board. As shown in fig. 6, the apparatus comprises a memory 60 for storing a computer program; a processor 61 for implementing the steps of the data processing method as mentioned in any of the above embodiments when executing the computer program.
The processor 61 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The processor 61 may be implemented in at least one hardware form of a DSP (Digital Signal Processing), an FPGA (Field-Programmable Gate Array), and a PLA (Programmable Logic Array). The processor 61 may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor 61 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the display screen. In some embodiments, the processor 61 may further include an AI (Artificial Intelligence) processor for processing computing operations related to machine learning.
Memory 60 may include one or more computer-readable storage media, which may be non-transitory. Memory 60 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 60 is at least used for storing a computer program 601, wherein the computer program is loaded and executed by the processor 61, and then the relevant steps of the data processing method disclosed in any one of the foregoing embodiments can be implemented. In addition, the resources stored by the memory 60 may also include an operating system 602, data 603, and the like, and the storage may be transient storage or permanent storage. Operating system 602 may include Windows, Unix, Linux, etc., among others. The data 603 may include, but is not limited to, data corresponding to data processing results, and the like.
In some embodiments, the data processing device may further include a display 62, an input/output interface 63, a communication interface 64, a power supply 65, and a communication bus 66.
Those skilled in the art will appreciate that the configuration shown in fig. 6 does not constitute a limitation of the data processing apparatus and may include more or fewer components than those shown, for example, and may also include a sensor 67.
The functions of the functional modules of the data processing apparatus according to the embodiment of the present invention may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the description related to the foregoing method embodiment, which is not described herein again.
Therefore, the embodiment of the invention can store the received data to ensure that the data is not lost in power failure and can ensure normal operation of other application functions without jamming on the basis of ensuring that the target board can normally process the data received from the DSP end based on MODBUS protocol communication.
It is to be understood that, if the data processing method in the above-described embodiments is implemented in the form of software functional units and sold or used as a stand-alone product, it may be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the present application may be substantially or partially implemented in the form of a software product, which is stored in a storage medium and executes all or part of the steps of the methods of the embodiments of the present application, or all or part of the technical solutions. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), an electrically erasable programmable ROM, a register, a hard disk, a removable magnetic disk, a CD-ROM, a magnetic or optical disk, and other various media capable of storing program codes.
Based on this, the embodiment of the present invention further provides a computer-readable storage medium, which stores a data processing program, and the data processing program is executed by a processor, and the steps of the data processing method according to any one of the above embodiments are provided.
The functions of the functional modules of the computer-readable storage medium according to the embodiment of the present invention may be specifically implemented according to the method in the foregoing method embodiment, and the specific implementation process may refer to the related description of the foregoing method embodiment, which is not described herein again.
Therefore, the embodiment of the invention can store the received data to ensure that the data is not lost in power failure and can ensure normal operation of other application functions without jamming on the basis of ensuring that the target board can normally process the data received from the DSP end based on MODBUS protocol communication.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
A data processing method, an apparatus and a computer-readable storage medium provided by the present application are described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are presented only to assist in understanding the method and its core concepts. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present application.
Claims (10)
1. A data processing method, applied to a target board, comprising:
presetting a storage space occupying a preset space capacity value;
when receiving data to be processed sent by a digital signal processing board, storing the data to be processed into the storage space and sending a response signal;
and when the communication with the digital signal processing board is detected to be finished, storing the storage data in the storage space to a flash memory in batches.
2. The data processing method of claim 1, wherein the setting of the storage space occupying the preset space capacity value comprises:
and setting a memory, the occupied space capacity value of which is a preset space capacity value, in the microcontroller of the target board as the storage space.
3. The data processing method according to claim 2, wherein after the presetting of the storage space occupying the preset space capacity value, further comprising:
when a data reading request sent by the digital signal processing board is received, judging whether data to be read is stored in the storage space;
if the data to be read is stored in the storage space, reading the data to be read from the storage space and sending the data to be read to the digital signal processing board;
and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to be read to the digital signal processing board.
4. The data processing method according to any one of claims 1 to 3, wherein the storing the storage data in the storage space into flash memories in batches comprises:
and transmitting the storage data in the storage space to the flash memory by adopting a time slice polling method.
5. The data processing method of claim 4, wherein the receiving the data to be processed sent by the DSP board comprises:
when communication data sent by the digital signal processing board is received, judging whether the communication data is valid data to be stored;
and if the communication data is valid data to be stored, taking the communication data as the data to be processed.
6. A data processing apparatus, for application to a target board, comprising:
the memory opening module is used for presetting a storage space occupying a preset space capacity value;
the data pre-storage module is used for storing the data to be processed into the storage space and sending a response signal when receiving the data to be processed sent by the digital signal processing board;
and the data storage module is used for storing the storage data in the storage space to the flash memory in batches when the communication with the digital signal processing board is detected to be finished.
7. The data processing apparatus of claim 6, further comprising a read store data module, the read store data module comprising:
the judgment submodule is used for judging whether the data to be read is stored in the storage space or not when receiving a data reading request sent by the digital signal processing board;
the data reading submodule is used for reading the data to be read from the storage space and sending the data to be read to the digital signal processing board if the data to be read is stored in the storage space; and if the data to be read is not stored in the storage space, reading the data to be read from the flash memory and sending the data to be read to the digital signal processing board.
8. The data processing device according to claim 7, wherein the data pre-storing module further comprises a validity judging sub-module, and the validity judging sub-module is configured to judge whether the communication data is valid data to be stored when the communication data sent by the digital signal processing board is received; and if the communication data is valid data to be stored, taking the communication data as the data to be processed.
9. A data processing apparatus comprising a processor for implementing the steps of the data processing method according to any one of claims 1 to 5 when executing a computer program stored in a memory.
10. A computer-readable storage medium, on which a data processing program is stored, which when executed by a processor implements the steps of the data processing method according to any one of claims 1 to 5.
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Application publication date: 20210518 |