CN112713196A - Thin film transistor, preparation method thereof and array substrate - Google Patents

Thin film transistor, preparation method thereof and array substrate Download PDF

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CN112713196A
CN112713196A CN202011459811.XA CN202011459811A CN112713196A CN 112713196 A CN112713196 A CN 112713196A CN 202011459811 A CN202011459811 A CN 202011459811A CN 112713196 A CN112713196 A CN 112713196A
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thin film
film transistor
oxide
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oxygen
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龙腾
郑红
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Guangzhou Guoxian Technology Co Ltd
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors

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Abstract

The application discloses a thin film transistor, a preparation method thereof and an array substrate, wherein the thin film transistor comprises an active layer, the active layer comprises a semiconductor containing indium, scandium and oxygen, the semiconductor is doped with an oxygen vacancy stabilizer, and the oxygen vacancy stabilizer is used for capturing oxygen vacancies in the active layer and is bonded with the oxygen vacancies. By the mode, the photo-thermal stability of the thin film transistor can be improved.

Description

Thin film transistor, preparation method thereof and array substrate
Technical Field
The application relates to the technical field of display, in particular to a thin film transistor, a preparation method thereof and an array substrate.
Background
The thin film transistor can be used as an active driving device to be applied to the technical field of flat panel display, particularly the oxide semiconductor thin film transistor has the advantages of high transparency, high mobility, high current switching ratio, low process temperature, simple preparation process and the like, and can be applied to a high-performance TFT-LCD or AMOLED display screen. However, in the conventional oxide semiconductor thin film transistor, the threshold voltage thereof is easy to drift with time during operation, thereby affecting the stability of the threshold voltage and further causing adverse effects on the display effect of the display.
Disclosure of Invention
The technical problem that this application mainly solved provides a thin film transistor and preparation method and array substrate thereof, can improve thin film transistor's light and heat stability.
In order to solve the technical problem, the application adopts a technical scheme that: there is provided a thin film transistor including an active layer including a semiconductor containing indium, scandium, and oxygen, the semiconductor being doped with an oxygen vacancy stabilizer for trapping oxygen vacancies in the active layer to bond with the oxygen vacancies.
Wherein the semiconductor comprises indium oxide, scandium oxide, and an oxygen vacancy stabilizer.
Wherein the doping amount of the oxygen vacancy stabilizer in the semiconductor is less than or equal to 5 wt%.
Wherein the oxygen vacancy stabiliser comprises a metal oxide, the metal oxide comprising cadmium oxide.
Wherein the thickness of the metal oxide film in the semiconductor is 15 to 50 nm.
Wherein the mobility of the thin film transistor is 10.3-26.3 cm2 V-1s-1The threshold voltage is-1.38-0.64V, the subthreshold swing is 106-497 mV/dec, and the on-off ratio is 2.7 x 107～8.3×108。
In order to solve the above technical problem, another technical solution adopted by the present application is: the array substrate is defined with an array area and a wiring area, wherein any one of the thin film transistors is arrayed in the array area, and a plurality of signal wires are arranged in the wiring area.
In order to solve the above technical problem, another technical solution adopted by the present application is: provided is a method for manufacturing a thin film transistor, the method including: providing a base, wherein the base comprises a substrate, a grid electrode and a grid insulation layer, and the grid electrode and the grid insulation layer are arranged on the substrate; and co-depositing an oxygen vacancy stabilizer and a metal oxide containing indium and scandium on the gate insulating layer to form the active layer, wherein the oxygen vacancy stabilizer is used for capturing oxygen vacancies in the active layer and is bonded with the oxygen vacancies.
Wherein indium oxide, scandium oxide and cadmium oxide may be co-deposited on the gate insulating layer by a sputter deposition process to form an active layer.
Forming a source electrode and a drain electrode on the active layer to obtain a thin film transistor; and annealing the thin film transistor, wherein the annealing temperature is 100-450 ℃.
The beneficial effect of this application is: different from the situation of the prior art, the metal oxide of the semiconductor of the thin film transistor adopts an indium scandium oxide system, and in the metal oxide system, a certain amount of scandium oxide is doped into indium oxide based on high mobility, so that the switching characteristic of the thin film transistor device can be regulated and controlled, and the problem that the threshold voltage of the thin film transistor is biased to be negative is solved; the semiconductor is also doped with an oxygen vacancy stabilizer, and the oxygen vacancy stabilizer is used for capturing oxygen vacancies in the active layer and bonding with the oxygen vacancies, so that the photo-thermal stability of the thin film transistor device can be enhanced.
Drawings
FIG. 1 shows a metal oxide (Cd) in an embodiment of the present application2Sc3In27O48) The energy band structure diagram of (1);
FIG. 2 shows Cd in the embodiment of the present application2Sc3In27O48A local density of states map of p-track (pDOS);
FIG. 3 shows an embodiment of the present invention having 1VOCd (2)2Sc3In27O47pDOS map of the most stable structure;
fig. 4 is a diagram illustrating an energy state structure change of InScO and CdInScO under the influence of a photo-thermal bias in the embodiment of the present application;
FIG. 5 is a schematic diagram of transfer curves of devices InScO TFT, CdInScO-1TFT and CdInScO-5TFT in the embodiment of the present application;
FIG. 6-1 is a schematic diagram showing the transfer curve of the device InScO TFT under the conditions of NBTS and PBTS at 80 ℃ along with time according to the embodiment of the application;
FIG. 6-2 is a schematic diagram showing the transfer curve of the device InScO-1TFT under the conditions of NBTS and PBTS at 80 ℃ along with time according to the embodiment of the application;
FIG. 6-3 is a schematic diagram of the transfer curve of the device CdInScO-5TFT device under the conditions of NBTS and PBTS at 80 ℃ along with time according to the embodiment of the application;
FIG. 7-1 is a schematic diagram showing the transition curves of the InScO TFT under PBIS and NBIS in illumination with time according to the embodiment of the present application;
FIG. 7-2 is a schematic diagram showing the transition curves of the InScO-1TFT device under PBIS and NBIS conditions under illumination with time according to the embodiment of the present application;
FIG. 7-3 is a schematic diagram showing the transition curves of the device CdInScO-5TFT under PBIS and NBIS conditions under illumination with time according to the embodiment of the present application;
FIG. 8 is a schematic structural diagram of a thin film transistor according to an embodiment of the present disclosure;
FIG. 9 is a graph of the transfer of InScO TFT devices treated at different annealing temperatures according to one embodiment of the present application;
fig. 10 shows XPS level spectra of O1s for InScO thin films in the present embodiment.
Detailed Description
In order to make the purpose, technical solution and effect of the present application clearer and clearer, the present application is further described in detail below with reference to the accompanying drawings and examples.
The application provides a thin film transistor, and this thin film transistor is metal oxide semiconductor thin film transistor (MO-TFT), has improved the oxide system of semiconductor among the thin film transistor in this application, can improve oxide semiconductor's stability, has better display stability and display brightness effect when it is applied to drive demonstration.
The inventors of the present application have found factors in research that cause instability of conventional oxide semiconductors. Specifically, the oxide system commonly used In the conventional oxide semiconductor is Indium Zinc Oxide (IZO), In of the Indium Zinc Oxide (IZO) system3+The 5s orbital of the ion is the main electron transport channel, usually requiring doping and In3+Zn with equivalent ion number2+The ions maintain the amorphous character of the metal oxide film. But due to In3+Ions with O2-The bond breaking energy after ion bonding is low, so that a large number of oxygen vacancy (Vo) defects exist in the IZO film, and the oxygen vacancy is a main cause for the deterioration of the stability of the MO-TFT. Especially MO-TFT in flat panel display application, is influenced by illumination, and stability of the device is greatly weakenedIn particular, MO-TFT devices are affected by light from display luminescence, which makes it impossible to maintain the uniformity of the MO-TFT performance over a long period of time, and the display effect of the display panel is affected by the deterioration of the driving panel. Based on the situation, the application provides a novel metal oxide semiconductor system, wherein an oxygen vacancy stabilizer is added into the system, cations in the oxygen vacancy stabilizer can be combined with oxygen vacancies, and the combined bond has a high energy level and is not easy to be excited, so that the stability of an oxide semiconductor can be improved.
In one embodiment, a thin film transistor includes an active layer (an oxide semiconductor layer) including a semiconductor containing indium, scandium, and oxygen, and an oxygen vacancy stabilizer doped in the semiconductor.
In this embodiment, the metal oxide of the semiconductor is an indium scandium ferrite based metal oxide, for example, indium oxide (In) can be used2O3) And scandium oxide (Sc)2O3) And (4) preparing. In the metal oxide system based on high mobility2O3Incorporating an amount of Sc2O3The switching characteristic of the TFT device can be regulated and controlled, and the problem that the threshold voltage of the n-type MO-TFT is biased to be negative is solved. The semiconductor is also doped with an oxygen vacancy stabilizer, so that the light stability of the MO-TFT device can be enhanced.
Among them, the oxygen vacancy stabilizer may be some metal oxides, and metal cations in the metal oxides may be combined with oxygen vacancies in the semiconductor thin film. The metal oxide can be metal oxide of IIB, IIA and IB metals, and the bond energy level formed by combining the metal cations and oxygen vacancies is deep and not easy to be excited, so that the stability of the thin film transistor can be improved. Further, the metal oxide may be one or more of cadmium oxide (CdO), magnesium oxide (MgO), cuprous oxide (CuO), and silver oxide (AgO).
The performance of the thin film transistor can be improved by doping the oxygen vacancy stabilizer, for example, the mobility (mu) of the doped thin film transistor is 10.3-26.3 cm2 V-1s-1Threshold voltage (V)on) is-1.38-0.64V, and the Subthreshold Swing (SS) is 106-497 mV/dec, KelvinContrast (I)on/Iof) Is 2.7X 107～8.3×108。
The following explains the principle of the oxygen vacancy stabilizer and the effect of the device on the performance by taking CdO as an example, but is not limited thereto.
Referring to FIGS. 1-3, FIG. 1 shows a metal oxide (Cd) according to an embodiment of the present invention2Sc3In27O48) Energy band structure diagram, fig. 2 is Cd in the embodiment of the present application2Sc3In27O48P track of (2), fig. 3 is a local density of states (pDOS) with 1V in the embodiments of the present applicationOCd (2)2Sc3In27O47pDOS map of the most stable structure. In this embodiment, Cd was comprehensively analyzed2Sc3In27O48And the local density of states of the individual components.
As can be seen from FIG. 1, Cd2Sc3In27O48E of (A)FBelow the top of the valence band, Cd is indicated2Sc3In27O48Holes are generated inside, but Cd2Sc3In27O48The density of states at the top of the valence band is not high, indicating that it produces a low concentration of holes. As can be seen from FIG. 2, Cd2Sc3In27O48Has a forbidden band width of 1.1360eV which is heavily doped with In compared with Sc30Sc2O48And In29Sc3O48The reason why the forbidden band width of Cd is small (2.2-2.8 eV) is that doping narrows the forbidden band width. The doping of CdO has no influence on the state density of the conduction band bottom, because the s track of Cd has less influence on the conduction band bottom than the s track of In, and the doping of Cd has no influence on the conduction band bottom from the s track of Cd and the s track of In2Sc3In27O47pDOS in the system can be seen. As can be seen from FIG. 3, V is introducedOIn the case where O p energy state and Ind energy state are Cd2Sc3In27O48Two main energy states of DOS near VBM. Can be obtained from the energy band diagram of FIG. 2, in Cd2Sc3In27O48In, d energy of CdThe upward repulsion of states to the p-state of O is stronger than the repulsion of Cd, which is downward away from F, thereby reducing the density of p-states of O near VBM. As can be seen from FIG. 3, when Cd2Sc3In27O47Into which a V is introducedOAt the time of defect, VOGround state structure ratio V near CdOMore stable outside Cd. At this time, EFBelow the valence band, when 1V is illustratedOWhen Cd is present in the vicinity, holes disappear, and the reason why the holes disappear is that V and VOBinding to form Cd-VOAnd (4) carrying out pairing. From this, it is known that doping with CdO can consume oxygen vacancies and reduce the generation of defect states.
Referring to fig. 4, fig. 4 is a diagram of the energy state structure change of InScO and CdInScO under the influence of thermal bias in the embodiment of the present application. In this embodiment, the energy state structures of InScO and CdInScO were comprehensively analyzed.
As can be seen from fig. 4, on the one hand, Cd doping bends the energy band downward, the difference between the conduction band bottom and the electron trap defect level as the shallow donor level is reduced, and then the free electrons at the conduction band bottom are more easily captured by the electron trap. On the other hand, VOForming Cd-V at deeper energy level position with doped CdOFor, Cd-V of these deep levelsOThe electron-hole pairs which cannot be broken under the action of bias voltage, thermal effect or illumination are generated, the stability of the device, particularly the photo-thermal stability, can be improved, namely the device can keep the threshold voltage from drifting in the long-time working process, and the performance of the device can maintain long-term consistency.
In addition, in the energy level structure of the CdInScO, Cd-V of a deep energy levelOThe pair can also explain the variation trend of bias stability of the MO-TFT device in red, green and blue light. First, deep level Cd-VOFor blue light (450nm) which makes even higher photon energy unable to excite valence electrons at the top of valence band and even Cd-VOOxygen vacancies in the pairs ionize, which means that no photogenerated electron-hole pairs can be generated, resulting in a higher optical bias stability of the device.
In one embodiment, to clarify the influence of CdO doping on device performance and study the influence of CdO doping amount on MO-TFT device performance, TFT devices with InScO, CdInScO-1 and CdInScO-5 as active layers were analyzed. The test results are shown in FIG. 5 and Table 1, and FIG. 5 is a schematic diagram of transfer curves of devices InScO TFT, CdInScO-1TFT and CdInScO-5TFT in the embodiment of the present application. Table 1 is a table of performance parameters for devices InScO TFT, CdInScO-1TFT, and CdInScO-5 TFT. Wherein, only indium scandium oxide is doped in a semiconductor layer of the device InScO TFT; the semiconductor layer of the device CdInScO-1TFT is doped with 1 wt% of cadmium oxide besides indium, scandium and oxygen; the semiconductor layer of the device CdInScO-5TFT is doped with 5 wt% of cadmium oxide besides indium scandium oxide.
Table 1: performance parameter tables for InScO TFT, CdInScO-1TFT, and CdInScO-5TFT
Figure BDA0002831076270000061
As can be seen from FIG. 5, the on-state current of the device increases and then decreases with the doping of Cd, which is the reason why Cd is2+Having (n-1) d10ns0(n is more than or equal to 5) electronic structure, and after the cation is doped into oxide, the 5s orbital overlapping can be enhanced, the effective mass of electrons is reduced, and the device obtains higher mobility. While the doping amount is increased due to Cd2+Ionic radius of
Figure BDA0002831076270000062
Compared with In3+Is/are as follows
Figure BDA0002831076270000063
And Sc3+Is/are as follows
Figure BDA0002831076270000064
The mobility of the CdInScO-5TFT is reduced compared with that of the CdInScO-1TFT because the influence of the distortion degree of crystal lattices on the quality of the film is increased, and the performance is reduced. Thus, the oxygen vacancy stabilizer may be added in an amount of 5 wt% or less. As can be 0.2 wt%, 0.6 wt%, 1.0 wt%, 1.5 wt%, 2.0 wt%, 3.0 wt%, 5.0 wt%And the like.
In one embodiment, to confirm whether CdO improves the stability of the device, the present application analyzed the operating stability of InScO TFTs, CdInScO-1 TFTs, and CdInScO-5 TFTs at 80 ℃ or under white light illumination.
(I) thermal stability
The conditions of the test were set as: in the stability test under PBTS conditions, VG＝VDMeasuring the transfer curve every 900s, including 5 transfer curves (3600s) tested in total with the initial data, 10V; in the test under NBTS conditions, VG＝-10V，VDThe transfer curve was also measured every 900s, including 5 transfer curves (3600s) with the initial data, and the test temperature was maintained at 80 ℃ throughout the process without light. Referring to fig. 6, fig. 6-1 is a schematic diagram showing the change of the transfer curve of the device InScO TFT at 80 ℃ under the NBTS and PBTS conditions in the embodiment of the present application over time, fig. 6-2 is a schematic diagram showing the change of the transfer curve of the device InScO-1TFT at 80 ℃ under the NBTS and PBTS conditions in the embodiment of the present application over time, and fig. 6-3 is a schematic diagram showing the change of the transfer curve of the device CdInScO-5TFT at 80 ℃ under the NBTS and PBTS conditions in the embodiment of the present application over time.
As can be seen from FIG. 6, the threshold voltage shifts of the InScO TFT under the action of P/NBTS are +2.26V and-7.18V respectively; after doping 1 wt.% of CdO, the drift of the threshold voltage under the action of P/NBTS is +0.12V and-0.10V respectively; when the doping amount is further increased to 5 wt.%, the threshold voltage shifts under the action of P/NBTS are respectively +6.91V and-2.97V, i.e. the device is degraded, and the reason for the degradation may be Cd2+Ionic radius of
Figure BDA0002831076270000071
Causing lattice distortion in the film and increasing the defect density.
(II) photostability
The conditions of the test were set as: the test is carried out under the conditions of normal temperature and visible light all-band white light illumination, and the illumination radiation intensity is 15W/m2In the stability test under the action of PBIS, VG＝VD10V at 15W/m2Measuring the transfer curve every 900s under the white light illumination, wherein 5 transfer curves (3600s) are tested in total by initial data; in the test under NBIS conditions, VG＝-10V，VD0V, likewise at 15W/m2The transfer curves were measured every 900s under white light illumination, including 5 transfer curves (3600s) tested for the initial data. Referring to FIG. 7, FIG. 7-1 is a graph showing the transition curves of the InScO TFT under the illumination of PBIS and NBIS in the embodiment of the present application as a function of time, FIG. 7-2 is a graph showing the transition curves of the device InScO-1TFT under the illumination of PBIS and NBIS in the embodiment of the present application as a function of time, and FIG. 7-3 is a graph showing the transition curves of the device CdInScO-5TFT under the illumination of PBIS and NBIS in the embodiment of the present application as a function of time.
As can be seen from fig. 7, in the case of the InScO TFT device without doping CdO, the absolute value of the threshold voltage shift of the device under both PBIS and NBIS conditions is very large (| Δ V)th|>7.5V), indicating that the semiconductor layer is very sensitive to light. And the stability transfer curve of 900s under the PBIS and NBIS conditions is compared with the initial curve to find that the DeltaV appears already from the test transfer curveth|>The voltage drift amount of 5V shows that the stability of the device is influenced rapidly by illumination. And the stability of the device under the P/NBTS condition is improved by doping CdO.
From the above, comprehensive analysis of the shift amounts of the threshold voltages under the action of P/NBTS and P/NBIS of the InScO TFT, the CdInScO-1TFT and the CdInScO-5TFT shows that when the doping concentration of CdO is 5 wt.%, although the stability of the device under the action of PBIS is excellent, the stability of the device is good, and the shift amount of the threshold voltage under the action of Δ V is smallthIt is only 0.56V, but the stability under NBIS is still not ideal. Threshold voltage DeltaV under NBIS of CdInScO-5TFT under illumination conditionthThe drift voltage value is-6.50V, and in practical display application, more TFT devices of the addressing tube are kept in a normally-off state, namely under negative gate bias for a long time, so that the stability under the action of NBIS is an important measurement index for the TFT of the addressing tube. Delta V under the action of P/NBIS of the device when the doping concentration is 1 wt%thOnly 0.15V and 0.16V, respectively. It can be seen that CdThe InScO-1TFT is excellent in thermal stability and photostability.
In the foregoing embodiments, the thin film transistor provided in the present application can enhance photo-thermal stability of an MO — TFT device by doping an oxide semiconductor layer with an oxygen vacancy stabilizer.
The thin film transistor provided by the application can be used as an active driving device to be applied to flat panel display. Based on this, the present application provides an array substrate, the array substrate includes a substrate layer and an array layer, the substrate may be a flexible substrate or a rigid substrate, the material of the flexible substrate may be, but is not limited to, a combination of one or more of Polyimide (PI), Polyetherimide (PEI), polyphenylene sulfide (PPS), Polyarylate (PAR) or PET, or a bendable steel sheet. The array layer is generally formed by a buffer layer, a top gate/bottom gate structure of a CMOS/NMOS/PMOS formed by a thin film transistor layer, and other extended structures. The thin film transistor layer includes a semiconductor layer (active layer), a gate electrode, a source electrode, a drain electrode, an insulating layer, and the like. By patterning the thin film transistor layers, a control circuit for controlling the light emitting of the light emitting device can be formed, and the specific circuit structure has multiple implementation modes, which are not described herein again. In this application, the thin film transistor layer is an organic thin film transistor, the active layer of the thin film transistor layer includes a semiconductor containing indium, scandium, and oxygen, and the semiconductor is doped with an oxygen vacancy stabilizer, which may be any of the above embodiments.
The application also provides a display panel/equipment, and the display panel/equipment adopts the array substrate as a driving backboard, and when the display panel/equipment is applied, the photo-thermal stability of the driving backboard is good, so that the display panel/equipment has a stable display brightness effect. The display panel disclosed by the application can be used for various display modes, such as OLED display, quantum dot display, Micro-LED display and the like. Here, the OLED display is taken as an example for explanation, but is not limited to this display mode.
Referring to fig. 8, fig. 8 is a schematic structural diagram of a thin film transistor according to an embodiment of the present disclosure. In this embodiment, the thin film transistor 100 includes a substrate 110, a gate electrode 120, a gate insulating layer 130, an active layer 140, a source electrode 150, and a drain electrode 160, the gate electrode 120 is disposed on the substrate, the gate insulating layer 130 covers the gate electrode 120, the active layer 140 is disposed on a side of the gate insulating layer 130 away from the gate electrode 120, and the source electrode 150 and the drain electrode 160 are disposed on a side of the active layer 140 away from the gate insulating layer 130. The active layer can be formed by co-depositing metal oxide on the gate insulating layer substrate.
Specifically, a substrate is provided. The base includes a substrate 110, a gate electrode 120 disposed on the substrate 110, and a gate insulating layer 130 covering the gate electrode 120. The substrate 110 may be a flexible substrate or a rigid substrate, the gate electrode 120 and the gate insulating layer 130 may be formed on the substrate 110 by using a conventional technique, the material of the gate electrode 120 may be aluminum (Al), neodymium (Nd), or a combination thereof, and the material of the gate insulating layer 130 may be aluminum oxide (AlO)x) Neodymium (Nd), and combinations thereof.
An oxygen vacancy stabilizer and a metal oxide containing indium and scandium are co-deposited on the gate insulating layer 130 of the substrate to form an active layer 140.
The active layer may be formed using a magnetron sputtering technique, a pulsed laser deposition technique. The ratio of each metal oxide and the thickness of the metal oxide film can be controlled by controlling the deposition rate. The doping amount of the oxygen vacancy stabilizer is small, and the oxygen vacancy stabilizer and the metal oxide containing indium and scandium can be co-deposited after a part of metal oxide containing indium and scandium is deposited. When the magnetron sputtering technology is utilized, the magnetron sputtering control power range is 40-120W, and the temperature during sputtering can be controlled at 25-400 ℃. The thickness of the formed metal oxide film can be 15-50 nm, such as 15nm, 20nm, 25nm, 35nm, 20nm, etc.
After the active layer is formed, a source electrode and a drain electrode are deposited on the active layer, and the material of the source electrode and the drain electrode can be Indium Tin Oxide (ITO).
And annealing the device after the source electrode and the drain electrode are formed, wherein the annealing temperature range can be 100-450 ℃.
In the process of preparing the device, various defects are always generated in the active layer film and at the interface with other film layers, and the defects have a large influence on the performance of the device. In order to improve the quality of the film and reduce the defect state in the film forming process, the post-treatment of each layer of the film after the preparation is finished is particularly critical. Annealing is a common device film post-processing mode, and is a very effective optimization process with low cost. The prepared InScO TFT device is air annealed at 250 ℃, 300 ℃ and 350 ℃ for 1h, and the obtained result is shown in fig. 9 in detail, and fig. 9 is a transfer curve diagram of the InScO TFT device treated at different annealing temperatures in the embodiment of the present application.
As can be seen from fig. 9, as the annealing temperature increases, the on-current of the device gradually decreases while the threshold voltage gradually moves forward. The reason is presumed to be that the components of the film are diffused by energy obtained by the increase of the annealing temperature, and do not move when reaching the stability, most of the components can be kept stable at the position with the lowest energy, and the quality of the film is optimized; in addition, annealing can reduce defects in the device, namely oxygen vacancies, carrier concentration and on-state current, so that the mobility is reduced, but the voltage requirement for turning off the device is smaller and the threshold voltage is shifted forward. Although the mobility of the device is reduced along with the increase of the annealing temperature, the optimization of the threshold voltage of the device is more obvious (closer to 0V), and the subthreshold swing is obviously minimum when the annealing temperature is 350 ℃, so that the defect state of the device under the condition is minimum.
In one embodiment, to further verify whether the oxygen vacancy concentration as a defect is suppressed after annealing, XPS level mapping of O1s was performed on the InScO thin film annealed at 150 ℃, 250 ℃ and 350 ℃ for 1 hour, respectively, and the measured mapping is shown in fig. 10, where fig. 10 is an XPS level mapping of O1s performed on the InScO thin film in the embodiment of the present application. Peak splitting fitting treatment is carried out on the obtained XPS data through Peak splitting software (XPSPEAK41), and fitting O1s Peak is carried out to obtain two O peaks, wherein one is Peak 1(529.7eV, Peak 1) of lattice oxygen in the film, and the other is Peak 1 of V in the filmOPeak 2(531.1eV, Peak 2), it can be seen from the results of fig. 10 that Peak 1, which is lattice oxygen, rises with increasing annealing temperature, and lattice oxygen rises from 62.7% to 64.3%, and at the same time, as VOPeak 2 with annealing temperatureRising and falling, VOThe content of the silicon dioxide is reduced from 37.3 percent to 35.7 percent, and the verification that the oxygen in the air can fill up V in the annealing process is verifiedOThereby reducing the generation of defect states.
In the above embodiments, the thin film transistor provided by the present application is based on In with high mobility2O3Incorporating an amount of Sc2O3The switching characteristic of a TFT device can be regulated, the problem that the threshold voltage of an n-type MO-TFT is negative is solved, and the light stability of the MO-TFT device is enhanced by doping trace CdO based on the InScO TFT with optimized regulation and control performance. The stability of MO-TFT of a series of oxide material systems with good performance is enhanced by doping trace CdO, so that the performance of n-type MO-TFT is improved theoretically, and the influence of illumination on the stability of MO-TFT is eliminated particularly when the N-type MO-TFT is applied to a driving back plate in a flat panel display. The thin film transistor provided by the application can be suitable for MO-TFT under various oxide systems with good performance but illumination stability problems, and can obtain an MO-TFT device with high stability through simple doping.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims (10)

1. A thin film transistor, comprising:
an active layer comprising a semiconductor comprising indium, scandium, and oxygen, the semiconductor being doped with an oxygen vacancy stabilizer for trapping oxygen vacancies in the active layer, bonded to the oxygen vacancies.
2. The thin film transistor of claim 1, wherein the semiconductor comprises indium oxide, scandium oxide, and the oxygen vacancy stabilizer.
3. The thin film transistor according to claim 1, wherein a doping amount of the oxygen vacancy stabilizer in the semiconductor is 5 wt% or less.
4. The thin film transistor of claim 1, wherein the oxygen vacancy stabilizer comprises a metal oxide comprising cadmium oxide.
5. The thin film transistor according to claim 1, wherein the thickness of the metal oxide thin film in the semiconductor is 15 to 50 nm.
6. The thin film transistor according to claim 1, wherein the mobility of the thin film transistor is 10.3 to 26.3cm2V-1s-1The threshold voltage is-1.38-0.64V, the subthreshold swing is 106-497 mV/dec, and the on-off ratio is 2.7 x 107～8.3×108。
7. An array substrate is characterized in that,
an array region and a wiring region are defined, the array region is arrayed with the thin film transistor according to any one of claims 1 to 6, and the wiring region is provided with a plurality of signal lines.
8. A method for manufacturing a thin film transistor includes:
providing a base, wherein the base comprises a substrate, and a grid electrode and a grid insulating layer which are arranged on the substrate;
and co-depositing an oxygen vacancy stabilizer and a metal oxide containing indium and scandium on the gate insulating layer to form an active layer, wherein the oxygen vacancy stabilizer is used for capturing oxygen vacancies in the active layer and is bonded with the oxygen vacancies.
9. The method for manufacturing a thin film transistor according to claim 8,
and co-depositing indium oxide, scandium oxide and cadmium oxide on the gate insulating layer by utilizing a sputtering deposition process to form the active layer.
10. The method for manufacturing a thin film transistor according to claim 8,
forming a source electrode and a drain electrode on the active layer to obtain a thin film transistor;
and annealing the thin film transistor, wherein the annealing temperature is 100-450 ℃.
CN202011459811.XA 2020-12-11 2020-12-11 Thin film transistor, preparation method thereof and array substrate Pending CN112713196A (en)

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