CN112702236A - Method and processor for realizing packet loss detection - Google Patents
Method and processor for realizing packet loss detection Download PDFInfo
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- CN112702236A CN112702236A CN202011540647.5A CN202011540647A CN112702236A CN 112702236 A CN112702236 A CN 112702236A CN 202011540647 A CN202011540647 A CN 202011540647A CN 112702236 A CN112702236 A CN 112702236A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
- H04L43/0829—Packet loss
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/04—Processing captured monitoring data, e.g. for logfile generation
- H04L43/045—Processing captured monitoring data, e.g. for logfile generation for graphical visualisation of monitoring data
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
Abstract
The invention provides a method and a processor for realizing packet loss detection, wherein the method comprises the following steps: setting packet loss detection for the first error type message; configuring a switching chip according to the first error type; receiving an instruction which is sent by the switching chip after discarding the first message corresponding to the first error type according to the configuration and at least comprises a packet loss reason and message flow characteristics; and setting an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristic. The device directly detects the reason of packet loss in the network, so that the user can clearly master the network state, the operation and maintenance efficiency is improved, and the service influence surface is reduced.
Description
Technical Field
The present invention relates to the field of data communication, and in particular, to a method and a processor for implementing packet loss detection.
Background
Two of the most important requirements for data transmission in a data center network are: low delay, zero packet loss; however, the current technology cannot ensure that the network device does not lose packets, and the network device switch loses packets very often, which can be roughly classified into Pipeline packet loss, TM packet loss (including MMU packet loss), and abnormal packet loss (such as abnormal situations of device power failure). For TM packet loss, the current main solution is TCB (Transient Capture Buffer) scheme; the abnormal packet loss is mainly the abnormal fault of the equipment, and the problem is not to detect the packet loss but to detect why the equipment is abnormal; for the Pipeline packet loss, currently, there is no better perceptible scheme (for example, destination MAC error, no route, no next hop, TTL 0/1, unknown vlan, etc. packet loss) temporarily.
The existing communication equipment provides a packet loss detection scheme, and can also adopt an erspan (encapsulated Remote Switch Port analyzer) to mirror all messages of the equipment to a server, that is, a part of the source Port message is copied and sent to a destination server for analysis through gre (generic Routing encapsulation), and the physical position of an acquisition server is not limited. It is mainly applied to the following two scenarios:
session visualization: acquiring all the sessions of newly-built TCP, RDMA (Remote Direct Memory Access) and the like to a back-end server by ERSPAN for displaying;
network obstacle removing: and when a network problem occurs, capturing network flow and performing fault analysis.
To achieve this effect, the source network device needs to filter the traffic of interest to the user from the mass data stream, copy one copy, and encapsulate each copied frame into a special "super frame container", where this super container will carry enough additional information so that it can be correctly routed to the receiving device, and the receiving device can extract and completely recover the originally monitored traffic.
Disclosure of Invention
In order to solve the technical problem, the embodiment of the invention adopts the following technical scheme:
a method for realizing packet loss detection is applied to a Central Processing Unit (CPU) of switching equipment, and comprises the following steps:
setting packet loss detection for the first error type message;
configuring a switching chip according to the first error type;
receiving an instruction which is sent by the switching chip after discarding the first message corresponding to the first error type according to the configuration and at least comprises a packet loss reason and message flow characteristics;
and setting an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristic.
Optionally, the step of processing, by the switch chip, the message stream when receiving the message stream that corresponds to the first error type, is matched with the message stream characteristics, except for the first message, specifically includes:
and setting a first timer, starting the first timer when a switching chip receives a message stream which corresponds to the first error type, is except for the first message and is matched with the message stream characteristics, sampling the message stream within the time range of the first timer, and sending the sampling result to the CPU.
Optionally, the instructions further include:
and (4) packet loss time.
Optionally, the method further includes:
and sending the instruction and/or the sampling result to a monitoring server so that the monitoring server can perform visualization processing on the information in the instruction and/or the sampling result.
Optionally, the step of processing, by the switch chip, the message stream when receiving the message stream that corresponds to the first error type, is matched with the message stream characteristics, except for the first message, specifically includes:
when receiving a message flow which corresponds to the first error type, is matched with the message flow characteristics except the first message, the switching chip determines whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry or not according to the message flow characteristics, and if the packet loss reasons are different, the switching chip sends the changed packet loss reason to the CPU,
the method further comprises the following steps:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
Optionally, a second timer is set, and when the second timer expires and packet loss of the packet stream is not detected, the exact matching table entry is deleted, and a packet loss detection end message is sent to the monitoring server.
Another aspect of the embodiments of the present invention further provides a processor for implementing packet loss detection, which is applied in a switching device, and includes:
the setting module is used for setting packet loss detection of the first error type message;
the first configuration module is used for configuring the exchange chip according to the first error type;
a receiving module, configured to receive an instruction, which is sent by the switch chip according to the configuration after discarding the first packet corresponding to the first error type and includes at least a packet loss reason and a packet flow characteristic;
and the second configuration module is used for configuring an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction, so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristic.
Optionally, the second configuration module is specifically configured to:
and configuring an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so as to facilitate the switching chip to set a first timer, starting the first timer when receiving the message flow which corresponds to the first error type, is matched with the message flow characteristic, is except for the first message, samples the message flow within the time range of the first timer, and sends the sampling result to the processor.
Optionally, the instructions further include:
and (4) packet loss time.
Optionally, the processor further includes:
and the sending module is used for sending the instruction and/or the sampling result to a monitoring server so as to facilitate the monitoring server to perform visualization processing on the information in the instruction and/or the sampling result.
Optionally, the second configuration module is specifically configured to:
configuring an exact matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction, so that when the switching chip receives a message flow which corresponds to the first error type, is matched with the message flow characteristic, except the first message, whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry or not is determined according to the message flow characteristic, and if the packet loss reason is different from the stored table entry, the changed packet loss reason is sent to the processor,
the sending module is further configured to:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
Optionally, the processor further includes:
and the deleting module is used for setting a second timer, deleting the accurate matching table entry when the second timer expires and the packet loss of the message stream is not detected, and sending a packet loss detection end message to the monitoring server.
The embodiment of the invention has the advantages that compared with a TCB (Transient Capture Buffer) scheme, the problem that the message which cannot be detected by the TCB is lost by mistake can be solved, and compared with the ERSPAN which mirrors all messages of the equipment to the server for analysis, the processing burden of the server can be relieved; the most important effect is that the device directly detects the reason of packet loss in the network, so that the user can clearly master the network state, the operation and maintenance efficiency is improved, and the service influence surface is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart of a method provided by an embodiment of the present invention;
fig. 2 is a diagram illustrating a structure of an apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides a method for implementing packet loss detection, which is applied to a central processing unit CPU of a switching device, and as shown in fig. 1, the method includes:
s101, setting packet loss detection of a first error type message;
s103, configuring a switching chip according to the first error type;
s105, receiving an instruction which is sent by the exchange chip after discarding the first message corresponding to the first error type according to the configuration and at least comprises a packet loss reason and message flow characteristics;
s107, according to the message flow characteristics in the instruction, setting an accurate matching table entry corresponding to the message flow characteristics on the switching chip, so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristics.
Optionally, the step of processing, by the switch chip, the message stream when receiving the message stream that corresponds to the first error type, is matched with the message stream characteristics, except for the first message, specifically includes:
and setting a first timer, starting the first timer when a switching chip receives a message stream which corresponds to the first error type, is except for the first message and is matched with the message stream characteristics, sampling the message stream within the time range of the first timer, and sending the sampling result to the CPU.
Optionally, the instructions further include:
and (4) packet loss time.
Optionally, the method further includes:
and sending the instruction and/or the sampling result to a monitoring server so that the monitoring server can perform visualization processing on the information in the instruction and/or the sampling result.
Optionally, the step of processing, by the switch chip, the message stream when receiving the message stream that corresponds to the first error type, is matched with the message stream characteristics, except for the first message, specifically includes:
when receiving a message flow which corresponds to the first error type, is matched with the message flow characteristics except the first message, the switching chip determines whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry or not according to the message flow characteristics, and if the packet loss reasons are different, the switching chip sends the changed packet loss reason to the CPU,
the method further comprises the following steps:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
Optionally, a second timer is set, and when the second timer expires and packet loss of the packet stream is not detected, the exact matching table entry is deleted, and a packet loss detection end message is sent to the monitoring server.
The embodiment of the invention has the advantages that compared with a TCB (Transient Capture Buffer) scheme, the problem that the message which cannot be detected by the TCB is lost by mistake can be solved, and compared with the ERSPAN which mirrors all messages of the equipment to the server for analysis, the processing burden of the server can be relieved; the most important effect is that the device directly detects the reason of packet loss in the network, so that the user can clearly master the network state, the operation and maintenance efficiency is improved, and the service influence surface is reduced.
Another aspect of the embodiments of the present invention further provides a processor for implementing packet loss detection, which is applied in a switching device, as shown in fig. 2, and includes:
a setting module 201, configured to set packet loss detection for a first error type packet;
a first configuration module 203, configured to configure the switch chip according to the first error type;
a receiving module 205, configured to receive an instruction, which is sent by the switch chip according to the configuration after discarding the first packet corresponding to the first error type and includes at least a packet loss reason and a packet flow characteristic;
a second configuration module 207, configured to configure, according to the message flow feature in the instruction, an exact matching entry corresponding to the message flow feature on the switch chip, so that the switch chip processes the message flow when receiving the message flow that corresponds to the first error type, is other than the first message, and is matched with the message flow feature.
Optionally, the second configuration module 207 is specifically configured to:
and configuring an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so as to facilitate the switching chip to set a first timer, starting the first timer when receiving the message flow which corresponds to the first error type, is matched with the message flow characteristic, is except for the first message, samples the message flow within the time range of the first timer, and sends the sampling result to the processor.
Optionally, the instructions further include:
and (4) packet loss time.
Optionally, the processor further includes:
and the sending module is used for sending the instruction and/or the sampling result to a monitoring server so as to facilitate the monitoring server to perform visualization processing on the information in the instruction and/or the sampling result.
Optionally, the second configuration module is specifically configured to:
configuring an exact matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction, so that when the switching chip receives a message flow which corresponds to the first error type, is matched with the message flow characteristic, except the first message, whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry or not is determined according to the message flow characteristic, and if the packet loss reason is different from the stored table entry, the changed packet loss reason is sent to the processor,
the sending module is further configured to:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
Optionally, the processor further includes:
and the deleting module is used for setting a second timer, deleting the accurate matching table entry when the second timer expires and the packet loss of the message stream is not detected, and sending a packet loss detection end message to the monitoring server.
The embodiment of the invention has the advantages that compared with a TCB (Transient Capture Buffer) scheme, the problem that the message which cannot be detected by the TCB is lost by mistake can be solved, and compared with the ERSPAN which mirrors all messages of the equipment to the server for analysis, the processing burden of the server can be relieved; the most important effect is that the device directly detects the reason of packet loss in the network, so that the user can clearly master the network state, the operation and maintenance efficiency is improved, and the service influence surface is reduced.
The following further explains the embodiment of the present invention with reference to specific application scenarios:
in this application scenario, a Destination MAC Address (DMAC) error message is taken as an example, that is, when a message is forwarded in three layers, a device receives a packet loss process generated when the destination MAC address is not a message of a local three-layer address.
Firstly, by configuring a packet loss type detection function and simultaneously giving a global or interface enabled packet loss detection function, software can set a corresponding CPU _ CONTROL field of a chip according to the configuration, which means that an error message of the type is sent to a packet loss detection module of a CPU for processing, so as to sense packet loss and make the initial condition for packet loss visualization.
For example, for the packet loss detection of the DMAC error type, a user configures a DMAC error packet loss detection function, the packet loss detection module stores information and issues a setting chip, and sets 1 the UUCAST _ tocu of the chip CPU _ CONTROL (1 indicates that the function is enabled, that is, the chip receives a DMAC error message, will copy a message, and set the reason for packet loss and the packet loss time to send to the CPU for processing).
Secondly, when the wrong message enters the device for the first time (packet loss begins), the chip detects the message abnormity and sets the reason of packet loss through the configuration, and sends the message to the CPU for processing.
Because the packet stream is lost for the first time, there is no accurate matching Table entry of EM (Exact Match Table), and if the IFP judges that the packet needs to be sent to the process, the packet is copied to the process.
The packet loss detection module receives the packet loss message, and obtains the packet loss reason, the packet loss time, the stream characteristics (quintuple information or Vxlan (Virtual eXtensible Local Area Network) quintuple) and the like through the message, so that one stream can be uniquely represented.
And then, issuing an EM (effective message) precise matching table entry according to the stream characteristics for the subsequent situation that the stream continuously loses packets, and only sampling the stream and sending the sampling result to the CPU (so that the impact of the message on the CPU is reduced and the performance of the CPU is influenced).
And meanwhile, constructing a packet loss information message (which can comprise one of or any combination of the following contents, namely packet loss equipment, packet loss reasons, packet loss time, packet loss stream characteristics and the like), and sending the message to a monitoring server to realize packet loss visualization.
For example, for the packet loss detection of the DMAC error type, when a DMAC error message enters the device for the first time (packet loss begins), and the CPU _ CONTROL register UUCAST _ tocu field of the chip is 1, the register may copy one message and carry the packet loss reason and the packet loss time.
Because the message stream loses packets for the first time, no EM (Exact Match Table) Exact Match Table entry exists, the IFP (ingress Field process) matches the packet loss reason and copies the message to the process, the packet loss detection module receives the packet loss message, and the packet loss reason, the packet loss time, the stream characteristics (quintuple information or Vxlan quintuple) and the like can be obtained through the message to uniquely represent a stream.
And then, an EM precise matching table entry is issued according to the stream characteristics, and only the sample is sent to the CPU when the stream continuously loses packets (the impact of the message on the CPU is reduced, and the CPU performance is influenced).
Meanwhile, a packet loss information message (information such as packet loss equipment, DMAC error packet loss reason, packet loss time, packet loss stream characteristics and the like) is constructed and sent to the monitoring server to realize visualization of packet loss.
And thirdly, when the error message continuously enters the equipment (packet loss is continuous), the chip continuously sets the packet loss reason for the error message and copies the error message to the CPU.
Because the EM table entry is added after the flow starts, the subsequent error message can hit the EM accurate matching table to match the packet loss reason, and the error message is sampled and sent to the CPU.
The packet loss detection module receives the packet loss message, and can uniquely represent a flow by acquiring packet loss reasons, packet loss time, flow characteristics (quintuple information or Vxlan quintuple) and the like through the message, update the table entry and judge whether the packet loss reasons change.
If the reason for packet loss changes, a packet loss information message (information such as packet loss equipment, update of the reason for packet loss, packet loss time, packet loss stream characteristics and the like) needs to be constructed again and sent to the monitoring server to realize visualization of packet loss.
Finally, when the packet loss does not continue, the packet loss detection module does not receive the packet loss message any more, and at this time, the timer mechanism can be used for judging the packet loss conclusion.
Creating the packet loss flow table entry (recording the packet loss characteristics, the packet loss reason and the packet loss time) when packet loss starts;
starting a timer and monitoring the flow updating condition;
if packet loss messages of the flow are continuously received before the timer expires, updating the timer;
when the timer expires, that is, the packet loss message is not received within the time length of the timer (configurable, default can be set to 300s), determining that packet loss is finished;
sending down a deleted EM table entry;
and constructing a packet loss ending information message and sending the packet loss ending information message to the monitoring server, and carrying the packet loss ending time to synchronize the packet loss ending information.
The embodiment of the invention has the advantages that compared with a TCB (Transient Capture Buffer) scheme, the problem that the message which cannot be detected by the TCB is lost by mistake can be solved, and compared with the ERSPAN which mirrors all messages of the equipment to the server for analysis, the processing burden of the server can be relieved; the most important effect is that the device directly detects the reason of packet loss in the network, so that the user can clearly master the network state, the operation and maintenance efficiency is improved, and the service influence surface is reduced.
Those of ordinary skill in the art will understand that: the figures are merely schematic representations of one embodiment, and the blocks or flow diagrams in the figures are not necessarily required to practice the present invention.
From the above description of the embodiments, it is clear to those skilled in the art that the present invention can be implemented by software plus necessary general hardware platform. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute the method according to the embodiments or some parts of the embodiments.
The embodiments in the present specification are described in a progressive manner, and portions that are similar to each other in the embodiments are referred to each other, and each embodiment focuses on differences from other embodiments. In particular, for apparatus or system embodiments, since they are substantially similar to method embodiments, they are described in relative terms, as long as they are described in partial descriptions of method embodiments. The above-described embodiments of the apparatus and system are merely illustrative, and the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
In addition, in some of the flows described in the above embodiments and the drawings, a plurality of operations are included in a specific order, but it should be clearly understood that the operations may be executed out of the order presented herein or in parallel, and the sequence numbers of the operations, such as 201, 202, 203, etc., are merely used for distinguishing different operations, and the sequence numbers themselves do not represent any execution order. Additionally, the flows may include more or fewer operations, and the operations may be performed sequentially or in parallel. It should be noted that, the descriptions of "first", "second", etc. in this document are used for distinguishing different messages, devices, modules, etc., and do not represent a sequential order, nor limit the types of "first" and "second" to be different.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While alternative embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following appended claims be interpreted as including alternative embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made in the embodiments of the present invention without departing from the spirit or scope of the embodiments of the invention. Thus, if such modifications and variations of the embodiments of the present invention are within the scope of the claims of the present invention and their equivalents, the present invention is also intended to encompass such modifications and variations.
Claims (12)
1. A method for realizing packet loss detection is applied to a Central Processing Unit (CPU) of switching equipment, and comprises the following steps:
setting packet loss detection for the first error type message;
configuring a switching chip according to the first error type;
receiving an instruction which is sent by the switching chip after discarding the first message corresponding to the first error type according to the configuration and at least comprises a packet loss reason and message flow characteristics;
and setting an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristic.
2. The method according to claim 1, wherein the step of processing the packet flow by the switch chip when receiving the packet flow corresponding to the first error type, except the first packet, and matching the packet flow characteristics specifically includes:
and setting a first timer, starting the first timer when a switching chip receives a message stream which corresponds to the first error type, is except for the first message and is matched with the message stream characteristics, sampling the message stream within the time range of the first timer, and sending the sampling result to the CPU.
3. The method of claim 1, wherein the instructions further comprise:
and (4) packet loss time.
4. The method of claim 2, further comprising:
and sending the instruction and/or the sampling result to a monitoring server so that the monitoring server can perform visualization processing on the information in the instruction and/or the sampling result.
5. The method according to claim 1, wherein the step of processing the packet flow by the switch chip when receiving the packet flow corresponding to the first error type, except the first packet, and matching the packet flow characteristics specifically includes:
when receiving a message flow which corresponds to the first error type, is matched with the message flow characteristics except the first message, the switching chip determines whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry according to the message flow characteristics, and if the packet loss reason is different from the stored table entry, the switching chip sends the changed packet loss reason to the CPU,
the method further comprises the following steps:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
6. The method of claim 1, wherein a second timer is set, and when the second timer expires and no packet loss of the packet flow is detected, the exact matching entry is deleted, and a packet loss detection end message is sent to the monitoring server.
7. A processor for implementing packet loss detection is applied to a switching device, and includes:
the setting module is used for setting packet loss detection of the first error type message;
the first configuration module is used for configuring the exchange chip according to the first error type;
a receiving module, configured to receive an instruction, which is sent by the switch chip according to the configuration after discarding the first packet corresponding to the first error type and includes at least a packet loss reason and a packet flow characteristic;
and the second configuration module is used for configuring an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction, so that the switching chip processes the message flow when receiving the message flow which corresponds to the first error type, is except for the first message and is matched with the message flow characteristic.
8. The processor of claim 7, wherein the second configuration module is specifically configured to:
and configuring an accurate matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction so as to facilitate the switching chip to set a first timer, starting the first timer when receiving the message flow which corresponds to the first error type, is matched with the message flow characteristic, is except for the first message, samples the message flow within the time range of the first timer, and sends the sampling result to the processor.
9. The processor of claim 7, wherein the instructions further comprise:
and (4) packet loss time.
10. The processor as in claim 8 further comprising:
and the sending module is used for sending the instruction and/or the sampling result to a monitoring server so as to facilitate the monitoring server to perform visualization processing on the information in the instruction and/or the sampling result.
11. The processor of claim 7, wherein the second configuration module is specifically configured to:
configuring an exact matching table entry corresponding to the message flow characteristic on the switching chip according to the message flow characteristic in the instruction, so that when the switching chip receives a message flow which corresponds to the first error type, is matched with the message flow characteristic, except the first message, the switching chip determines whether the packet loss reason of the message flow is the same as the packet loss reason in the stored table entry according to the message flow characteristic, and if the packet loss reason is different from the stored table entry, the switching chip sends the changed packet loss reason to the processor,
the sending module is further configured to:
and sending the changed packet loss reason to a monitoring server so that the monitoring server can perform visual processing on the changed packet loss reason.
12. The processor as in claim 7 further comprising:
and the deleting module is used for setting a second timer, deleting the accurate matching table entry when the second timer expires and the packet loss of the message stream is not detected, and sending a packet loss detection finishing message to the monitoring server.
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| CN202011540647.5A CN112702236B (en) | 2020-12-23 | 2020-12-23 | Method and processor for realizing packet loss detection |
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