CN112634774B - Light source plate, display unit and display device - Google Patents

Light source plate, display unit and display device Download PDF

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CN112634774B
CN112634774B CN202011568285.0A CN202011568285A CN112634774B CN 112634774 B CN112634774 B CN 112634774B CN 202011568285 A CN202011568285 A CN 202011568285A CN 112634774 B CN112634774 B CN 112634774B
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pixel region
glass substrate
preset parameter
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CN112634774A (en
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陈羿恺
林健源
杨二超
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Shenzhen TCL New Technology Co Ltd
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    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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Abstract

The invention provides a light source plate, which comprises a chip connecting layer, a first connecting layer group and a glass substrate which are sequentially overlapped, wherein a plurality of connecting holes are formed in the glass substrate, and a plurality of data lines and a plurality of scanning lines are formed in the first connecting layer group; one data line corresponds to one connecting hole, one scanning line corresponds to one connecting hole, and the connecting holes are arranged in a discrete nonlinear arrangement mode. In the above scheme, the plurality of connecting holes are set to be in a discrete nonlinear chaotic state, so that the position disorder degree of the connecting holes is increased, the situation that the positions of the two connecting holes are too close to each other or the plurality of connecting holes are in the same straight line is avoided, and the connecting holes are evenly distributed on the whole glass substrate. The light source plate has the advantages of high scrambling degree of the connecting holes and difficult breakage of the glass substrate. The invention also provides a display unit and a display device.

Description

Light source plate, display unit and display device
Technical Field
The invention relates to the field of display devices, in particular to a light source plate, a display unit and a display device.
Background
The light source board uses a PCB material as a bearing substrate, the PCB process has the limitation that a multilayer board can realize higher pixel density, the unit square cost of the multilayer board is greatly increased and is limited by the PCB material, and the problems of splicing seams and board warping in the future are difficult to avoid; in recent years, glass punching technology is continuously promoted, the glass punching technology and the glass circuit technology can be used for manufacturing, the glass technology can be used for reducing line width and line distance and has high precision, the greatest advantage of the glass technology is that the advantage of high flatness of glass can be used, a high-precision large-scale spliced screen can be manufactured, especially when a substrate with high pixel density is needed, the cost of the glass substrate is superior to that of a PCB (printed circuit board) multi-layer board, the edge of the glass substrate can also adopt an edging and chamfering related technology, and each spliced screen unit is processed, so that a splicing interface area is nearly invisible.
The larger the glass process size, the more advantageous the cost, therefore the use of large-size glass is inevitable, and the glass is quite different from PCB in nature, and the glass is inelastic and brittle in nature, and the glass substrate is easy to break when a plurality of holes are formed, especially when a plurality of holes are in the same straight line.
In view of the above, it is desirable to provide a novel light source board, a display unit and a display device, which solve or at least alleviate the above technical drawbacks.
Disclosure of Invention
The invention mainly aims to provide a light source plate, a display unit and a display device, and aims to solve the technical problem that a glass substrate is easy to break when punched in the prior art.
To achieve the above object, the present invention provides a light source board comprising:
the chip connecting layer, the first connecting layer group and the glass substrate are sequentially stacked, a plurality of connecting holes are formed in the glass substrate, and a plurality of data lines and a plurality of scanning lines are formed in the first connecting layer group;
one data line corresponds to one connecting hole, one scanning line corresponds to one connecting hole, and the plurality of connecting holes are arranged in a discrete nonlinear manner.
Optionally, the first connection layer group includes a front first layer of metal wires, a front first insulation layer, a front second layer of metal wires, and a front second insulation layer, which are stacked in sequence, where the front first layer of metal wires forms the data lines, and the front second layer of metal wires forms the scan lines; or the front first layer metal routing forms the scanning line, and the front second layer metal routing forms the data line.
Optionally, the data lines and the scan lines are arranged in a cross manner and define sub-pixel regions arranged in an array, the connection holes corresponding to the data lines fall on the data lines, the connection holes corresponding to the data lines are located in sub-pixel regions with a row number of Y1, and the row number of the sub-pixel regions and the data lines satisfy a first preset formula as follows:
Figure GDA0004001406120000021
y1 is a sequence number of a sub-pixel region corresponding to a connecting hole n along the extending direction of a data line, K1 is a first preset parameter, T1 is a serial number of the data line corresponding to the connecting hole n along the extending direction of a scanning line, A1 is a second preset parameter, C1 is the number of the data line, the first preset parameter is a prime number smaller than the number of the data line and is not a factor of C1, and the second preset parameter is a positive integer smaller than or equal to the first preset parameter; and the connecting hole is positioned at the position of the sub-pixel region corresponding to the sequence number of the sub-pixel region obtained by calculation.
Optionally, the connection hole corresponding to the scan line falls on the scan line, and the connection hole corresponding to the scan line is located in a sub-pixel region with a sequence number of Y2, where the sequence number of the sub-pixel region and the position of the scan line satisfy a second preset formula:
Figure GDA0004001406120000022
y2 is a sequence number of a sub-pixel region corresponding to a connecting hole n along the extending direction of a scanning line, K2 is a third preset parameter, T2 is a serial number of the scanning line corresponding to the connecting hole n along the extending direction of a data line, A2 is a fourth preset parameter, C2 is the number of the scanning lines, the third preset parameter is a prime number smaller than the number of the scanning lines and is not a factor of C2, and the fourth preset parameter is a positive integer smaller than or equal to the third preset parameter; and the connecting hole is positioned at the position of the sub-pixel region corresponding to the calculated sequencing number of the sub-pixel region.
Optionally, the sub-pixel region includes a first sub-pixel region located at an edge of the glass substrate and a second sub-pixel region located inside the glass substrate, and a width of the first sub-pixel region is smaller than half of a width of the second sub-pixel region.
Optionally, the light source board further comprises: and the second connecting layer group is arranged below the glass substrate, and the connecting hole is communicated with the first connecting layer group and the second connecting layer group.
Optionally, the light source board further comprises: and the driving chip layer is arranged below the second connecting layer group and is used for driving the LED chip of the chip connecting layer.
Optionally, a frame sealing adhesive is further disposed on the chip connection layer.
The invention also provides an LED display unit which comprises the light source plate.
The invention also provides an LED display device which comprises the LED display units, and the LED display units are spliced together.
In the technical scheme of the invention, the light source plate comprises a chip connecting layer, a first connecting layer group and a glass substrate which are sequentially stacked, wherein a plurality of connecting holes are formed in the glass substrate, and a plurality of data lines and a plurality of scanning lines are formed in the first connecting layer group; one data line corresponds to one connecting hole, one scanning line corresponds to one connecting hole, and the connecting holes are arranged in a discrete nonlinear arrangement mode. In the above scheme, the plurality of connecting holes are set to be in a discrete nonlinear chaotic state, so that the position disorder degree of the connecting holes is increased, the situation that the positions of the two connecting holes are too close to each other or the plurality of connecting holes are in the same straight line is avoided, and the connecting holes are evenly distributed on the whole glass substrate. The invention has the advantages of high scrambling degree of the connecting holes and difficult breakage of the glass substrate.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a cross-sectional view of a light source board according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of punching positions for punching holes on the periphery of a glass substrate in the prior art;
FIG. 3 is a schematic diagram of a punching position of a diagonal hole punching of a glass substrate in the prior art;
FIG. 4 is a schematic view of a punching position of a glass substrate according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an LED display unit according to an embodiment of the present invention;
fig. 6 is a schematic diagram of the splicing of the LED display units according to the embodiment of the present invention.
The reference numbers illustrate:
10. a glass substrate; 20. a data line; 30. scanning a line; 40. connecting holes; 50. a first connection layer group; 51. a first layer of metal wiring on the front surface; 52. a front first insulating layer; 53. a second layer of metal wiring on the front surface; 54. a front second insulating layer; 60. a second connection layer group; 61. a first layer of metal wiring on the back surface; 62. a first insulating layer on the reverse side; 63. a second layer of metal routing on the reverse side; 64. a second insulating layer on the reverse side; 70. a drive chip layer; 80. a chip connection layer; 90. an LED display unit.
The implementation, functional features and advantages of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
It should be noted that all the directional indicators (such as the upper and lower … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are only for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
Moreover, the technical solutions in the embodiments of the present invention may be combined with each other, but it is necessary to be able to be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent, and is not within the protection scope of the present invention.
Referring to fig. 1, and fig. 4 and 5, the present invention provides a light source board including:
the chip connecting layer 80, the first connecting layer group 50 and the glass substrate 10 are sequentially stacked, a plurality of connecting holes 40 are formed in the glass substrate 10, and a plurality of data lines 20 and a plurality of scanning lines 30 are formed in the first connecting layer group 50;
one data line 20 corresponds to one connection hole 40, one scanning line 30 corresponds to one connection hole 40, and a plurality of connection holes 40 are arranged in a discrete nonlinear arrangement.
Referring to prior art fig. 2, the conventional punching pattern has punching positions distributed in a straight line around the periphery of the glass substrate 10, which is the weakest in the straight line, and is easy to break, and the edge of the product is also easy to break. Referring to prior art fig. 3, there is a prior art in which the punching positions are diagonally distributed, so that although edge breakage is prevented, the punching positions also exhibit a straight line distribution characteristic in which the glass substrate 10 is easily broken.
In the above embodiment, the plurality of connection holes 40 are arranged in a discrete nonlinear chaotic state, so that the positional disorder of the connection holes 40 is increased, the two connection holes 40 are prevented from being positioned too close to each other and the plurality of connection holes 40 are positioned on the same straight line, and the connection holes 40 are uniformly distributed on the whole glass substrate 10. The invention has the advantages that the position disorder degree of the connecting holes 40 is high, and the glass substrate 10 is not easy to break. Referring to fig. 6, a plurality of the light source boards may also be spliced to form one large light source board.
Further, the first connection layer group 50 includes a front first layer of metal traces 51, a front first insulation layer 52, a front second layer of metal traces 53 and a front second insulation layer 54, which are sequentially stacked, where the front first layer of metal traces 51 form the data lines 20, and the front second layer of metal traces 53 form the scan lines 30; or the front first layer metal routing 51 forms the scan line 30 and the front second layer metal routing 53 forms the data line 20. The chip is mounted on the chip connection layer 80, and a signal transmitted by the chip is transmitted to the scan line 30 and the data line 20 through the connection hole 40.
Further, the data lines 20 and the scan lines 30 are arranged in a crossing manner to define sub-pixel regions arranged in an array manner, the connection holes 40 corresponding to the data lines 20 fall on the data lines 20, the connection holes 40 corresponding to the data lines 20 are located in sub-pixel regions with a sequence number of Y1, and the sequence number of the sub-pixel regions and the data lines 20 satisfy the following first preset formula:
Figure GDA0004001406120000051
wherein, Y1 is a row number of the sub-pixel region corresponding to the connection hole 40n along the extending direction of the data line 20, K1 is a first preset parameter, T1 is a serial number of the data line 20 corresponding to the connection hole 40n along the extending direction of the scan line 30, A1 is a second preset parameter, C1 is the number of the data lines 20, the first preset parameter is a prime number smaller than the number of the data lines 20 and is not a factor of C1, and the second preset parameter is a positive integer smaller than or equal to the first preset parameter; the connection hole 40 is at the subpixel area corresponding to the calculated sorting number of the subpixel area.
And the connecting hole 40 corresponding to the scanning line 30 falls on the scanning line 30, and the connecting hole 40 corresponding to the scanning line 30 is located at the sub-pixel region with the sequence number of Y2, and the sequence number of the sub-pixel region and the position of the scanning line 30 satisfy the following second preset formula:
Figure GDA0004001406120000052
wherein, Y2 is a sequence number of the sub-pixel region corresponding to the connection hole 40n along the extending direction of the scanning line 30, K2 is a third preset parameter, T2 is a serial number of the scanning line 30 corresponding to the connection hole 40n along the extending direction of the data line 20, A2 is a fourth preset parameter, C2 is the number of the scanning lines 30, the third preset parameter is a prime number smaller than the number of the scanning lines 30 and is not a factor of C2, and the fourth preset parameter is a positive integer smaller than or equal to the third preset parameter; the connection hole 40 is at the subpixel area corresponding to the calculated sorting number of the subpixel area.
Specifically, the sub-pixel regions are sorted along the extending direction of the data line 20 to generate the serial number of each sub-pixel region, in the embodiment shown in fig. 4, the extending direction of the data line 20 is from top to bottom; of course, those skilled in the art will recognize that the extending direction of the data line 20 may also be from bottom to top. Similarly, the serial number of each data line 20 generated along the extending direction of the scanning line 30 may be in the left-to-right direction shown in fig. 4 or in the right-to-left direction. The same sequence number is used for the sub-pixel regions in the same column or in the same row.
The position of the connecting hole 40 on the data line 20 is determined by the serial number of the data line 20 and a first remainder calculated by a first preset formula, the serial number of the data line 20 determines which data line 20 the connecting hole 40 is on, and the row number of the sub-pixel region corresponding to the connecting hole 40 is the serial number of the region divided by the scanning line 30 and pointed by the first remainder; the position of the connection hole 40 on the scan line 30 is determined by the serial number of the scan line 30 and a second remainder calculated by a second preset formula, the serial number of the scan line 30 determines on which scan line 30 the connection hole 40 is, and the row number of the sub-pixel region corresponding to the connection hole 40 is the serial number of the region divided by the data line 20, which is the second remainder.
To illustrate the present embodiment in detail, referring to fig. 4, taking the number C1=5 of the data lines 20 vertically arranged, that is, the line segments x1, x2, x3, x4 and x5 in the drawing, the data lines 20 divide the glass substrate 10 into 6 areas in the horizontal direction, and sequentially sort the data lines 20 and the 6 areas from left to right to generate the serial number and the row number, that is, the serial number of the line segment x1 is 1, the serial number of the line segment x2 is 2, the serial number of the line segment x3 is 3, the serial number of the line segment x4 is 4, and the serial number of the line segment x5 is 5; the number C2=4 of the scanning lines 30 horizontally arranged, that is, line segments z1, z2, z3, and z4 in the drawing, the scanning lines 30 divide the glass substrate 10 into 5 regions in the vertical direction (for example, 1.2.3.4.5 in fig. 4), and the scanning lines 30 are sequentially sorted from top to bottom to generate serial numbers, that is, the serial number of the line segment z1 is 1, the serial number of the line segment z2 is 2, the serial number of the line segment z3 is 3, and the serial number of the line segment z4 is 4. The sequence number of each sub-pixel region along the extending direction of the data line 20 is that the sub-pixel region in the first row is m1, the sub-pixel region in the second row is m2, the sub-pixel region in the third row is m3, the sub-pixel region in the fourth row is m4, the sub-pixel region in the fifth row is m5, and so on; accordingly, the sequence number of each sub-pixel region along the extending direction of the scan line 30 is n1 for the sub-pixel region in the first column, n2 for the sub-pixel region in the second column, n3 for the sub-pixel region in the third column, n4 for the sub-pixel region in the fourth column, and so on.
In the present embodiment, the first preset parameter K1 is a factor which is smaller than a prime number of the number of data lines 20 and is not C1 (the number of data lines 20), a factor which is not C1 or a factor which is not the number of data lines 20, for example, when C1=6, and 2 and 3 are factors of 6, the value of K1 cannot be 2 or 3. Taking K1=3, wherein the second preset parameter A1 is a positive integer less than or equal to the first preset parameter K1, and taking A1=1; according to a first preset formula Y1= mod [ (K1 × T1+ A1), C1], we obtain:
when T1=1, mod [ (K1 × T1+ A1), C1] = mod [ (3 × 1+ 1), 5], the remainder is not equal to 0, i.e., Y1=4, indicating that the punch position is on the first data line 20x1 and located in the divided m4 sub-pixel region;
mod [ (3 x 2+ 1), 5], when T1=2, the remainder is 2; indicating that the punching position is on the second data line 20x2 and located within the divided m2 sub-pixel region;
mod [ (3 x 3+ 1), 5], when T1=3, the remainder is 0; here, when the remainder is 0, taking the value of the remainder as the number C1 of the scan lines 30, that is, Y1=5, indicates that the punch position is on the third data line 20x3 and located in the divided m5 sub-pixel region;
mod [ (3 x 4+ 1), 5], when T1=4, the remainder is 3; indicating that the punch position is on the fourth data line 20x4 and within the divided m3 sub-pixel region;
mod [ (3 x 5+ 1), 5], when T1=5, the remainder is 1; indicating that the punching position is on the fifth data line 20x5 and located within the divided m1 sub-pixel region.
Similarly, according to a second preset formula Y2= mod [ (K2 × T2+ A2), C2], similarly, K2=3 and A2=3 are taken;
when T2=1, mod [ 3+ 1+ 3), 4], the remainder is 2, indicating that the punch location is on z1 and located within the n2 sub-pixel region divided by the data line 20;
when T2=2, mod [ 3+ 2+ 3), 4], the remainder is 1, indicating that the punch location is on z2 and located within the n1 sub-pixel region divided by the data line 20;
when T2=3, mod [3 × 2+ 3), 4], the remainder is 0, and the remainder is taken as the value of the number C2 of the scan lines 30, that is, Y2=4, indicating that the punching position is on z3 and located in the n4 sub-pixel area divided by the data line 20;
when T2=4, mod [ 3+ 4+ 3), 4], the remainder is 3, indicating that the punch location is on z4 and within the n3 sub-pixel area divided by data line 20.
The punching positions obtained by this method are shown in fig. 4, and compared with the prior art, the punching positions are not arranged in a straight line, two adjacent points are far apart, and the punching positions are uniformly distributed on the whole glass substrate 10. Optionally, when the numbers of the data lines 20 and the scan lines 30 are not equal, and values of the second preset parameter and the fourth preset parameter are not equal, the randomness of the punching position is higher. Preferably, when the second preset parameter A1 is smaller than the first preset parameter K1, and the first preset parameter K1 fetches three nearest integers which are half (C1/2) of the number of the data lines 20, the randomness is highest; similarly, when the fourth preset parameter A2 is smaller than the third preset parameter K2, and the first preset parameter K2 is three integers which are half (C2/2) of the number of the scanning lines 30 and are closest to each other, the randomness is highest.
It should be noted that, in the foregoing example, when the number of the data lines 20 is 5, the glass substrate 10 may be divided into 6 regions that are vertically distributed, and when the number of the scan lines 30 is 4, only 4 regions need to be taken according to the second preset formula, and the regions may be sequentially selected from left to right or from right to left (as shown in fig. 4 as 1.2.3.4), and a person skilled in the art may sequence only the data lines 20 or the scan lines 30 that need to be provided with the connection holes 40 according to specific requirements, that is, actually provide n scan lines 30, but sequence only 4 of the data lines 20 or the scan lines to generate the serial number. Further, the widths of the regions divided by the scan lines 30 or the data lines 20 may be equal or may not be equal. Under the condition that the widths of the regions divided by the scanning lines 30 or the data lines 20 are not equal, acquiring the length or the width of each sub-pixel region, and judging whether the length or the width of each sub-pixel region is smaller than a preset threshold value; if yes, no serial number is generated for the scan line 30 or the data line 20 corresponding to the sub-pixel region.
Further, the sub-pixel region includes a first sub-pixel region located at an edge of the glass substrate 10 and a second sub-pixel region located inside the glass substrate 10, and a width of the first sub-pixel region is less than half of a width of the second sub-pixel region. Referring to fig. 3, the edges refer to four outer sides of the glass substrate 10, as shown by the dotted lines; the inner side refers to an area where the peripheral edge is inward along the surface of the glass substrate 10. The width refers to the side length of the first sub-pixel region or the second sub-pixel region, which are shown as small squares in fig. 3. Because glass is easily broken when the edge of the glass substrate 10 is punched, the punching position is selected to avoid the edge position. Here, the width of the first sub-pixel region is smaller than half of the width of the second sub-pixel region, so that the area of the first sub-pixel region at the edge position can be reduced to reduce the area of the glass panel as much as possible while ensuring the effective punching area of the glass substrate 10.
Further, the light source board further includes: a second connection layer group 60 disposed under the glass substrate 10, and the connection hole 40 communicates the first connection layer group 50 and the second connection layer group 60. The second connection layer group 60 includes a first back metal trace 61, a first back insulation layer 62, a second back metal trace 63, and a second back insulation layer 64 sequentially from the glass substrate 10 to the bottom.
Further, the light source board further includes: and a driving chip layer 70 disposed under the second connection layer group 60 for driving the LED chip of the chip connection layer 80. Specifically, the driving chip drives the LED chip of the chip connection layer 80 through the second connection layer and the first connection layer.
Further, a frame sealing adhesive is disposed on the chip connection layer 80. The frame sealing adhesive is used for protecting the chip connection layer 80 and preventing scratching.
The invention also provides an LED display unit 90 comprising the light source board. Since the LED display unit 90 includes all technical solutions of all embodiments of the light source board, at least all beneficial effects brought by all technical solutions are obtained, and are not described in detail herein.
The invention also provides an LED display device which comprises the LED display unit 90, and a plurality of LED display units 90 are spliced together. Since the LED display device includes all technical solutions of all embodiments of the LED display unit 90, at least all beneficial effects brought by all technical solutions are obtained, and no further description is given here.
In the present invention, the terms "first", "second", "third", "fourth" and "fifth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance, and those skilled in the art can understand the specific meanings of the above terms in the present invention according to specific situations.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications and equivalents of the technical spirit of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (8)

1. A light source plate is characterized by comprising a chip connecting layer, a first connecting layer group and a glass substrate which are sequentially stacked, wherein a plurality of connecting holes are formed in the glass substrate, and a plurality of data lines and a plurality of scanning lines are formed in the first connecting layer group;
one data line corresponds to one connecting hole, one scanning line corresponds to one connecting hole, and a plurality of connecting holes are arranged in a discrete nonlinear arrangement;
the data lines and the scanning lines are arranged in a crossed mode and sub-pixel regions arranged in an array mode are defined, connecting holes corresponding to the data lines fall on the data lines, the connecting holes corresponding to the data lines are located in sub-pixel regions with the serial number being Y1, and the serial number of the sub-pixel regions and the data lines meet the following first preset formula:
Figure FDA0004001406110000011
y1 is a sequence number of a sub-pixel region corresponding to a connecting hole n along the extending direction of a data line, K1 is a first preset parameter, T1 is a serial number of the data line corresponding to the connecting hole n along the extending direction of a scanning line, A1 is a second preset parameter, C1 is the number of the data line, the first preset parameter is a prime number smaller than the number of the data line and is not a factor of C1, and the second preset parameter is a positive integer smaller than or equal to the first preset parameter; the connecting hole is positioned at the position of the sub-pixel region corresponding to the calculated sequencing number of the sub-pixel region;
the connecting holes corresponding to the scanning lines are located on the scanning lines, the connecting holes corresponding to the scanning lines are located in sub-pixel regions with the sequence number being Y2, and the sequence numbers of the sub-pixel regions and the positions of the scanning lines meet the following second preset formula:
Figure FDA0004001406110000012
y2 is a sequence number of a sub-pixel region corresponding to a connecting hole n along the extending direction of a scanning line, K2 is a third preset parameter, T2 is a serial number of the scanning line corresponding to the connecting hole n along the extending direction of a data line, A2 is a fourth preset parameter, C2 is the number of the scanning lines, the third preset parameter is a prime number smaller than the number of the scanning lines and is not a factor of C2, and the fourth preset parameter is a positive integer smaller than or equal to the third preset parameter; and the connecting hole is positioned at the position of the sub-pixel region corresponding to the calculated sequencing number of the sub-pixel region.
2. The light source board of claim 1, wherein the first connection layer group comprises a front first layer of metal traces, a front first insulating layer, a front second layer of metal traces and a front second insulating layer, which are sequentially stacked, the front first layer of metal traces forming the data lines, the front second layer of metal traces forming the scan lines; or the scanning lines are formed by the first layer of metal wires on the front surface, and the data lines are formed by the second layer of metal wires on the front surface.
3. A light source board as recited in claim 1, wherein the sub-pixel regions comprise a first sub-pixel region at an edge of the glass substrate and a second sub-pixel region inside the glass substrate, the first sub-pixel region having a width less than half a width of the second sub-pixel region.
4. A light source board as claimed in any one of claims 1 to 3 further comprising: and the second connecting layer group is arranged below the glass substrate, and the connecting hole is communicated with the first connecting layer group and the second connecting layer group.
5. A light source board as claimed in claim 4, further comprising: and the driving chip layer is arranged below the second connecting layer group and is used for driving the LED chip of the chip connecting layer.
6. A light source plate as claimed in claim 5 wherein a frame sealing glue is further disposed on the chip connection layer.
7. An LED display unit comprising the light source board as claimed in any one of claims 1 to 6.
8. An LED display device comprising a plurality of LED display units according to claim 7, wherein the plurality of LED display units are tiled together.
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