CN112540767B

CN112540767B - Program code generation method and device, electronic equipment and storage medium

Info

Publication number: CN112540767B
Application number: CN202011563691.8A
Authority: CN
Inventors: 吕飞飞
Original assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Current assignee: Beijing Baidu Netcom Science and Technology Co Ltd
Priority date: 2020-12-25
Filing date: 2020-12-25
Publication date: 2023-07-25
Anticipated expiration: 2040-12-25
Also published as: CN112540767A

Abstract

The application discloses a program code generation method, a program code generation device, electronic equipment and a storage medium, and relates to the technical field of computers, in particular to the technical field of artificial intelligence such as deep learning and cloud computing. The specific implementation scheme is as follows: acquiring a program code to be processed and a plurality of online performance sampling data; determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage; determining an optimization algorithm and conversion parameters corresponding to the target compiling optimization plugin; processing the plurality of on-line performance sampling data by adopting the conversion parameters to obtain a plurality of target sampling data; and processing the program code to be processed according to the corresponding optimization algorithm and the target sampling data to obtain the target program code, optimizing the program code to be processed by utilizing the online performance sampling data, and generating the target program code after output optimization, so that the flexibility and timeliness of program compiling optimization can be effectively improved, and the lead time of compiling to the online can be effectively shortened.

Description

Program code generation method and device, electronic equipment and storage medium

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to the field of artificial intelligence technologies such as deep learning and cloud computing, and in particular, to a method and apparatus for generating a program code, an electronic device, and a storage medium.

Background

Artificial intelligence is the discipline of studying the process of making a computer mimic certain mental processes and intelligent behaviors (e.g., learning, reasoning, thinking, planning, etc.) of a person, both hardware-level and software-level techniques. Artificial intelligence hardware technologies generally include technologies such as sensors, dedicated artificial intelligence chips, cloud computing, distributed storage, big data processing, and the like; the artificial intelligence software technology mainly comprises a computer vision technology, a voice recognition technology, a natural language processing technology, a machine learning/deep learning technology, a big data processing technology, a knowledge graph technology and the like.

At present, in business services of various application scenes, program codes are widely used for serving thousands of machines, and along with continuous expansion of business, the compiling speed of the program codes is gradually reduced, and the compiling operation performance is also reduced, so that corresponding optimization processing of the program codes is necessary.

Disclosure of Invention

Provided are a program code generation method, apparatus, electronic device, storage medium, and computer program product.

According to a first aspect, there is provided a method of generating program code, comprising: acquiring a program code to be processed and a plurality of online performance sampling data; determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage; determining an optimization algorithm and conversion parameters corresponding to the target compiling optimization plug-in; processing the plurality of on-line performance sampling data by adopting the conversion parameters to obtain a plurality of target sampling data; and processing the program code to be processed according to the corresponding optimization algorithm and the target sampling data to obtain target program code.

According to a second aspect, there is provided a program code generating apparatus comprising: the acquisition module is used for acquiring the program code to be processed and a plurality of online performance sampling data; the first determining module is used for determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage; the second determining module is used for determining an optimization algorithm and conversion parameters corresponding to the target compiling optimization plug-in; the conversion module is used for processing the plurality of online performance sampling data by adopting the conversion parameters so as to obtain a plurality of target sampling data; and the processing module is used for processing the program code to be processed according to the corresponding optimization algorithm and the target sampling data so as to obtain target program code.

According to a third aspect, there is provided an electronic device comprising: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of generating program code of embodiments of the present application.

According to a fourth aspect, a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the program code generation method disclosed in the embodiments of the present application is provided.

According to a fifth aspect, a computer program product is proposed, comprising a computer program, which, when being executed by a processor, implements a method of generating a program code as disclosed in an embodiment of the present application.

It should be understood that the description of this section is not intended to identify key or critical features of the embodiments of the application or to delineate the scope of the application. Other features of the present application will become apparent from the description that follows.

Drawings

The drawings are for better understanding of the present solution and do not constitute a limitation of the present application. Wherein:

FIG. 1 is a schematic diagram according to a first embodiment of the present application;

FIG. 2 is a schematic diagram according to a second embodiment of the present application;

FIG. 3 is a schematic diagram of on-line CPU model distribution in an embodiment of the present application;

FIG. 4 is a schematic diagram of on-line performance sampling data acquisition in an embodiment of the present application;

FIG. 5 is a schematic diagram of a Perf tool;

FIG. 6 is a diagram illustrating format handling in an embodiment of the present application;

FIG. 7 is a schematic diagram of an optimization method according to an embodiment of the present application;

FIG. 8 is a schematic block diagram of an integrated configuration of a program code generating device according to an embodiment of the present application;

FIG. 9 is a schematic diagram according to a third embodiment of the present application;

FIG. 10 is a schematic illustration of an application in an embodiment of the present application;

FIG. 11 is a schematic diagram according to a fourth embodiment of the present application;

FIG. 12 is a schematic diagram according to a fifth embodiment of the present application;

fig. 13 is a block diagram of an electronic device for implementing a method of generating program code of an embodiment of the present application.

Detailed Description

Exemplary embodiments of the present application are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present application to facilitate understanding, and should be considered as merely exemplary. Accordingly, one of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present application. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

Fig. 1 is a schematic diagram according to a first embodiment of the present application.

It should be noted that, the execution body of the program code generating method of the present embodiment is a program code generating apparatus, and the apparatus may be implemented by software and/or hardware, and the apparatus may be configured in an electronic device, and the electronic device may include, but is not limited to, a terminal, a server, and the like.

The embodiment of the application relates to the technical field of artificial intelligence such as deep learning, cloud computing and the like.

Wherein, artificial intelligence (Artificial Intelligence), english is abbreviated AI. It is a new technical science for researching, developing theory, method, technology and application system for simulating, extending and expanding human intelligence.

Deep learning is the inherent regularity and presentation hierarchy of learning sample data, and the information obtained during such learning is helpful in interpreting data such as text, images and sounds. The final goal of deep learning is to enable a machine to analyze learning capabilities like a person, and to recognize text, images, and sound data.

Cloud computing (Cloud computing) refers to a technical system that access an elastically extensible shared physical or virtual resource pool through a network, wherein resources can include servers, operating systems, networks, software, applications, storage devices and the like, and can be deployed and managed in an on-demand and self-service manner. Through cloud computing technology, high-efficiency and powerful data processing capability can be provided for technical application such as artificial intelligence and blockchain, and model training.

As shown in fig. 1, the method for generating the program code includes:

s101: the method comprises the steps of obtaining to-be-processed program code and a plurality of online performance sampling data.

The program code to be optimally processed may be referred to as a program code to be processed, and the program code may be a binary file generated by an initial source code at any one of the operation stages, such as a compiling stage, an assembling stage, a linking stage, and the like, and the source code (also referred to as a source program) refers to an uncompiled text file written according to a certain programming language specification, which is a series of human-readable computer language instructions.

Examples of the corresponding running compilation for the initial source program may be as follows, and in this embodiment of the present application, the source program is exemplified by a c++ program, which is not limited thereto.

C++ program compiling flow: the method comprises the following steps: source code (source), preprocessor (processor), compiler, assembler, object code, linker, executable, and the like.

Pretreatment: preprocessing corresponds to assembling a new c++ program according to the preprocessing instruction. After preprocessing, an output file without macro definition, conditional compiling instruction and special symbol is generated, and the meaning of the file is different from that of the original file, but the file is different in content.

Compiling: and (3) carrying out a series of lexical analysis, grammar analysis and semantic analysis on the preprocessed file, and translating the preprocessed file into an assembly code file after confirming that all instructions accord with grammar rules. In this step, the compiler will check the code for optimizations, indicating syntax errors, override resolution errors, and various other compilation errors.

Assembling: the compiled assembly codes are translated into machine instructions, no complex grammar or semantics are provided, and instruction optimization is not required, and only one-to-one translation is required according to the comparison table of the assembly instructions and the machine instructions.

A linking stage: the linker will link the various object files produced by the compiler in the previous stage to produce the final executable file.

That is, the program code to be optimally processed in the present application may be a binary file (bin file) produced in any of the above-mentioned operation stages, which is not limited.

In the above-mentioned on-line performance sampling data, the corresponding central processing unit (Central Processing Unit, CPU) compiles the source code corresponding to the program code to be processed, for example, the performance parameter, without limitation.

Optionally, in some embodiments, as shown in fig. 2, fig. 2 is a schematic diagram according to a second embodiment of the present application, before acquiring the program code to be processed, further includes:

this embodiment may be performed by data acquisition configured integrally in the generation means of the program code, without limitation.

S201: and determining the number of sampling instances respectively corresponding to the plurality of candidate Central Processing Units (CPU).

For example, a sampling instance on a deployment line may be selected first, and then a timed sampling task may be deployed on the selected sampling instance.

Specific examples are: the method comprises the steps of dividing the requirement of on-line performance sampling data size by the single sampling instance acquisition data size on the line to obtain the number N of the sampling instances on the line, and selecting the number N of the instances with the CPU model ratio according to the CPU model distribution of the on-line full-machine-room central processing unit.

S202: the target CPU is determined from among the plurality of candidate CPUs based on the number of sampling instances.

As shown in fig. 3, fig. 3 is a schematic diagram of on-line CPU model distribution in the embodiment of the present application, and the horizontal axis represents the number of on-line acquisition instances occupied by the CPU of the corresponding model, and then, the top N candidate CPUs may be selected and used as target CPUs according to the on-line CPU model distribution.

S203: a timed sampling task is deployed on a sampling instance of the target CPU.

After determining the number of sampling instances corresponding to the candidate CPUs respectively and disposing the timing sampling task on the sampling instance of the target CPU, the method can trigger to detect the current time in real time, execute the timing sampling task when the current time reaches the timing time set by the timing sampling task, obtain the compiling performance data of the target CPU when compiling the program code to be processed from the on-line production environment, and take the compiling performance data on the line as the on-line performance sampling data.

As shown in fig. 4, fig. 4 is a schematic diagram of on-line performance sampling data acquisition in an embodiment of the present application.

In the embodiment of the application, as the number of sampling instances corresponding to the plurality of candidate Central Processing Units (CPUs) is determined, the target CPU is determined from the plurality of candidate CPUs according to the number of sampling instances, and the timing sampling task is deployed on the sampling instance of the target CPU to sample and obtain a plurality of on-line performance sampling data of the on-line production environment, the on-line performance sampling data can be acquired from the on-line production environment, the on-line production environment can be fully utilized, the service deployment time is avoided, the overall acquisition time is shortened, the data acquisition and the data use are decoupled, and the optimization blocking is reduced.

In other embodiments, after acquiring the plurality of online performance sampling data, the online performance sampling data may be further adopted to perform feedback type compiling optimization processing on the to-be-compiled program.

For example, the step of deploying the acquisition task may be performed, that is, a timing sampling task is deployed on the above selected sampling instance, the acquisition of the compiling performance data is performed at a timing every day, sampling is performed once a day, all feedback compiling optimizations on the day are based on the data, so as to isolate the sampling of the compiling performance data from the offline environment, and the effect of the non-real-time performance sampling data and the real-time performance sampling data on the feedback compiling optimizations is verified to be substantially consistent through the experimental data, so that the whole lead time duration of offline compiling, testing and online is effectively reduced.

In other embodiments, after the compiling performance data obtained by the target CPU when compiling the program code to be processed is obtained from the online production environment and the online compiling performance data is taken as the online performance sampling data, the compiling performance data may also be stored, for example, a binary file corresponding to the online compiling performance data in the instance may be transferred to a designated storage device, where the storage device may be a local storage device or a storage device of a third party.

Alternatively, in other embodiments, the plurality of on-line performance sample data may be obtained directly based on the performance event sampling tool (Performance Event, perf), although any other possible manner may be used to obtain the plurality of on-line performance sample data without limitation.

The principle for the performance event sampling tool (Performance Event, perf) is explained as follows:

the Perf tool is a performance analysis tool built in a Linux kernel source code tree, is based on the principle of event sampling, supports performance analysis aiming at processor related performance indexes and operating system related performance indexes based on performance events, and can be used for searching performance bottlenecks and positioning hot codes.

The principle of Perf is as follows: an interrupt is generated on the CPU (on each core) at fixed time intervals, and it can be seen on the interrupt which process, which function is currently, and then a statistic value is added to the corresponding process and function, so that it can be determined that the CPU has a time of several percent in a certain process or a certain function. Schematic diagram as shown in fig. 5, fig. 5 is a schematic diagram of the Perf tool, and it can be seen that this is a sampled pattern, and generally the more functions that are expected to run, the greater the chance of being hit by a clock interrupt, and thus the higher the CPU occupancy of that function (or process). S102: and determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage.

After the program code to be processed and the plurality of online performance sampling data are acquired, the target compiling stage and the target compiling optimization plug-in corresponding to the target compiling stage can be determined.

Wherein it is assumed that the optional compiling stage comprises: preprocessing, compiling, assembling, linking, compiling and publishing, the target compiling stage may be a compiling stage which is determined according to actual compiling and optimizing requirements and is hoped to be optimized, for example: the plug-in optimization of compiling optimization for different compiling stages is supported in the embodiment of the application.

For example, in the embodiment of the present application, an optimization processing module may be configured in a program code generating device, by which a new compile optimization stage is implemented after a normal compile stage, and optimization parameters are configured in the compile optimization stage, and various optimization methods for different supported target compile stages (compile stage, link stage, compile, release and assemble) are configured, so that flexible configuration according to service needs is implemented, custom opening and closing are supported, and binary files for service are optimized by using online performance sampling data.

After determining the target compiling stage and the target compiling optimization plugin corresponding to the target compiling stage, the target compiling optimization plugin (for example, an optimization plugin supporting the compiling stage, an optimization plugin supporting the linking stage, an optimization plugin supporting the compiling, and an optimization plugin supporting the release assembly) may be integrally set with the optimization processing module in the embodiment of the application, so as to support one-key optimization processing logic.

First, the optimization tool adopted in the embodiment of the application is correspondingly described in principle:

(1) The compile-time optimization tool- (Auto Feedback Directed Optimization, autoFDO), i.e. the optimization plug-in supporting the compile-time, in the embodiment of the present application, the processing logic of AutoFDO may be subjected to plug-in processing, so as to obtain the optimization plug-in supporting the compile-time.

AutoFDO uses a sample-based performance tool perf to gather program performance information and uses this data to determine the likelihood of a jump, thereby directing feedback compilation optimization to produce an optimized program code (e.g., an optimized binary file, bin file).

(2) The link-period optimization tool- (link-time optimizations, LTO), i.e. an optimization plug-in supporting the link phase, in embodiments of the present application, may plug-in the processing logic of the LTO to obtain an optimization plug-in supporting the link phase.

The LTO tool can realize binary process optimization of the whole program in the linking process, and reduce the volume of the target code. The idea of LTO is: by checking the whole program after compiling the individual files, any optimization opportunities that may occur are explored; the compiler may also more aggressively detect and eliminate code and data for use, and the LTO places the compiler intermediate representation into the target file as the source file is compiled. The actual LTO phase loads all intermediate represented code into a single core image, overwriting the further optimized target code.

(3) The post-compilation optimization tool, i.e., the optimization plug-in supporting the compilation, in the embodiment of the present application, the processing logic of the BOLT tool may be subjected to plug-in processing, so as to obtain the optimization plug-in supporting the compilation.

The BOLT tool is an application program dynamic optimization scheme, acquires program operation data through the perf tool, rearranges application program symbols by using the acquired data, and improves the cache hit rate of a central processing unit instruction so as to achieve the aim of improving the program performance.

S103: an optimization algorithm and conversion parameters corresponding to the target compilation optimization plugin are determined.

After the target compiling optimization plugin (for example, the optimization plugin supporting the compiling stage, the optimization plugin supporting the linking stage, the optimization plugin supporting the compiling, and the optimization plugin supporting the publishing assembly) is integrally set with the optimization processing module in the embodiment of the application, an optimization algorithm and a conversion parameter corresponding to the target compiling optimization plugin can be determined in the process of optimization processing, and then the optimization processing is assisted on the program code to be processed by adopting the corresponding optimization algorithm and conversion parameter, so that the program code obtained by the optimization processing is used as the target program code.

S104: and processing the plurality of on-line performance sampling data by adopting the conversion parameters to obtain a plurality of target sampling data.

After determining the optimization algorithm and the conversion parameters corresponding to the target compiling optimization plug-in, the conversion parameters may be used to process the plurality of online performance sampling data to obtain a plurality of target sampling data, and the process may be implemented by a format conversion module integrally provided in the generating device of the program code, where the format conversion module mainly provides conversion from a profile data format corresponding to the configuration file of the online performance sampling data to another specified data format, and stores and publishes the converted data for subsequent use.

Assume that the inputs for the format conversion module are: bin files, profile data formats; the target sampling data in a new data format is output, and the new data format can be a data format directly called by an optimization algorithm, or can be a format of data which can be directly added by a binary file to be compiled, and the method is not limited.

The conversion parameters are adopted, so that a plurality of online performance sampling data can be processed in parallel to obtain a plurality of target sampling data, for example, concurrent conversion can be achieved, the data conversion efficiency can be improved, and the application function of the format conversion module can be expanded.

That is, the format conversion module can support optimization upgrade and subsequent expansion, and also support concurrent conversion: and calculating the concurrency number according to the input data, and concurrency conversion.

For example: assuming that the on-line performance sampling data is formatted for an optimization plug-in (AutoFDO) supporting the compilation stage, and formatted for an optimization plug-in (BOLT tool) supporting the compilation, an example of the on-line performance sampling data may be seen in fig. 6, and fig. 6 is a schematic diagram of the formatting process in an embodiment of the present application.

S105: and processing the program code to be processed according to the corresponding optimization algorithm and the target sampling data to obtain the target program code.

The step can be executed by an optimization processing module which is configured in an integrated manner in a program code generating device, that is, the optimization processing module processes the program code to be processed according to the optimization algorithm and the format-converted target sampling data corresponding to the determined target compiling optimization plugins (for example, the optimization plugins supporting the compiling stage, the optimization plugins supporting the linking stage, the compiled optimization plugins, the distributed and assembled optimization plugins supporting the target compiling optimization plugins, and any combination of the optimization plugins) so as to obtain the target program code, thereby supporting the compiling optimization of plugins, effectively expanding the application scene of the compiling optimization, and improving the flexibility of the compiling optimization of the program.

For example, referring to fig. 7, fig. 7 is a schematic diagram of an optimization method in an embodiment of the present application.

(1) Unified interface: the optimizing method includes inputting target sampling data and a bin file (corresponding to a program code to be processed), inputting conversion parameters, and outputting the bin file (corresponding to the target program code);

(2) Supporting a multi-input data source and a preposed fusion merge function of multiple data;

(3) During compiling, carrying appointed input data to participate in compiling, wherein GCC AutoFDO is-fauto-profile or Clang PGO is-DLLVM_PROFDATA_FILE=;

(4) During the linking: setting a link parameter, participating in link optimization, wherein GCC is-flto or Clang is-DLLVM_ENABLE_LTO=full;

(5) After compiling: and inputting target sampling data and a bin file (corresponding to the to-be-processed program code) in a Bolt format, and calling conversion by a Bolt tool to generate a new bin file (corresponding to the target program code).

The generating device of the program code in the embodiment of the application can also integrate and configure a release assembly module, after the whole optimization of the program code is completed, the release assembly module releases the program code to a temporary product library through a release component (custom data format cutting process), and enters the next pipeline stage, and the subsequent pipeline carries out performance test, release and online based on the optimized target program code.

As shown in fig. 8, fig. 8 is a schematic diagram of a module of an integrated configuration of a program code generating device in the embodiment of the present application, and it should be noted that, the above-mentioned data acquisition module, format conversion module, optimization processing module, and publishing assembly module, which are integrated configuration of the program code generating device, may be a module selected to be integrated into an optimization service according to actual optimization scene requirements, so as to maximize performance and cost benefits brought by using a compiling optimization technology.

In this embodiment, a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage are determined by acquiring a program code to be processed and a plurality of online performance sampling data, an optimization algorithm and a conversion parameter corresponding to the target compiling optimization plug-in are determined, the plurality of online performance sampling data are processed by adopting the conversion parameter to obtain a plurality of target sampling data, and the program code to be processed is processed according to the corresponding optimization algorithm and the target sampling data to obtain the target program code, so that the program code to be processed is optimized by utilizing the online performance sampling data, and the target program code after output optimization is generated, thereby effectively improving flexibility and timeliness of program compiling optimization and effectively shortening a lead time for compiling to online.

Fig. 9 is a schematic diagram according to a third embodiment of the present application.

As shown in fig. 9, the method for generating the program code includes:

s901: and deleting the program code corresponding to the target file from the target program code.

In general, the object program code may be distributed among a plurality of files, where the plurality of files form an integral publishing package, in this embodiment, the object file may be determined first, when the program service corresponding to the executable file is published in the online production environment, the call to the program code in the object file may be skipped, that is, the object file is a file that has no influence on the service on the line corresponding to the object program code, and then the program code corresponding to the object file may be deleted from the object program code, so as to reduce the data volume of the object program code.

S902: and forming an executable file according to the object program code after the deleting process, wherein when a program service corresponding to the executable file is issued in the online production environment, the calling of the program code in the object file can be skipped.

And then, forming an executable file according to the target program code after the deletion processing, and directly starting the execution file to issue and run the target program code.

That is, considering that there may be lib files, singletest files, etc. that are unrelated to online release and operation of the business service in compiling and producing the object program code, so that the release package may be too large, taking the mobile phone hundred degrees as an example, compiling an a file during compiling, and when online operation is released, the static lib library and singletest directory file are not called, and deleting the lib library and singletest directory file has no influence on online business service, in this embodiment, the program code corresponding to the online object file that has no influence in the release package of the object program code may be subjected to deletion processing, so as to reduce the size of the release package, thereby improving online efficiency.

In this embodiment, by deleting the program code corresponding to the target file from the target program code, an executable file is formed according to the deleted target program code, where when the program service corresponding to the executable file is issued in the online production environment, the call to the program code in the target file can be skipped, and the deletion processing of the program code corresponding to the target file that is not affected online in the issuing package of the target program code can be implemented, so as to reduce the size of the issuing package, and thus improve the online efficiency.

As shown in fig. 10, fig. 10 is a schematic application diagram in an embodiment of the present application. And the on-line performance sampling data is utilized, and the compiling period, the link period and the comprehensive optimizing technology after compiling are comprehensively utilized, so that the compiling speed and the running performance are improved to the greatest extent. The performance sampling tool is arranged in a Linux kernel source code tree and is irrelevant to compilers, so that the performance sampling tool can be applied to various compilers, and a file directory which has no influence on online release operation in a release packet is also provided, so that the data size of the release packet is reduced, and the online efficiency is effectively improved.

Fig. 11 is a schematic diagram according to a fourth embodiment of the present application.

As shown in fig. 11, the program code generating apparatus 110 includes:

an acquisition module 1101, configured to acquire a program code to be processed and a plurality of online performance sampling data;

a first determining module 1102, configured to determine a target compiling stage, and a target compiling optimization plug-in corresponding to the target compiling stage;

a second determining module 1103, configured to determine an optimization algorithm and a conversion parameter corresponding to the target compilation optimization plug-in;

a conversion module 1104 for processing the plurality of on-line performance sample data using the conversion parameters to obtain a plurality of target sample data; and

The processing module 1105 is configured to process the program code to be processed according to the corresponding optimization algorithm and the target sampling data to obtain the target program code.

In some embodiments of the present application, the generating device 120 of the program code includes: the system comprises an acquisition module 1201, a first determination module 1202, a second determination module 1203, a conversion module 1204 and a processing module 1205, wherein the system further comprises:

a third determining module 1206, configured to determine the number of sampling instances respectively corresponding to the plurality of candidate CPUs;

a fourth determination module 1207 for determining a target CPU from among the plurality of candidate CPUs according to the number of sampling instances;

a deployment module 1208 for deploying a timed sampling task on a sampling instance of the target CPU;

the acquiring module 1201 is specifically configured to:

and if the current time reaches the set timing time of the timing sampling task, executing the timing sampling task to acquire the compiling performance data of the target CPU when compiling the program code to be processed from the on-line production environment, and taking the compiling performance data on the line as the on-line performance sampling data.

In some embodiments of the present application, the processing module 1205 is further configured to:

and performing feedback type compiling optimization processing on the to-be-compiled program by adopting the online performance sampling data.

In some embodiments of the present application, as shown in fig. 12, further comprising:

a deleting module 1209, configured to delete, from the target program codes, the program codes corresponding to the target file;

the generating module 1210 is configured to form an executable file according to the object program code after the deletion processing, where when the online production environment issues a program service corresponding to the executable file, a call to the program code in the object file can be skipped.

In some embodiments of the present application, the conversion module 1204 is specifically configured to:

and processing the plurality of on-line performance sampling data in parallel by adopting the conversion parameters to obtain a plurality of target sampling data.

In some embodiments of the present application, the target compilation optimization plugins include one or more of the following: an optimization plug-in supporting a compiling stage, an optimization plug-in supporting a linking stage, an optimization plug-in supporting compiling and an optimization plug-in supporting release assembly.

It will be understood that the program code generating apparatus 120 in fig. 12 of the present embodiment and the program code generating apparatus 110 in the foregoing embodiment, the acquiring module 1201 and the acquiring module 1101 in the foregoing embodiment, the first determining module 1202 and the first determining module 1102 in the foregoing embodiment, the second determining module 1203 and the second determining module 1103 in the foregoing embodiment, the converting module 1204 and the converting module 1104 in the foregoing embodiment, and the processing module 1205 and the processing module 1105 in the foregoing embodiment may have the same functions and structures.

It should be noted that the foregoing explanation of the program code generation method is also applicable to the program code generation apparatus of the present embodiment, and will not be repeated here.

According to embodiments of the present application, there is also provided an electronic device, a readable storage medium and a computer program product.

Fig. 13 is a block diagram of an electronic device for implementing a method of generating program code of an embodiment of the present application. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the application described and/or claimed herein.

As shown in fig. 13, the apparatus 1300 includes a computing unit 1301 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 1302 or a computer program loaded from a storage unit 1308 into a Random Access Memory (RAM) 1303. In the RAM 1303, various programs and data required for the operation of the device 1300 can also be stored. The computing unit 1301, the ROM 1302, and the RAM 1303 are connected to each other through a bus 1304. An input/output (I/O) interface 1305 is also connected to bus 1304.

Various components in device 1300 are connected to I/O interface 1305, including: an input unit 1306 such as a keyboard, a mouse, or the like; an output unit 1307 such as various types of displays, speakers, and the like; storage unit 1308, such as a magnetic disk, optical disk, etc.; and a communication unit 1309 such as a network card, a modem, a wireless communication transceiver, or the like. The communication unit 1309 allows the device 1300 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.

The computing unit 1301 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 1301 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 1301 executes the respective methods and processes described above, for example, a program code generation method. For example, in some embodiments, the method of generating program code may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as storage unit 1308. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 1300 via the ROM 1302 and/or the communication unit 1309. When the computer program is loaded into the RAM 1303 and executed by the computing unit 1301, one or more steps of the generation method of the program code described above may be performed. Alternatively, in other embodiments, computing unit 1301 may be configured to perform the method of generating the program code in any other suitable way (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for carrying out methods of the present application may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this application, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), the internet, and blockchain networks.

The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service ("Virtual Private Server" or simply "VPS") are overcome. The server may also be a server of a distributed system or a server that incorporates a blockchain.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present disclosure may be performed in parallel, sequentially, or in a different order, provided that the desired results of the technical solutions disclosed in the present application are achieved, and are not limited herein.

The above embodiments do not limit the scope of the application. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application are intended to be included within the scope of the present application.

Claims

1. A method of generating program code, comprising:

determining the number of sampling instances respectively corresponding to a plurality of candidate Central Processing Units (CPUs);

determining a target CPU from among the plurality of candidate CPUs according to the number of sampling instances;

disposing a timing sampling task on a sampling instance of the target CPU;

acquiring the program code to be processed and a plurality of online performance sampling data, wherein acquiring the plurality of online performance sampling data comprises: if the current time reaches the set timing time of the timing sampling task, executing the timing sampling task to acquire compiling performance data of the target CPU when compiling the program code to be processed from an on-line production environment, and taking the compiling performance data on the line as the on-line performance sampling data;

Determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage;

determining an optimization algorithm and conversion parameters corresponding to the target compiling optimization plug-in;

processing the plurality of on-line performance sampling data by adopting the conversion parameters to obtain a plurality of target sampling data; and

and processing the program code to be processed according to the corresponding optimization algorithm and the target sampling data to obtain target program code.

2. The method of claim 1, after acquiring a plurality of on-line performance sample data, further comprising:

and carrying out feedback compiling optimization processing on the to-be-compiled program by adopting the online performance sampling data.

3. The method of claim 1, further comprising, after said processing said pending program code according to said corresponding optimization algorithm and said target sample data to obtain target program code:

deleting the program code corresponding to the target file from the target program code;

forming an executable file according to the target program code after the deleting process;

when the program service corresponding to the executable file is issued in the online production environment, the call to the program code in the target file can be skipped.

4. The method of claim 1, wherein said processing said plurality of on-line performance sample data with said conversion parameters to obtain a plurality of target sample data comprises:

and processing the plurality of on-line performance sampling data in parallel by adopting the conversion parameters so as to obtain a plurality of target sampling data.

5. The method of claim 1, the target compilation optimization plugins comprising one or more of the following optimization plugins:

an optimization plug-in supporting a compiling stage, an optimization plug-in supporting a linking stage, an optimization plug-in supporting compiling and an optimization plug-in supporting release assembly.

6. A program code generating apparatus comprising:

the acquisition module is used for acquiring the program code to be processed and a plurality of online performance sampling data;

the first determining module is used for determining a target compiling stage and a target compiling optimization plug-in corresponding to the target compiling stage;

the second determining module is used for determining an optimization algorithm and conversion parameters corresponding to the target compiling optimization plug-in;

the conversion module is used for processing the plurality of online performance sampling data by adopting the conversion parameters so as to obtain a plurality of target sampling data; and

The processing module is used for processing the program codes to be processed according to the corresponding optimization algorithm and the target sampling data so as to obtain target program codes;

the third determining module is used for determining the number of sampling instances respectively corresponding to the plurality of candidate Central Processing Units (CPUs);

a fourth determining module, configured to determine a target CPU from among the plurality of candidate CPUs according to the number of sampling instances;

the deployment module is used for deploying a timing sampling task on the sampling instance of the target CPU;

the acquiring module is specifically configured to:

and if the current time reaches the set timing time of the timing sampling task, executing the timing sampling task to acquire compiling performance data of the target CPU when compiling the program code to be processed from an on-line production environment, and taking the compiling performance data on the line as the on-line performance sampling data.

7. The apparatus of claim 6, the processing module further to:

8. The apparatus of claim 6, further comprising:

the deleting module is used for deleting the program code corresponding to the target file from the target program code;

A generating module for forming an executable file according to the object program code after the deleting process,

9. The apparatus of claim 6, wherein the conversion module is specifically configured to:

10. The apparatus of claim 6, the target compilation optimization plugins comprising one or more of the following optimization plugins:

11. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein, the liquid crystal display device comprises a liquid crystal display device,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-5.

12. A non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the method of any one of claims 1-5.