CN112527404B - Configuration method, device, equipment and medium for chip relay protection general system - Google Patents
Configuration method, device, equipment and medium for chip relay protection general system Download PDFInfo
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Abstract
The application discloses a configuration method and device of a chip relay protection general system, computer equipment and a storage medium, and relates to the technical field of chip relay protection. The method comprises the following steps: under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program; analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core; and the protection core generates a bare running program according to the configuration information. According to the method and the device, the bare running program is generated on the protection core through analysis of the target configuration file, the power equipment is protected and monitored through running the bare running program, compared with the prior art, a plurality of application programs do not need to be rewritten, and therefore the difficulty of upgrading and updating the chip relay protection general system is reduced.
Description
Technical Field
The present application relates to the field of chip relay protection technologies, and in particular, to a method and an apparatus for configuring a chip relay protection general system, a computer device, and a storage medium.
Background
In the prior art, a relay protection device is generally configured with a plurality of board cards, each board card is configured with a CPU, a preset application program is installed on the CPU of each board card, and the board cards implement specific functions by running the application program.
In recent years, with the rise of intelligent relay protection devices, there are increasing demands for the functions of relay protection devices. Therefore, the relay protection device needs to be upgraded and updated. In the prior art, the process of upgrading and updating a relay protection device includes: writing a corresponding application program according to the function to be realized by each board card, and replacing the previous application program with a new application program.
However, in the above method, the application program installed on each board card needs to be updated, which results in a large workload and increases the difficulty of updating the relay protection device.
Disclosure of Invention
Based on this, the embodiment of the application provides a configuration method and device of a chip-based relay protection general system, a computer device and a storage medium.
A configuration method of a chip relay protection general system is applied to the chip relay protection general system with a multi-core processor, the multi-core processor comprises a management core and a protection core, the management core runs an operating system, the protection core runs a bare running program, the bare running program is used for protecting and monitoring power equipment, and the method comprises the following steps:
under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
and generating a bare running program according to the configuration information through the protection core, and performing protection monitoring on the power equipment by running bare running.
In an embodiment of the present application, acquiring a target configuration file through a management core when an operating system is in a running state includes:
under the condition that the operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
In an embodiment of the present application, the multi-core processor includes a protection core memory, where a plurality of functional modules are stored, and the protection core generates a bare-running program according to configuration information, including:
acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from a plurality of function modules through a protection core according to the configuration information;
and generating the bare running program according to the target function module, the attribute configuration information of each target function module and the sequence of each target function module.
In one embodiment of the application, a multi-core processor includes a shared memory, and transfers configuration information to a protection core, including:
storing the configuration information into a shared memory through a management core, and updating write pointer information;
and periodically detecting whether the write pointer information is updated or not through the protection core, and reading the configuration information from the shared memory according to the write pointer information under the condition that the write pointer information is updated.
In an embodiment of the present application, reading the configuration information from the shared memory according to the write pointer information in a storage directory in which the write pointer information carries written configuration information includes:
and reading the configuration information from the shared memory through the protection core according to the storage directory of the configuration information.
In an embodiment of the present application, the multi-core processor further includes a front-end processing circuit, the front-end processing circuit is connected to the shared memory, the configuration information further includes a target processing channel identifier, and the method further includes:
writing the target processing channel identification into the shared memory through the protection core;
and detecting whether the shared memory is updated or not through the front-end processing circuit to obtain a target processing channel identifier, determining a target processing channel from the plurality of processing channels according to the target processing channel identifier through the front-end processing circuit, wherein the target processing channel is used for processing the sampling data.
The utility model provides a chip relay protection general system configuration device, is applied to in the chip relay protection general system that has multicore processor, and this multicore processor is including management core and protection core, and this management core operation operating system, this protection core operation are bare to run the procedure, and this bare to run the procedure and be used for protecting the monitoring to power equipment, and the device includes:
the configuration file acquisition module is used for acquiring a target configuration file through the management core under the condition that the operating system is in a running state, wherein the target configuration file comprises configuration information of the bare running program;
the analysis module is used for analyzing the target configuration file through the management core to obtain configuration information and transmitting the configuration information to the protection core;
and the configuration module is used for generating a bare running program according to the configuration information through the protection core and carrying out protection monitoring on the power equipment by running bare running.
In an embodiment of the application, the configuration file obtaining module is further configured to:
under the condition that the operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
A computer device comprising a memory and a processor, the memory storing a computer program, the processor implementing the following steps when executing the computer program:
under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
and generating a bare running program according to the configuration information through the protection core, and performing protection monitoring on the power equipment by running bare running.
A computer-readable storage medium, on which a computer program is stored which, when executed by a processor, implements the following claims:
under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
and generating a bare running program according to the configuration information through the protection core, and performing protection monitoring on the power equipment by running bare running.
The beneficial effects brought by the technical scheme provided by the embodiment of the application at least comprise:
the configuration method, the configuration device, the computer device and the storage medium of the chip-based relay protection general system provided by the embodiment of the application are applied to the chip-based relay protection general system with a multi-core processor, wherein the multi-core processor comprises a management core and a protection core, the management core runs an operating system, the protection core runs a bare running program, and the bare running program is used for protecting and monitoring power equipment, and the method comprises the following steps: under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program; analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core; and the protection core generates a bare running program according to the configuration information. According to the method and the device, the bare running program is generated on the protection core through analysis of the target configuration file, the power equipment is protected and monitored through running the bare running program, compared with the prior art, a plurality of application programs do not need to be rewritten, and therefore the difficulty of upgrading and updating the chip relay protection general system is reduced.
Drawings
Fig. 1 is a flowchart of a configuration method of a general system for chip relay protection according to an embodiment of the present application;
fig. 2 is a structural diagram of a multi-core processor of a chip-based relay protection general system according to an embodiment of the present application;
fig. 3 is a flowchart of a method for obtaining a target configuration file according to an embodiment of the present application;
fig. 4 is a block diagram of a configuration device of a general system for chip relay protection according to an embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
With the rapid development of electronic information technology, industrial control products are increasingly implemented by using a System On Programmable Chip (SOPC), a semi-custom Chip, or even a fully custom Chip ASIC (Integrated Circuit Chip). On the basis of chip technology, it is a technical hotspot in the field to research a single-chip-based universal relay protection system.
In practical application, a relay protection system needs to have the following two functions, on one hand, a high-real-time task, namely a protection calculation task with the scheduling precision reaching 100us level, can be completed, so that quick response can be realized under the condition that power equipment has a fault, and the safety of a power grid system is ensured. On the other hand, multi-system service can be realized, so that the functions of man-machine interaction, data reporting, filtering, measurement and the like can be performed.
Based on the above requirements, in the prior art, a relay protection device is generally configured with a plurality of board cards, each board card is configured with a CPU, a preset application program is installed on the CPU of each board card, and the board cards implement specific functions by running the application program.
However, in recent years, with the rise of intelligent relay protection devices, there has been an increasing demand for the functions of relay protection devices. The number of the board cards arranged on the chip relay protection general system is more and more, and the structure of the chip relay protection general system is more and more complex. Therefore, the relay protection device needs to be upgraded and updated.
In the prior art, the process of upgrading and updating a relay protection device includes: writing a corresponding application program according to the function to be realized by each board card, and replacing the previous application program with a new application program.
However, in the above method, the application program installed on each board card needs to be updated, which results in a large workload and increases the difficulty of updating the relay protection device.
Based on the technical problem, the configuration method of the chip-based relay protection general system provided in the embodiment of the present application is applied to a chip-based relay protection general system having a multi-core processor, where the multi-core processor includes a management core and a protection core, the management core runs an operating system, the protection core runs a bare running program, and the bare running program is used for protecting and monitoring power equipment, and the method includes: under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program; analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core; and the protection core generates a bare running program according to the configuration information. According to the method and the device, the bare running program is generated on the protection core through analysis of the target configuration file, the power equipment is protected and monitored through running the bare running program, compared with the prior art, a plurality of application programs do not need to be rewritten, and therefore the difficulty of upgrading and updating the chip relay protection general system is reduced.
Please refer to fig. 1, which shows a flowchart of a configuration method of a general chip relay protection system according to an embodiment of the present application, where the method is applied to a general chip relay protection system with a multi-core processor, where the multi-core processor includes a management core and a protection core, the management core runs an operating system, and the protection core runs a bare running program, and the bare running program is used for protecting and monitoring a power device. The configuration method of the chip relay protection general system comprises the following steps:
Wherein the target configuration file includes configuration information of the bare running program.
First, a general system for chip relay protection in the embodiment of the present application is described below:
the multi-CORE processor adopts an SOPC chip with an asymmetric heterogeneous system, the SOPC chip has a dual-CORE Cortex-A9+ FPGA architecture, as shown in FIG. 2, two CPU COREs on the dual-CORE A9 ARM processor are CORE1 and CORE2 respectively, wherein CORE1 is a main CORE, and CORE2 is a secondary CORE. BM software is operated on a CORE1, Linux operating system software is operated on a CORE2, and the multi-CORE processor can combine the controllable, efficient and hard real-time characteristics of the BM software with the complete system function, network function and the like of the Linux operating system. In the embodiment of the application, CORE1 is a protection CORE and is used for processing real-time services, and CORE2 is a management CORE and is used for processing non-real-time services. The front-end processing circuit is arranged on an FPGA framework, and the system memory is arranged on an on-chip high-speed bus.
The management core is used for processing non-real-time services and mainly realizes functions of device management, device communication and the like, and can run management communication application programs such as MMS messages, wave recording, communication, management and the like based on a Linux operating system. The non-real-time service mainly relates to functions of management, events, interfaces, time synchronization, wave recording and the like, the requirement on task real-time performance is not high, operating system service resources need to be called, multi-task management is achieved, the non-real-time service is achieved based on the operating system, the requirement on real-time performance is not high, multi-task management is achieved, and data storage is large.
In the embodiment of the application, the management core comprises a management module, a communication module, a report and wave recording module and a log module, wherein the management module can be used for processing data, the communication module can be used for communicating with an external terminal, the report and wave recording module can be used for generating a report file, and the log module can be used for recording a working log of the management core.
In this embodiment of the application, as shown in fig. 3, the process of acquiring the target configuration file by the management core may include the following steps:
step 301: in the case of an operating system in a running state, a configuration operation instruction is received by a management core.
The configuration operation instruction can be sent to the multi-core processor by a user through terminal equipment, and the management core can receive the configuration operation instruction through the communication module, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file.
Step 302: and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
After receiving the configuration operation instruction, the management core determines a storage directory indicated by the configuration operation instruction from the management core memory according to the storage directory indicated by the configuration operation instruction, and reads the target configuration file from the storage directory.
And 102, analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core.
In the embodiment of the application, an analysis application program is pre-installed in the management core, and the analysis application program can analyze the target configuration file to obtain the configuration information.
The configuration information includes functional modules, attribute configuration information of each functional module, and a sequence of each functional module, where the essence of a functional module is a packaged program code, and a functional module is an operation set for implementing a function.
In this embodiment, the process of the management core transferring the configuration information to the protection core may include the following steps:
the multi-core processor comprises a system memory, wherein the system memory comprises a management core memory, a protection core memory and a shared memory, and the management core memory is connected with the management core and used for storing data related to an operating system and various application programs in the management core. The protection core memory is connected with the protection core and used for storing relevant data of the bare running program running in the protection core. The shared memory is respectively connected with the protection core and the management core and is used for storing data needing to be transmitted between the protection core and the management core.
On the basis, in the embodiment of the application, the management core stores the configuration information into the shared memory and updates the write pointer information, wherein the write pointer information is used for indicating the storage directory of the configuration information in the shared memory. The protection core may periodically detect whether the write pointer information is updated, and read the configuration information from the shared memory according to the write pointer information in case of update of the write pointer information.
Optionally, the write pointer information carries a storage directory of the written configuration information, and the protection core may read the configuration information from the shared memory according to the storage directory of the configuration information.
And 103, generating a bare running program through the protection core according to the configuration information, and performing protection monitoring on the power equipment by running bare running.
In the embodiment of the application, the protection core is used for processing the real-time service, wherein the real-time service has high real-time requirement on data processing, and the BM mode can be adopted to better ensure the real-time requirement on data. Based on this, the main functions implemented by the protection core include: the system mainly comprises real-time application modules of GOOSE analysis, a protection algorithm, GOOSE input and output, trip logic, GOOSE output and customization management. It has the relevant features: the timing execution in the sampling interruption has high real-time requirement, and relates to the processing of different algorithms, different protection principles and logic.
In the embodiment of the application, a plurality of functional modules are stored in advance in a protection core memory, different functional modules are operation sets for realizing one function, and after the protection core reads configuration information from a shared memory, a target functional module, attribute configuration information of each target functional module and the sequence of each target functional module can be acquired from the plurality of functional modules in the protection core memory according to the configuration information; and generating a bare running program according to the target function module, the attribute configuration information of each target function module and the sequence of each target function module.
In the embodiment of the application, different configuration information can be obtained according to different target configuration files, and the bare running program generated by the protection core according to different configuration information can complete different functions. In the embodiment of the application, when the chip-based relay protection general system needs to be upgraded and updated, only the target configuration file needs to be replaced, a plurality of application programs do not need to be rewritten, the step of upgrading and updating the chip-based relay protection general system is simplified, and the workload is reduced.
In an optional implementation manner, in this embodiment of the application, as shown in fig. 2, the multi-core processor further includes a front-end processing circuit, a front-end processing circuit module is laid out on an FPGA of the multi-core processor, and the implemented functions are as follows: the calculation of Ethernet MAC, network storm suppression, SV analysis, filtering, interpolation and the like mainly comprises a gigabit Ethernet, SV decoding, storm suppression, low-pass filtering, message distribution, interpolation synchronization and other front-end data processing modules, and has the following relevant characteristics: the data processing capacity is large, the occupied computing resources are more, the processing logics of all channels are basically consistent, and the instantiating performance is strong.
The front-end processing circuit is connected with the shared memory, and the configuration information further comprises a target processing channel identifier. The method further comprises the following steps: the method comprises the steps of writing a target processing channel identifier into a shared memory through a protection core, detecting whether the shared memory is updated or not through a front-end processing circuit, if the fact that a specific data list in the shared memory is updated is detected, obtaining the target processing channel identifier from the specific data list, determining a target processing channel from a plurality of processing channels through the front-end processing circuit according to the target processing channel identifier, and processing sampling data through the target processing channel.
The configuration method of the chip-based relay protection general system provided by the embodiment of the application is applied to the chip-based relay protection general system with the multi-core processor, the multi-core processor comprises a management core and a protection core, the management core runs an operating system, the protection core runs a bare running program, the bare running program is used for protecting and monitoring power equipment, and the method comprises the following steps: under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program; analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core; and the protection core generates a bare running program according to the configuration information. According to the method and the device, the bare running program is generated on the protection core through analysis of the target configuration file, the power equipment is protected and monitored through running the bare running program, compared with the prior art, a plurality of application programs do not need to be rewritten, and therefore the difficulty of upgrading and updating the chip relay protection general system is reduced.
Referring to fig. 4, a block diagram of a general system configuration device 400 for relay protection on chip according to an embodiment of the present application is shown. As shown in fig. 4, the general system configuration device for chip relay protection is applied to a general system for chip relay protection having a multi-core processor, where the multi-core processor includes a management core and a protection core, the management core runs an operating system, the protection core runs a bare running program, the bare running program is used for protecting and monitoring power equipment, and the general system configuration device for chip relay protection: a configuration file obtaining module 401, an analyzing module 402 and a configuration module 403, wherein:
a configuration file obtaining module 401, configured to obtain, by the management core, a target configuration file when the operating system is in a running state, where the target configuration file includes configuration information of the bare-running program;
the analysis module 402 is configured to analyze the target configuration file through the management core to obtain configuration information, and transmit the configuration information to the protection core;
and a configuration module 403, configured to generate a bare running program according to the configuration information through the protection core, and perform protection monitoring on the electrical device by running bare running.
In an embodiment of the present application, the configuration file obtaining module 401 is further configured to:
under the condition that the operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
In an embodiment of the present application, the multi-core processor includes a protection core memory, where a plurality of functional modules are stored, and the configuration module 403 is further configured to:
acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from a plurality of function modules through a protection core according to the configuration information;
and generating the bare running program according to the target function module, the attribute configuration information of each target function module and the sequence of each target function module.
In one embodiment of the present application, the multi-core processor includes a shared memory, and the parsing module 402 is further configured to:
storing the configuration information into a shared memory through a management core, and updating write pointer information;
and periodically detecting whether the write pointer information is updated or not through the protection core, and reading the configuration information from the shared memory according to the write pointer information under the condition that the write pointer information is updated.
In an embodiment of the application, the write pointer information carries a storage directory of written configuration information, and the parsing module 402 is further configured to:
and reading the configuration information from the shared memory through the protection core according to the storage directory of the configuration information.
In an embodiment of the present application, the multi-core processor further includes a front-end processing circuit, the front-end processing circuit is connected to the shared memory, the configuration information further includes a target processing channel identifier, and the configuration module 403 is further configured to:
writing the target processing channel identification into the shared memory through the protection core;
and detecting whether the shared memory is updated or not through the front-end processing circuit to obtain a target processing channel identifier, determining a target processing channel from the plurality of processing channels according to the target processing channel identifier through the front-end processing circuit, wherein the target processing channel is used for processing the sampling data.
For specific limitations of the configuration apparatus for the chip-based relay protection general system, reference may be made to the above limitations of the configuration method for the chip-based relay protection general system, and details are not repeated here. All or part of each module in the chip relay protection general system configuration device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute the operations of the modules.
In one embodiment of the present application, there is provided a computer device comprising a memory and a processor, the memory having stored therein a computer program, the processor implementing the following steps when executing the computer program:
under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
and generating a bare running program according to the configuration information through the protection core, and performing protection monitoring on the power equipment by running bare running.
In one embodiment of the application, the processor when executing the computer program may further implement the steps of:
under the condition that the operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
In an embodiment of the present application, the multi-core processor includes a protected core memory, where a plurality of functional modules are stored, and when the processor executes the computer program, the following steps may be further implemented:
acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from a plurality of function modules through a protection core according to the configuration information;
and generating the bare running program according to the target function module, the attribute configuration information of each target function module and the sequence of each target function module.
In an embodiment of the present application, the multi-core processor includes a shared memory, and the following steps may be further implemented when the processor executes the computer program:
storing the configuration information into a shared memory through a management core, and updating write pointer information;
and periodically detecting whether the write pointer information is updated or not through the protection core, and reading the configuration information from the shared memory according to the write pointer information under the condition that the write pointer information is updated.
In an embodiment of the present application, the write pointer information carries a storage directory of the written configuration information, and the processor, when executing the computer program, may further implement the following steps:
and reading the configuration information from the shared memory through the protection core according to the storage directory of the configuration information.
In an embodiment of the present application, the multi-core processor further includes a front-end processing circuit, the front-end processing circuit is connected to the shared memory, the configuration information further includes a target processing channel identifier, and the processor, when executing the computer program, may further implement the following steps:
writing the target processing channel identification into the shared memory through the protection core;
and detecting whether the shared memory is updated or not through the front-end processing circuit to obtain a target processing channel identifier, determining a target processing channel from the plurality of processing channels according to the target processing channel identifier through the front-end processing circuit, wherein the target processing channel is used for processing the sampling data.
The implementation principle and technical effect of the computer device provided by the embodiment of the present application are similar to those of the method embodiment described above, and are not described herein again.
In an embodiment of the application, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when being executed by a processor, carries out the steps of:
under the condition that an operating system is in a running state, acquiring a target configuration file through a management core, wherein the target configuration file comprises configuration information of a bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
and generating a bare running program according to the configuration information through the protection core, and performing protection monitoring on the power equipment by running bare running.
In one embodiment of the application, the computer program, when executed by the processor, may further implement the steps of:
under the condition that the operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing a target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading a target configuration file based on the storage directory.
In an embodiment of the present application, the multi-core processor includes a protected core memory, a plurality of functional modules are stored in the protected core memory, and the computer program, when executed by the processor, further implements the following steps:
acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from a plurality of function modules through a protection core according to the configuration information;
and generating the bare running program according to the target function module, the attribute configuration information of each target function module and the sequence of each target function module.
In an embodiment of the application, the multi-core processor comprises a shared memory, and the computer program, when executed by the processor, further implements the steps of:
storing the configuration information into a shared memory through a management core, and updating write pointer information;
and periodically detecting whether the write pointer information is updated or not through the protection core, and reading the configuration information from the shared memory according to the write pointer information under the condition that the write pointer information is updated.
In an embodiment of the application, the write pointer information carries a storage directory of the written configuration information, and when executed by the processor, the computer program further implements the following steps:
and reading the configuration information from the shared memory through the protection core according to the storage directory of the configuration information.
In an embodiment of the present application, the multi-core processor further includes a front-end processing circuit, the front-end processing circuit is connected to the shared memory, the configuration information further includes a target processing channel identifier, and when executed by the processor, the computer program further implements the following steps:
writing the target processing channel identification into the shared memory through the protection core;
and detecting whether the shared memory is updated or not through the front-end processing circuit to obtain a target processing channel identifier, determining a target processing channel from the plurality of processing channels according to the target processing channel identifier through the front-end processing circuit, wherein the target processing channel is used for processing the sampling data.
The implementation principle and technical effect of the computer-readable storage medium provided by this embodiment are similar to those of the above-described method embodiment, and are not described herein again.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. The utility model provides a chip relay protection general system configuration method, its characterized in that, the method is applied to in the chip relay protection general system who has multicore processor, multicore processor includes management core and protection core, management core operation operating system, protection core operation bare running program, bare running program is used for protecting the monitoring to power equipment, multicore processor includes protection core memory, the storage has a plurality of functional module in the protection core memory, the method includes:
under the condition that an operating system is in a running state, acquiring a target configuration file through the management core, wherein the target configuration file comprises configuration information of the bare running program;
analyzing the target configuration file through the management core to obtain configuration information, and transmitting the configuration information to the protection core;
acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from the plurality of function modules through the protection core according to the configuration information; and generating the bare running program according to the target function modules, the attribute configuration information of each target function module and the sequence of each target function module, and performing protection monitoring on the power equipment by running the bare running.
2. The method of claim 1, wherein obtaining, by the management core, the target configuration file with the operating system in a running state comprises:
under the condition that an operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing the target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading the target configuration file based on the storage directory.
3. The method of claim 1, wherein the multi-core processor comprises a shared memory, and wherein communicating the configuration information to the protection core comprises:
storing the configuration information into the shared memory through the management core, and updating write pointer information;
and periodically detecting whether the write pointer information is updated or not through the protection core, and reading the configuration information from the shared memory according to the write pointer information under the condition that the write pointer information is updated.
4. The method according to claim 3, wherein the writing pointer information carries a storage directory of written configuration information, and the reading the configuration information from the shared memory according to the writing pointer information includes:
and reading the configuration information from the shared memory through the protection core according to the storage directory of the configuration information.
5. The method of claim 3, wherein the multi-core processor further comprises front-end processing circuitry, the front-end processing circuitry coupled to the shared memory, wherein the configuration information further comprises a target processing channel identification, and wherein the method further comprises:
writing, by the protection core, the target processing channel identification to the shared memory;
and detecting whether the shared memory is updated or not through the front-end processing circuit so as to obtain the target processing channel identification, determining a target processing channel from a plurality of processing channels through the front-end processing circuit according to the target processing channel identification, wherein the target processing channel is used for processing the sampling data.
6. The utility model provides a chip-based relay protection general system configuration device, its characterized in that is applied to in the chip-based relay protection general system that has multicore processor, multicore processor is including management core and protection core, management core operation operating system, the program is run to the protection core is used for protecting the monitoring to power equipment, multicore processor is including protecting the nuclear memory, the storage has a plurality of functional modules in the protection nuclear memory, the device includes:
a configuration file obtaining module, configured to obtain a target configuration file through the management core when an operating system is in a running state, where the target configuration file includes configuration information of the bare running program;
the analysis module is used for analyzing the target configuration file through the management core to obtain configuration information and transmitting the configuration information to the protection core;
the configuration module is used for acquiring a target function module, attribute configuration information of each target function module and the sequence of each target function module from the plurality of function modules through the protection core according to the configuration information; and generating the bare running program according to the target function modules, the attribute configuration information of each target function module and the sequence of each target function module, and performing protection monitoring on the power equipment by running the bare running.
7. The apparatus of claim 6, wherein the profile acquisition module is further configured to:
under the condition that an operating system is in a running state, receiving a configuration operation instruction through the management core, wherein the configuration operation instruction is used for indicating a storage directory for storing the target configuration file;
and responding to the configuration operation instruction through the management core, determining a storage directory indicated by the configuration operation instruction, and reading the target configuration file based on the storage directory.
8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method of any of claims 1 to 5.
9. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
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| CN113258547B (en) * | 2021-07-01 | 2021-09-24 | 南方电网数字电网研究院有限公司 | Chip-level relay protection device and system |
| CN113258546B (en) * | 2021-07-01 | 2021-10-22 | 南方电网数字电网研究院有限公司 | Chip-level software and hardware cooperative relay protection device |
| CN113434178B (en) * | 2021-07-08 | 2023-11-14 | 恒安嘉新（北京）科技股份公司 | Programmable multiphase power supply online upgrading method, device, equipment and storage medium |
| CN114047963A (en) * | 2021-11-26 | 2022-02-15 | 南方电网科学研究院有限责任公司 | Online monitoring device configuration method, device, equipment and storage medium |
| CN116578326A (en) * | 2023-05-23 | 2023-08-11 | 南京国电南自电网自动化有限公司 | Device and method for online upgrading relay protection program based on multi-core processor |
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