CN112511273B - Information processing method and device for reducing error rate of digital circuit - Google Patents
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Abstract
The invention discloses an information processing method and a device for reducing the error rate of a digital circuit, which are characterized in that a pulse signal set comprising first pulse information, second pulse information and pulse information from Nth pulse information is obtained, and corresponding reserved verification code information is obtained according to all the pulse information; copying all reserved verification code information on M devices respectively for storage, and acquiring first access verification code information according to the first pulse information; verifying the first access verification code information through the first reserved verification code to obtain a verification result; and determining whether the first access authority is obtained or not according to the verification result, and accessing the first pulse information to the output end. The technical problems that in the prior art, a filter is used for filtering, but interference factors are diversified, the filtering effect is limited, the reliability of signal transmission cannot be guaranteed, and errors exist are solved. The technical effects of encrypting signals in a digital circuit by using a block chain technology, ensuring the stability of a signal transmission process and reducing the error rate of the circuit are achieved.
Description
Technical Field
The present invention relates to the field of digital circuit technology, and in particular, to an information processing method and apparatus for reducing an error rate of a digital circuit.
Background
Circuits that perform arithmetic and logical operations on digital quantities with digital signals are called digital circuits, or digital systems. It is also called digital logic circuit because it has logic operation and logic processing functions. Modern digital circuits are constructed from several digitally integrated devices made by semiconductor processes. Since the digital circuit uses a pulse signal having a short rising edge/falling edge, an unnecessary electromagnetic wave (noise) including a high-frequency component is emitted to the outside, and the digital circuit responds sensitively to an electromagnetic wave (noise) from the outside, causing a malfunction. In addition, there are problems that crosstalk occurs between lines in the circuit and a power supply voltage fluctuates due to a sudden change in current when the digital device is turned on/off. Thus, in a digital circuit, it is necessary to consider a distributed constant circuit including an inductance and a parasitic capacitance of a wiring, and to prevent waveform confusion and signal reflection, delay, attenuation, and intermodulation distortion due to electromagnetic interference between lines caused by overshoot and undershoot.
However, in the process of implementing the technical solution of the invention in the embodiments of the present application, the inventors of the present application find that the above-mentioned technology has at least the following technical problems:
in the prior art, a filter is used for filtering, but interference factors have diversity and limited filtering effect, the reliability of signal transmission still cannot be ensured, and the technical problem of errors exists.
Disclosure of Invention
The embodiment of the application provides an information processing method and an information processing device for reducing the error rate of a digital circuit, and solves the technical problems that in the prior art, a filter is used for filtering, but interference factors are diversified, the filtering effect is limited, the reliability of signal transmission still cannot be guaranteed, and errors exist. The method has the advantages that the block chain technology is utilized to encrypt the signals in the digital circuit, the stability of the signal transmission process is ensured, the influence on the signal transmission content due to external interference is avoided, the signal transmission is ensured not to be distorted, and the technical effect of effectively reducing the circuit signal transmission error rate caused by interference or tampering in the digital circuit is achieved.
In view of the above problems, embodiments of the present application provide an information processing method and apparatus for reducing an error rate of a digital circuit.
In a first aspect, an embodiment of the present application provides an information processing method for reducing an error rate of a digital circuit, the method being applied to a digital circuit, the digital circuit having an input end and an output end, by obtaining a set of pulse signals, the set of pulse signals including first pulse information, second pulse information, and up to nth pulse information, the first pulse information being information obtained at the input end; acquiring first reserved verification code information according to the first pulse information; acquiring second reserved verification code information according to the second pulse information; acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1; respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1; acquiring first access verification code information according to the first pulse information; verifying the first access verification code information through the first reserved verification code information to obtain a verification result; determining whether a first access right is obtained or not according to the verification result; and accessing the first pulse information to the output end according to the first access authority.
In another aspect, the present application also provides an information processing apparatus for reducing an error rate of a digital circuit, the apparatus including:
a first obtaining unit, configured to obtain a pulse signal set, where the pulse signal set includes first pulse information, second pulse information, and up to nth pulse information, and the first pulse information is obtained information at an input terminal of a digital circuit;
a second obtaining unit, configured to obtain first reserved verification code information according to the first pulse information;
a third obtaining unit, configured to obtain second reserved verification code information according to the second pulse information;
a fourth obtaining unit, configured to obtain nth reserved verification code information according to the nth pulse information, where N is a natural number greater than 1;
the first execution unit is used for respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1;
a fifth obtaining unit, configured to obtain first access verification code information according to the first pulse information;
the first verification unit is used for verifying the first access verification code information through the first reserved verification code information to obtain a verification result;
a first determining unit, configured to determine whether to obtain a first access right according to the verification result;
and the second execution unit is used for accessing the first pulse information to the output end of the digital circuit according to the first access authority.
In a third aspect, the present invention provides an information processing apparatus for reducing an error rate of a digital circuit, comprising a memory, a processor and a computer program stored on the memory and operable on the processor, wherein the processor implements the steps of the method according to any one of the first aspect when executing the program.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
the embodiment of the application provides an information processing method for reducing the error rate of a digital circuit, which is applied to the digital circuit, wherein the digital circuit is provided with an input end and an output end, and a pulse signal set is obtained and comprises first pulse information, second pulse information and pulse information from the Nth pulse information, and the first pulse information is information obtained at the input end; acquiring first reserved verification code information according to the first pulse information; acquiring second reserved verification code information according to the second pulse information; acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1; respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1; acquiring first access verification code information according to the first pulse information; verifying the first access verification code information through the first reserved verification code information to obtain a verification result; determining whether a first access right is obtained or not according to the verification result; and accessing the first pulse information to the output end according to the first access authority. The method has the advantages that the block chain technology is utilized to encrypt the signals in the digital circuit, the stability of the signal transmission process is ensured, the influence on the signal transmission content due to external interference is avoided, the signal transmission is ensured not to be distorted, and the technical effect of effectively reducing the circuit signal transmission error rate caused by interference or tampering in the digital circuit is achieved. Therefore, the technical problems that in the prior art, filtering processing is carried out by using a filter, but interference factors have diversity, the filtering effect is limited, the reliability of signal transmission still cannot be ensured, and errors exist are solved.
The foregoing description is only an overview of the technical solutions of the present application, and the present application can be implemented according to the content of the description in order to make the technical means of the present application more clearly understood, and the following detailed description of the present application is given in order to make the above and other objects, features, and advantages of the present application more clearly understandable.
Drawings
FIG. 1 is a flowchart illustrating an information processing method for reducing error rate of a digital circuit according to an embodiment of the present disclosure;
FIG. 2 is a block diagram of an information processing apparatus for reducing error rate of a digital circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an exemplary electronic device according to an embodiment of the present application.
Description of reference numerals: a first obtaining unit 11, a second obtaining unit 12, a third obtaining unit 13, a fourth obtaining unit 14, a first executing unit 15, a fifth obtaining unit 16, a first verifying unit 17, a first determining unit 18, a second executing unit 19, a bus 300, a receiver 301, a processor 302, a transmitter 303, a memory 304, and a bus interface 306.
Detailed Description
The embodiment of the application provides an information processing method and an information processing device for reducing the error rate of a digital circuit, and solves the technical problems that in the prior art, a filter is used for filtering, but interference factors are diversified, the filtering effect is limited, the reliability of signal transmission still cannot be guaranteed, and errors exist.
Hereinafter, example embodiments according to the present application will be described in detail with reference to the accompanying drawings. It should be apparent that the described embodiments are merely some embodiments of the present application and not all embodiments of the present application, and it should be understood that the present application is not limited to the example embodiments described herein.
Summary of the application
The digital circuit emits unnecessary electromagnetic waves (noise) including high-frequency components to the outside by using a pulse signal having a short rising edge/falling edge, and responds sensitively to external electromagnetic waves (noise), causing malfunction. In addition, there are problems that crosstalk occurs between lines in the circuit and a power supply voltage fluctuates due to a sudden change in current when the digital device is turned on/off. Thus, in a digital circuit, it is necessary to consider a distributed constant circuit including an inductance and a parasitic capacitance of a wiring, and to prevent waveform confusion and signal reflection, delay, attenuation, and intermodulation distortion due to electromagnetic interference between lines caused by overshoot and undershoot. However, in the prior art, a filter is used for filtering, but interference factors are diverse, the filtering effect is limited, the reliability of signal transmission still cannot be guaranteed, and an error exists.
In view of the above technical problems, the technical solution provided by the present application has the following general idea:
the embodiment of the application provides an information processing method for reducing the error rate of a digital circuit, which is applied to the digital circuit, wherein the digital circuit is provided with an input end and an output end, and a pulse signal set is obtained and comprises first pulse information, second pulse information and pulse information from the Nth pulse information, and the first pulse information is information obtained at the input end; acquiring first reserved verification code information according to the first pulse information; acquiring second reserved verification code information according to the second pulse information; acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1; respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1; acquiring first access verification code information according to the first pulse information; verifying the first access verification code information through the first reserved verification code information to obtain a verification result; determining whether a first access right is obtained or not according to the verification result; and accessing the first pulse information to the output end according to the first access authority. The method has the advantages that the block chain technology is utilized to encrypt the signals in the digital circuit, the stability of the signal transmission process is ensured, the influence on the signal transmission content due to external interference is avoided, the signal transmission is ensured not to be distorted, and the technical effect of effectively reducing the circuit signal transmission error rate caused by interference or tampering in the digital circuit is achieved.
Having thus described the general principles of the present application, various non-limiting embodiments thereof will now be described in detail with reference to the accompanying drawings.
Example one
Fig. 1 is a flowchart illustrating an information processing method for reducing an error rate of a digital circuit according to an embodiment of the present disclosure, and as shown in fig. 1, an information processing method for reducing an error rate of a digital circuit is provided in an embodiment of the present disclosure, the method is applied to a digital circuit, the digital circuit has an input terminal and an output terminal, and the method includes:
step 100: obtaining a pulse signal set, wherein the pulse signal set comprises first pulse information, second pulse information and pulse information from N to N, and the first pulse information is information obtained at the input end;
specifically, signals in the digital circuit are acquired in a segmented mode, from the input end to the output end of the digital circuit, pulse signals of the input end serve as first pulse information, pulse signals in adjacent circuits serve as second pulse information, and the like, and pulse signals in all circuit segments in the digital circuit are acquired.
Step 200: acquiring first reserved verification code information according to the first pulse information;
step 300: acquiring second reserved verification code information according to the second pulse information;
step 400: acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1;
step 500: respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1;
specifically, in order to ensure the safety and reliability of information in a circuit, in the embodiment of the present application, a block chaining technology is adopted to perform encryption operations on signals acquired in each circuit segment, so as to ensure the consistency of passwords in the same circuit, thereby ensuring the reliability and stability of pulse signals transmitted in the circuit, that is, the first pulse information is encrypted to obtain the first reserved identifying code information, the second pulse information is encrypted to obtain the second reserved identifying code information, and so on … … the nth pulse information is encrypted to obtain the nth reserved identifying code information, all the reserved identifying code information is subjected to block chaining storage, and the signals are prevented from being tampered with by other interference. The block chain technology is a universal underlying technical framework, and can generate and synchronize data on distributed nodes through a consensus mechanism, and realize automatic execution and data operation of contract terms by means of programmable scripts. A block chain is defined as a data structure that organizes data blocks in time sequence, with chain-like connections being formed in order between different blocks, by means of which a digital ledger is built.
Furthermore, the first reserved verification code information of the first pulse information is obtained by repeated training through massive data training, and in order to ensure the safety of training data during training, the first pulse information in the experimental data for training is generated into the first reserved verification code, wherein the first reserved verification code corresponds to the first pulse information one by one; generating a second reserved verification code according to the second pulse information and the first reserved verification code; … … generating an Nth reserved verification code according to the Nth pulse information and the Nth-1 reserved verification code; taking the first pulse information and the first reserved verification code as a first storage unit; taking the second pulse information and the second reserved verification code as a second storage unit; … … uses the Nth pulse information and the Nth reserved verification code as the Nth storage unit. Respectively copying and storing the first storage unit, the second storage unit and the … … Nth storage unit in N devices; when the training data needs to be called, after each next node receives the data stored by the previous node, the data is verified through a common identification mechanism and then stored, each storage unit is connected in series through a Hash technology, so that the training data is not easy to lose and damage, the data information is encrypted in a mode of carrying out block chain calculation on each pulse information to obtain the whole training data, and then the safe and accurate training data is obtained to obtain the first reserved verification code information.
Step 600: acquiring first access verification code information according to the first pulse information;
step 700: verifying the first access verification code information through the first reserved verification code information to obtain a verification result;
step 800: determining whether a first access right is obtained or not according to the verification result;
step 900: and accessing the first pulse information to the output end according to the first access authority.
Specifically, when information is received, encrypted data can be continuously transmitted and used by verification, when the encrypted data passes verification, the data is processed when the encrypted data does not pass verification, the processing process is correspondingly processed according to first pulse information and a first reserved verification code until the received data passes verification, namely, when a transmitted signal is the same as other signals in the circuit or meets a set condition, the transmitted pulse information is not influenced or tampered, or the influence is small and no signal error is caused, the transmission of a circuit signal is allowed to be completed by outputting the verified pulse signal from an output end, the signal in the digital circuit is encrypted by using a block chain technology, the stability of the signal transmission process is ensured, the influence on the signal transmission content due to external interference is avoided, the signal transmission is not distorted, and the technical effect of the error rate of the circuit signal transmission caused by the interference or tampering in the digital circuit is effectively reduced And (5) fruit. Therefore, the technical problems that in the prior art, filtering processing is carried out by using a filter, but interference factors have diversity, the filtering effect is limited, the reliability of signal transmission still cannot be ensured, and errors exist are solved.
Further, the embodiment of the present application further includes:
step 1010: obtaining first output information of the output end;
step 1020: obtaining first signal comparison data according to the first pulse information and the first output information;
step 1030: judging whether the first signal comparison data meet a first preset threshold value or not;
step 1040: when the first signal difference does not meet the first signal comparison requirement, obtaining a first signal difference value according to the first signal comparison data;
step 1050: and correcting the first output information according to the first signal difference value.
Specifically, in order to ensure that a circuit signal is not affected and tampered in a transmission process, in the embodiment of the present application, pulse information at an input end and pulse information at an output end of a digital circuit are compared to obtain similarity data of the two signal information, that is, first signal comparison data, and whether the first signal comparison data meets a threshold set by a system is determined. When the error rate of the digital circuit signal is not met, the change data is revised according to the information of the input end according to the comparison condition of the pulse information of the input end and the pulse information of the output end, or the pulse information of the input end is directly replaced with the information of the output end for passing transmission, so that the information of the output end and the input end is ensured to be consistent, the reliability of the transmission of the circuit signal is ensured, and the error rate of the digital circuit signal is effectively reduced.
Further, in order to improve the accuracy of the first signal comparison data, step 1020 of the present application includes:
step 1021: taking the first pulse information as first input data;
step 1022: taking the first output information as second input data;
step 1023: inputting the first input data and the second input data into a first training model, wherein the first training model is obtained by training a plurality of sets of training data, and each set of training data in the plurality of sets of training data includes: the first input data, the second input data and identification information for identifying first signal comparison data;
step 1024: and obtaining output information of the first training model, wherein the output information comprises the first signal comparison data information.
Specifically, in order to improve the accuracy of the analysis data, the embodiment of the present application adopts a neural network model, and uses the pulse information at the input end of the digital circuit as the first input data and the output information of the digital circuit as the second input data, and performs statistical calculation using the two data to match the signal comparison data with the two points at the input end and the output end of the circuit. The first training model is a training model which is formed by training and correcting a plurality of groups of pulse information, output information and identification information for identifying first signal comparison data as training data, and the accuracy of the neural network model is ensured through training and correcting a large amount of data. Thus, the output result of the signal comparison data matched with the identification can be obtained by inputting the input data into the training model.
Further, the Neural network model, i.e., Neural network model in machine learning, Neural Network (NN), is a complex Neural network system formed by a large number of simple processing units (called neurons) widely connected to each other, reflects many basic features of human brain functions, and is a highly complex nonlinear dynamical learning system. Neural network models are described based on mathematical models of neurons. Artificial Neural Networks (Artificial Neural Networks) are a description of the first-order properties of the human brain system. Briefly, it is a mathematical model. In the embodiment of the present application, the neural network model is trained by a large amount of the pulse information, the output information, and the identification information identifying the first signal comparison data.
Still further, the training process is essentially a supervised learning process. Each set of training data of the plurality of sets of training data comprises: the first input data, the second input data and the identification information of the first signal comparison data. By inputting the first input data and the second input data, the neural network model outputs identification information for identifying first signal comparison data, the output first signal comparison data is compared with the identification information for identifying the first signal comparison data, if the output first signal comparison data is consistent with the identification information for identifying the first signal comparison data, the group of data is supervised and learned, and then the next group of data is supervised and learned; if the first signal comparison data is inconsistent with the identification information for identifying the first signal comparison data, the neural network learning model adjusts and corrects the neural network learning model, and when the first signal comparison data output by the neural network learning model is consistent with the identification information for identifying the first signal comparison data, the supervised learning of the next group of data is carried out until the neural network model reaches the expected accuracy rate, and the supervised learning process is finished. The neural network model is continuously corrected and optimized through training data, the accuracy of the neural network model for processing the information is improved through the process of supervised learning, so that accurate first signal comparison data matched with pulse signals of an input end and an output end in a circuit are obtained, the calculation accuracy of the first signal comparison data is improved, and powerful guarantee is provided for accurate transmission of the signals through difference between two accurate pulse information calculation positions.
Further, the embodiment of the present application further includes:
step 1110: obtaining second signal comparison data according to the first pulse information and the second pulse information;
step 1120: obtaining third signal comparison data according to the second pulse information and the third pulse information, and obtaining fourth signal comparison data of the third pulse information and fourth pulse information by analogy until obtaining Nth signal comparison data of the Nth pulse information and the Nth pulse information;
step 1130: judging whether a second preset threshold value is met or not according to all the signal comparison data;
step 1140: obtaining adjacent pulse information corresponding to the signal contrast data which is not satisfied;
step 1150: obtaining interference signals according to the adjacent pulse information;
step 1160: and obtaining a first shielding instruction according to the interference signal, wherein the first shielding instruction is used for shielding the interference signal.
Specifically, in order to further ensure that a circuit signal is not affected and tampered in a transmission process, in the embodiment of the present application, a process of transmitting a signal at each stage of a digital circuit is monitored, pulse information at an input end is compared with a pulse signal at a next adjacent circuit point to obtain similarity data of two signal information, that is, signal comparison data, and whether the signal comparison data meets a threshold set by a system is determined, if the signal comparison data is within the threshold, it indicates that contents of signal transmission are consistent, and the signal transmission is not changed or affected, and if the signal comparison data exceeds the threshold range, it indicates that a transmitted pulse signal is changed, accuracy of signal transmission is affected, at this time, the signal data is specifically analyzed to determine that a part of the signal has a problem, such as high frequency, low frequency, or other signal interference is added, and the changed signal is extracted, and the signal is determined according to first pulse information and a signal difference value obtained, and (3) shielding and correcting the signals which do not meet the requirements so as to meet the accuracy requirement in the signal transmission process, continuing to pass, or continuing to transmit after revising, and so on, wherein each node circuit signal in the circuit is correspondingly monitored, the data of two adjacent points are the same and are consistent with the signals in front, or within the error requirement range, the common error range is set to be infinite so as to ensure the accuracy of the data in the transmission process. The accuracy of each point signal is ensured through continuous processing in the circuit signal transmission process, so that the reliability of circuit signal transmission is realized, and the error rate of digital circuit signals is effectively reduced.
Further, in order to improve reliability in the interference signal confirmation process and ensure accuracy of the interference signal, step 1150 in this embodiment of the present application includes:
step 1151: taking the adjacent pulse information as third input data;
step 1152: inputting the third input data into a second training model, wherein the second training model is obtained by training a plurality of sets of training data, and each set of training data in the plurality of sets includes: the third input data and identification information for identifying interference signal data;
step 1153: obtaining output information of the second training model, wherein the output information includes an interference signal of the third input data.
Specifically, in order to improve the accuracy of the analysis result of the interference information, the embodiment of the present application adopts a neural network model, uses the adjacent pulse information in the digital circuit as third input data, and performs statistical calculation by using the data to match the interference signal in the pulse information of two adjacent points in the circuit. The first training model is a training model which is constructed by taking a plurality of groups of pulse information and identification information for identifying interference signals as training data and performing model training, and the accuracy of the neural network model is ensured by training and correcting a large amount of data. Thus, the interference signal output result matched with the identification can be obtained by inputting the input data into the training model.
Further, the Neural network model, i.e., Neural network model in machine learning, Neural Network (NN), is a complex Neural network system formed by a large number of simple processing units (called neurons) widely connected to each other, reflects many basic features of human brain functions, and is a highly complex nonlinear dynamical learning system. Neural network models are described based on mathematical models of neurons. Artificial Neural Networks (Artificial Neural Networks) are a description of the first-order properties of the human brain system. Briefly, it is a mathematical model. In the embodiment of the application, the neural network model is trained through pulse information of a large number of adjacent points and identification information for identifying interference signals.
Still further, the training process is essentially a supervised learning process. Each set of training data of the plurality of sets of training data comprises: third input data and identification information of the interfering signal. By inputting the third input data, the neural network model outputs identification information for identifying an interference signal, the output interference signal is compared with the identification information for identifying the interference signal, if the output interference signal is consistent with the identification information for identifying the interference signal, the supervised learning of the group of data is finished, and the supervised learning of the next group of data is carried out; if the interference signal is inconsistent with the identification information for identifying the interference signal, the neural network learning model adjusts and corrects the neural network learning model, when the interference signal output by the neural network learning model is consistent with the identification information for identifying the interference signal, the supervised learning of the next group of data is carried out, and the supervised learning process is finished until the neural network model reaches the expected accuracy. The neural network model is continuously corrected and optimized through training data, the accuracy of the neural network model for processing the information is improved through a supervised learning process, so that accurate interference signals matched with pulse signals of two adjacent points in a circuit are obtained, the accuracy of an analysis processing result of the interference signals is improved, strong guarantee is provided for accurate transmission of the signals through difference between the two pulse information accurate calculation positions, effective transmission of the signals in the whole circuit is realized through effective transmission of the signals of each section in the circuit, the accuracy of signal transmission in the circuit is improved, and the technical effect of the transmission error rate is reduced. The technical problems that in the prior art, a filter is used for filtering, but interference factors are diversified, the filtering effect is limited, the reliability of signal transmission cannot be guaranteed, and errors exist are further solved.
Further, after obtaining the adjacent pulse information corresponding to the unsatisfactory signal contrast data in step 1140 of the embodiment of the present application, the method includes:
step 1170: obtaining the position of the first pulse signal according to the pulse information;
step 1180: obtaining a first position interference factor according to the position of the first pulse signal;
step 1190: obtaining first equipment according to the first position interference factor;
step 1200: and sending a first reminding instruction according to the first equipment, wherein the first reminding instruction is used for reminding the first position of signal interference and suggesting to use the first equipment.
Specifically, the embodiment of the application has a function of checking the position of the interference equipment existing in circuit laying, performs data analysis by using signals in the circuit, cannot meet the comparison data requirement of the signals when adjacent circuit nodes have signal transmission errors, determines the specific position of the node according to pulse information with the errors, obtains the interference equipment existing in the position according to the position, correspondingly recommends equipment capable of intercepting or filtering signals of the wave band according to the wave band and the type of the interference signals sent by the equipment, sends reminding information, processes the signals which the circuit of the section should process, and meanwhile, purposefully adds related equipment for filtering and intercepting to ensure the accuracy of the circuit transmission of the node, so as to achieve the purpose of performing position analysis on the signals, automatically analyzing and processing signal interference items in the circuit, and provide guarantee for the accurate transmission of the circuit, and also helps the worker to lay the circuit, and reduces the error rate of signal transmission in the circuit at the position.
Further, the embodiment of the present application further includes:
step 1310: obtaining an interference factor evaluation coefficient according to the first position interference factor;
step 1320: judging whether the interference factor evaluation coefficient meets a third preset threshold value or not;
step 1330: and when the interference factor is not satisfied, obtaining a first adjusting instruction, wherein the first adjusting instruction is used for reminding the adjustment of the interference factor.
Specifically, the method has the function of analyzing and evaluating interference factors existing in a circuit laying line, and adopts removal or avoidance measures for the interference factors which can be changed, moved or bypassed so as to avoid the interference of the interference factors on circuit signals and influence the accuracy of signal transmission of the circuit signals. The method has a powerful guiding effect on the processing of circuit signals, avoids the cost increase caused by blind addition of equipment, has poor effect and can not effectively improve the reliability of circuit transmission. The technical problems that in the prior art, only a filter device is added, the effect is limited, the reliability of signal transmission still cannot be guaranteed, errors exist, and the cost is increased are solved.
Example two
Based on the same inventive concept as the information processing method for reducing the error rate of the digital circuit in the foregoing embodiment, the present invention also provides an information processing apparatus for reducing the error rate of the digital circuit, as shown in fig. 2, the apparatus comprising:
a first obtaining unit 11, where the first obtaining unit 11 is configured to obtain a pulse signal set, where the pulse signal set includes first pulse information, second pulse information, and up to nth pulse information, and the first pulse information is obtained information at an input end of a digital circuit;
a second obtaining unit 12, where the second obtaining unit 12 is configured to obtain first reserved verification code information according to the first pulse information;
a third obtaining unit 13, where the third obtaining unit 13 is configured to obtain second reserved verification code information according to the second pulse information;
a fourth obtaining unit 14, where the fourth obtaining unit 14 is configured to obtain nth reserved verification code information according to the nth pulse information, where N is a natural number greater than 1;
a first execution unit 15, where the first execution unit 15 is configured to copy and store all reserved verification code information on M devices, where M is a natural number greater than 1;
a fifth obtaining unit 16, where the fifth obtaining unit 16 is configured to obtain first access verification code information according to the first pulse information;
a first verification unit 17, where the first verification unit 17 is configured to verify the first access verification code information through the first reserved verification code information to obtain a verification result;
a first determining unit 18, wherein the first determining unit 18 is configured to determine whether to obtain a first access right according to the verification result;
a second execution unit 19, where the second execution unit 19 is configured to access the first pulse information to the output terminal of the digital circuit according to the first access right.
Further, the apparatus further comprises:
a sixth obtaining unit, configured to obtain first output information of the output end;
a seventh obtaining unit, configured to obtain first signal comparison data according to the first pulse information and the first output information;
the first judging unit is used for judging whether the first signal comparison data meet a first preset threshold value or not;
an eighth obtaining unit, configured to, when the difference is not satisfied, obtain a first signal difference value according to the first signal comparison data;
a first correcting unit, configured to correct the first output information according to the first signal difference value.
Further, the apparatus further comprises:
a third execution unit configured to use the first pulse information as first input data;
a fourth execution unit for taking the first output information as second input data;
a first input unit, configured to input the first input data and the second input data into a first training model, where the first training model is obtained by training multiple sets of training data, and each set of training data in the multiple sets includes: the first input data, the second input data and identification information for identifying first signal comparison data;
a ninth obtaining unit, configured to obtain output information of the first training model, where the output information includes the first signal comparison data information.
Further, the apparatus further comprises:
a tenth obtaining unit, configured to obtain second signal comparison data according to the first pulse information and the second pulse information;
an eleventh obtaining unit, configured to obtain the third signal comparison data according to the second pulse information and the third pulse information, and so on, to obtain fourth signal comparison data of the third pulse information and fourth pulse information until obtaining nth signal comparison data of the N-1 th pulse information and the nth pulse information;
the second judging unit is used for judging whether the second preset threshold value is met or not according to all the signal comparison data;
a twelfth obtaining unit, configured to obtain adjacent pulse information corresponding to the signal contrast data that is not satisfied;
a thirteenth obtaining unit, configured to obtain an interference signal according to the adjacent pulse information;
a fourteenth obtaining unit, configured to obtain a first masking instruction according to the interference signal, where the first masking instruction is used to mask the interference signal.
Further, the apparatus further comprises:
a fifth execution unit configured to take the adjacent pulse information as third input data;
a second input unit, configured to input the third input data into a second training model, where the second training model is obtained by training multiple sets of training data, and each set of training data in the multiple sets includes: the third input data and identification information for identifying interference signal data;
a fifteenth obtaining unit, configured to obtain output information of the second training model, where the output information includes an interference signal of the third input data.
Further, the apparatus further comprises:
a sixteenth obtaining unit, configured to obtain the first pulse signal position according to the pulse information;
a seventeenth obtaining unit, configured to obtain a first position interference factor according to the first pulse signal position;
an eighteenth obtaining unit, configured to obtain the first device according to the first location interference factor;
the first sending unit is used for sending a first reminding instruction according to the first equipment, wherein the first reminding instruction is used for reminding the first position of signal interference and suggesting to use the first equipment.
Further, the apparatus further comprises:
a nineteenth obtaining unit, configured to obtain an interference factor evaluation coefficient according to the first location interference factor;
a third judging unit configured to judge whether the interference factor evaluation coefficient satisfies a third predetermined threshold;
a twentieth obtaining unit, configured to obtain a first adjustment instruction when the interference factor is not satisfied, where the first adjustment instruction is used to prompt adjustment of the interference factor.
Various modifications and embodiments of the aforementioned information processing method for reducing the error rate of the digital circuit in the first embodiment of fig. 1 are also applicable to the information processing apparatus for reducing the error rate of the digital circuit in the present embodiment, and the implementation method of the information processing apparatus for reducing the error rate of the digital circuit in the present embodiment is clear to those skilled in the art from the foregoing detailed description of the information processing method for reducing the error rate of the digital circuit, so for the sake of brevity of the description, detailed descriptions thereof are omitted here.
Exemplary electronic device
The electronic device of the embodiment of the present application is described below with reference to fig. 3.
Fig. 3 illustrates a schematic structural diagram of an electronic device according to an embodiment of the present application.
Based on the inventive concept of an information processing method for reducing an error rate of a digital circuit as in the previous embodiments, the present invention further provides an information processing apparatus for reducing an error rate of a digital circuit, having a computer program stored thereon, which when executed by a processor, implements the steps of any one of the aforementioned information processing methods for reducing an error rate of a digital circuit.
Where in fig. 3 a bus architecture (represented by bus 300), bus 300 may include any number of interconnected buses and bridges, bus 300 linking together various circuits including one or more processors, represented by processor 302, and memory, represented by memory 304. The bus 300 may also link together various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further herein. A bus interface 306 provides an interface between the bus 300 and the receiver 301 and transmitter 303. The receiver 301 and the transmitter 303 may be the same element, i.e., a transceiver, providing a means for communicating with various other systems over a transmission medium.
The processor 302 is responsible for managing the bus 300 and general processing, and the memory 304 may be used for storing data used by the processor 302 in performing operations.
One or more technical solutions in the embodiments of the present application have at least one or more of the following technical effects:
the embodiment of the application provides an information processing method and device for reducing the error rate of a digital circuit, wherein the method is applied to the digital circuit, the digital circuit is provided with an input end and an output end, and the pulse signal set is obtained and comprises first pulse information, second pulse information and pulse information from the Nth pulse information, and the first pulse information is information obtained at the input end; acquiring first reserved verification code information according to the first pulse information; acquiring second reserved verification code information according to the second pulse information; acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1; respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1; acquiring first access verification code information according to the first pulse information; verifying the first access verification code information through the first reserved verification code information to obtain a verification result; determining whether a first access right is obtained or not according to the verification result; and accessing the first pulse information to the output end according to the first access authority. The method has the advantages that the block chain technology is utilized to encrypt the signals in the digital circuit, the stability of the signal transmission process is ensured, the influence on the signal transmission content due to external interference is avoided, the signal transmission is ensured not to be distorted, and the technical effect of effectively reducing the circuit signal transmission error rate caused by interference or tampering in the digital circuit is achieved. Therefore, the technical problems that in the prior art, filtering processing is carried out by using a filter, but interference factors have diversity, the filtering effect is limited, the reliability of signal transmission still cannot be ensured, and errors exist are solved.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a system for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. An information processing method for reducing error rate of a digital circuit, the method being applied to a digital circuit having an input terminal and an output terminal, wherein the method comprises:
obtaining a pulse signal set, wherein the pulse signal set comprises first pulse information, second pulse information and pulse information from N to N, and the first pulse information is information obtained at the input end;
acquiring first reserved verification code information according to the first pulse information;
acquiring second reserved verification code information according to the second pulse information;
acquiring Nth reserved verification code information according to the Nth pulse information, wherein N is a natural number greater than 1;
respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1;
acquiring first access verification code information according to the first pulse information;
verifying the first access verification code information through the first reserved verification code information to obtain a verification result;
determining whether a first access right is obtained or not according to the verification result;
according to the first access authority, the first pulse information is accessed to the output end;
in order to ensure the safety of training data during training, first pulse information in experimental data for training is generated into first reserved verification code information, wherein the first reserved verification code information corresponds to the first pulse information one by one;
generating second reserved verification code information according to the second pulse information and the first reserved verification code information;
generating Nth reserved verification code information according to the Nth pulse information and the N-1 th reserved verification code information;
taking the first pulse information and the first reserved verification code information as a first storage unit;
taking the second pulse information and the second reserved verification code information as a second storage unit;
taking the Nth pulse information and the Nth reserved verification code information as an Nth storage unit;
respectively copying and storing the first storage unit, the second storage unit and the Nth storage unit on M devices;
when the training data needs to be called, after each latter device receives the data stored by the former device, the data is verified through a common identification mechanism and then stored, each storage unit is connected in series through a Hash technology, so that the training data is not easy to lose and damage, the data information is encrypted in a mode of obtaining the whole training data by carrying out block chain calculation on each pulse information, and then the training data is obtained to obtain the first reserved verification code information.
2. The method of claim 1, wherein the method comprises:
obtaining first output information of the output end;
obtaining first signal comparison data according to the first pulse information and the first output information;
judging whether the first signal comparison data meet a first preset threshold value or not;
when the first signal difference does not meet the first signal comparison requirement, obtaining a first signal difference value according to the first signal comparison data;
and correcting the first output information according to the first signal difference value.
3. The method of claim 2, wherein the obtaining first signal comparison data according to the first pulse information and the first output information comprises:
taking the first pulse information as first input data;
taking the first output information as second input data;
inputting the first input data and the second input data into a first training model, wherein the first training model is obtained by training a plurality of sets of training data, and each set of training data in the plurality of sets of training data includes: the first input data, the second input data and identification information for identifying first signal comparison data;
and obtaining output information of the first training model, wherein the output information comprises the first signal comparison data.
4. The method of claim 1, wherein the method comprises:
obtaining second signal comparison data according to the first pulse information and the second pulse information;
obtaining third signal comparison data according to the second pulse information and the third pulse information, and obtaining fourth signal comparison data of the third pulse information and the fourth pulse information by analogy until obtaining Nth signal comparison data of the Nth pulse information and the Nth pulse information;
judging whether a second preset threshold value is met or not according to all the signal comparison data;
obtaining adjacent pulse information corresponding to the signal contrast data which is not satisfied;
obtaining interference signals according to the adjacent pulse information;
and obtaining a first shielding instruction according to the interference signal, wherein the first shielding instruction is used for shielding the interference signal.
5. The method of claim 4, wherein the obtaining an interference signal according to the adjacent pulse information comprises:
taking the adjacent pulse information as third input data;
inputting the third input data into a second training model, wherein the second training model is obtained by training a plurality of sets of training data, and each set of training data in the plurality of sets includes: the third input data and identification information for identifying interference signal data;
obtaining output information of the second training model, wherein the output information includes an interference signal of the third input data.
6. The method of claim 4, wherein obtaining adjacent pulse information corresponding to the signal contrast data that is not satisfied comprises:
obtaining the position of the first pulse signal according to the adjacent pulse information;
obtaining a first position interference factor according to the position of the first pulse signal;
obtaining first equipment according to the first position interference factor;
and sending a first reminding instruction according to the first equipment, wherein the first reminding instruction is used for reminding the first position of signal interference and suggesting to use the first equipment.
7. The method of claim 6, wherein the method comprises:
obtaining an interference factor evaluation coefficient according to the first position interference factor;
judging whether the interference factor evaluation coefficient meets a third preset threshold value or not;
and when the interference factor is not satisfied, obtaining a first adjusting instruction, wherein the first adjusting instruction is used for reminding the adjustment of the interference factor.
8. An information processing apparatus that reduces an error rate of a digital circuit, wherein the apparatus comprises:
a first obtaining unit, configured to obtain a pulse signal set, where the pulse signal set includes first pulse information, second pulse information, and up to nth pulse information, and the first pulse information is obtained information at an input terminal of a digital circuit;
a second obtaining unit, configured to obtain first reserved verification code information according to the first pulse information;
a third obtaining unit, configured to obtain second reserved verification code information according to the second pulse information;
a fourth obtaining unit, configured to obtain nth reserved verification code information according to the nth pulse information, where N is a natural number greater than 1;
the first execution unit is used for respectively copying and storing all reserved verification code information on M devices, wherein M is a natural number greater than 1;
a fifth obtaining unit, configured to obtain first access verification code information according to the first pulse information;
the first verification unit is used for verifying the first access verification code information through the first reserved verification code information to obtain a verification result;
a first determining unit, configured to determine whether to obtain a first access right according to the verification result;
the second execution unit is used for accessing the first pulse information to the output end of the digital circuit according to the first access authority;
in order to ensure the safety of training data during training, first pulse information in experimental data for training is generated into first reserved verification code information, wherein the first reserved verification code information corresponds to the first pulse information one by one;
generating second reserved verification code information according to the second pulse information and the first reserved verification code information;
generating Nth reserved verification code information according to the Nth pulse information and the N-1 th reserved verification code information;
taking the first pulse information and the first reserved verification code information as a first storage unit;
taking the second pulse information and the second reserved verification code information as a second storage unit;
taking the Nth pulse information and the Nth reserved verification code information as an Nth storage unit;
respectively copying and storing the first storage unit, the second storage unit and the Nth storage unit on M devices;
when the training data needs to be called, after each latter device receives the data stored by the former device, the data is verified through a common identification mechanism and then stored, each storage unit is connected in series through a Hash technology, so that the training data is not easy to lose and damage, the data information is encrypted in a mode of obtaining the whole training data by carrying out block chain calculation on each pulse information, and then the training data is obtained to obtain the first reserved verification code information.
9. An information processing apparatus for reducing error rates in digital circuits, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the method of any one of claims 1 to 7 when executing the program.
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