CN112436988A - Device for converting standard Ethernet to NCUC field bus protocol and implementation method - Google Patents

Device for converting standard Ethernet to NCUC field bus protocol and implementation method Download PDF

Info

Publication number
CN112436988A
CN112436988A CN202011149669.9A CN202011149669A CN112436988A CN 112436988 A CN112436988 A CN 112436988A CN 202011149669 A CN202011149669 A CN 202011149669A CN 112436988 A CN112436988 A CN 112436988A
Authority
CN
China
Prior art keywords
module
ncuc
standard ethernet
frame
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202011149669.9A
Other languages
Chinese (zh)
Other versions
CN112436988B (en
Inventor
朱志红
徐建春
何宇良
王素姗
易晓寒
周瑜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan Huazhong Numerical Control Co Ltd
Original Assignee
Wuhan Huazhong Numerical Control Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan Huazhong Numerical Control Co Ltd filed Critical Wuhan Huazhong Numerical Control Co Ltd
Priority to CN202011149669.9A priority Critical patent/CN112436988B/en
Publication of CN112436988A publication Critical patent/CN112436988A/en
Application granted granted Critical
Publication of CN112436988B publication Critical patent/CN112436988B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/08—Protocols for interworking; Protocol conversion

Abstract

A device for converting standard Ethernet to NCUC field bus protocol and a realization method thereof are provided, the device comprises: standard ethernet interface, protocol conversion module, NCUC output interface and NCUC input interface, the implementation mode includes: the standard Ethernet interface receives a standard Ethernet frame output by the computer network interface and sends the standard Ethernet frame to the protocol conversion module, the protocol conversion module processes the standard Ethernet frame and outputs an NCUC data frame, the standard Ethernet frame is sent to the NCUC slave station through the NCUC output interface, the NCUC input interface returns the NCUC data frame returned by the NCUC slave station to the protocol conversion module, the protocol conversion module processes the NCUC data frame and outputs the standard Ethernet frame, and the standard Ethernet interface sends the standard Ethernet frame to the computer network interface, so that data communication between the computer and the NCUC slave station is realized. The device is connected with a general computer network port through a network cable, so that the same function as that of the existing NCUC master station can be realized, the communication with the NCUC slave station is realized, and the device is applied to a numerical control system and can promote the modularization and the standardization of a core unit of the numerical control system.

Description

Device for converting standard Ethernet to NCUC field bus protocol and implementation method
Technical Field
The invention relates to the technical field of bus control, in particular to a device and a method for realizing a standard Ethernet-to-NCUC field bus protocol.
Background
The NCUC field bus protocol is a field bus communication protocol standard specially established by the field bus technical alliance of the machine tool numerical control system and the like for an industrial automation control process including motion control. The Ethernet data transmission with strong real-time property, high synchronism and high reliability is realized in a master-slave bus access control mode by adopting a ring loop of a network, and the orderly communication of all stations is ensured. The existing NCUC master station implementation mode is based on a hardware framework of a CPU + FPGA + PHY, the CPU and the FPGA communicate through a PCIe bus, and the conversion of the whole protocol is realized in the FPGA. The present implementation mode causes that the numerical control device needs to adopt a special industrial computer, and besides the unit structure of the general computer, the numerical control device also needs to integrate an NCUC bus protocol conversion module and an NCUC input/output interface unit. This makes the core unit of the numerical control device poor in replaceability, difficult to maintain, high in cost, and not beneficial to standardization and modularization.
Disclosure of Invention
In view of the technical defects and technical drawbacks in the prior art, embodiments of the present invention provide an apparatus and a method for implementing a standard ethernet to NCUC fieldbus protocol, which overcome or at least partially solve the above problems, and the specific solution is as follows:
as a first aspect of the present invention, a device for converting a standard ethernet to an NCUC fieldbus protocol is provided, where the device includes a standard ethernet interface, a protocol conversion module, an NCUC output interface, and an NCUC input interface, and the ethernet interface, the NCUC output interface, and the NCUC input interface are all connected to the protocol conversion module;
the standard Ethernet interface is connected with the computer network port through a network cable and is used for transmitting standard Ethernet frames output by the computer network port to the protocol conversion module or transmitting standard Ethernet frames output by the protocol conversion module to the computer network port;
the protocol conversion module is used for realizing conversion between a standard Ethernet frame and an NCUC data frame, converting the received standard Ethernet frame from the standard Ethernet interface into the NCUC data frame and outputting the NCUC data frame to the NCUC slave station through the NCUC output interface, or converting the received NCUC data frame from the NCUC input interface into the standard Ethernet frame and outputting the standard Ethernet frame to the standard Ethernet interface;
the NCUC output interface and the NCUC input interface are connected with each NCUC slave station by adopting a ring network loop, the NCUC output interface is used for transmitting an NCUC data frame output by the protocol conversion module to the NCUC slave station, and the NCUC data frame returned from the NCUC slave station is transmitted to the protocol conversion module through the NCUC input interface;
the computer network interface sends standard Ethernet frames with T1 as a period, the protocol conversion module starts timing when receiving the first valid standard Ethernet frame, converts the received standard Ethernet frames into NCUC data frames, and sends the NCUC data frames to the NCUC output interface with T2 as a period.
Further, the protocol conversion module is realized by an FPGA, and includes three RAM modules, namely a RAM1 module, a RAM2 module and a RAM3 module;
the RAM1 module is used to write the first valid standard ethernet frame in a cycle;
the RAM2 module is used for writing other effective standard Ethernet frames in a period, and data loss caused by refreshing the effective standard Ethernet frames in the RAM1 module before the effective standard Ethernet frames are sent out is prevented;
the RAM3 module is used to back up valid standard ethernet frames in the RAM1 module or the RAM2 module, and write NCUC data frames returned by the NCUC slave station into corresponding positions of the standard ethernet frames.
Further, the RAM1 module and the RAM2 module do not operate simultaneously, and the RAM1 module operates at a higher priority than the RAM2 module, and the RAM2 module operates only when the FPGA receives the next valid standard ethernet frame before the data frame in the RAM1 module is not sent out.
Further, the protocol conversion module further comprises a parameter extraction module;
the parameter extraction module is used for extracting corresponding parameter values of the standard Ethernet frames in the RAM1 module or the RAM2 module so as to judge whether the standard Ethernet frames in the RAM1 module or the RAM2 module are valid.
Furthermore, the protocol conversion module further includes a SYNC module, the SYNC module is configured to send a SYNC effective signal after the FPGA receives an effective standard ethernet frame time T (T < T2), and since a data moment periodically sent by the computer network port deviates from a period time T1, in order to prevent the stability of the slave station motor of the NCUC from being affected by an excessive accumulated deviation time, the SYNC module is further configured to calibrate and fine-tune each sending period of the protocol processing module.
Further, the protocol conversion module further includes an NCUC output module, and the NCUC output module is configured to add a preamble to the NCUC data frames read from the RAM1 module or the RAM2 module, and then sequentially send the NCUC data frames to the NCUC slave station.
Further, the protocol conversion module also includes two CRC modules, a CRC1 module and a CRC2 module:
the CRC1 module is used for calculating CRC check data of all returned NCUC data frames and writing the CRC check data into corresponding positions of standard Ethernet frames in the RAM3 module;
the CRC2 module is used to calculate the FCS check sequence of the entire standard ethernet frame and write to the corresponding location of the standard ethernet frame in the RAM3 module.
As a second aspect of the present invention, a method for implementing a standard ethernet to NCUC fieldbus protocol is provided, where the method includes:
step 1, the computer port sends standard Ethernet frames by taking T1 as a period, when the FPGA receives a mark value indicating that the sending of the preamble is finished, the FPGA starts sending the standard Ethernet frames, and the step 2 is carried out;
step 2, the FPGA preferentially starts a writing function of the RAM1 module, the RAM1 module writes a first standard Ethernet frame in a period, the RAM3 module simultaneously backs up the standard Ethernet frame in the RAM1 module, the parameter extraction module extracts corresponding parameter values to judge whether the standard Ethernet frame in the RAM1 module is a communication effective frame, if the standard Ethernet frame is effective, the step 3 is carried out, otherwise, the frame is discarded;
step 3, the SYNC module sends out a SYNC effective signal after the FPGA receives an effective standard Ethernet frame time T (T < T2), and the sending period is T2;
step 4, after receiving the sync valid signal, the RAM1 module opens the reading function, the NUCU output module sequentially reads the corresponding NCUC data frames in the RAM1 module, adds a preamble in front of each NCUC data frame, and sequentially sends the NCUC data frames to the NCUC slave station through the NCUC output interface;
step 5, the NCUC slave station updates data after receiving the NCUC data frame, and then returns the NCUC data frame to the FPGA through the NCUC input interface;
step 6, when receiving that the RXDV corresponding to the NCUC input interface is valid, the FPGA detects the value of the leader to judge whether the NCUC data frame is a valid return frame, if the NCUC data frame is a valid return frame, the RAM3 module opens the writing function, and the returned NCUC data frame is written into the corresponding position of the standard Ethernet frame in the RAM3 module; meanwhile, the CRC1 module calculates CRC check data, then fills the corresponding position of the standard Ethernet frame until all NCUC data frames of the current period are returned and replaced and written into the RAM3 module, and the process goes to step 7;
and 7, opening the reading function of the RAM3 module, calculating the FCS check sequence of the whole standard Ethernet frame by the CRC2 module, and then sending the corresponding standard Ethernet frame to the computer through the standard Ethernet interface. This enables the general purpose computer to communicate data with the NCUC slave station.
Further, because the data sent periodically by the computer port deviates from the period time T1, it may happen that data in a previous period of the RAM1 module is not sent yet, the FPGA receives a standard ethernet frame in a next period sent from the computer port, in step 2, in order to prevent data loss due to data refresh in the RAM1 module, a write function of the RAM2 module is turned on, the standard ethernet frame is written into the RAM2 module, the corresponding parameter extraction module extracts a corresponding parameter value of the standard ethernet frame in the RAM2 module to determine whether the standard ethernet frame is valid, if valid, the standard ethernet frame is retained, and meanwhile, the RAM3 module backs up the standard ethernet frame in the RAM2 module and proceeds to step 3, otherwise, the corresponding standard ethernet frame is discarded.
Further, since the data periodically sent by the computer interface may deviate from the period time T1, in step 3, in order to prevent the stability of the slave station motor of the NCUC from being affected by an excessive accumulated deviation time, the SYNC module may calibrate and fine-tune each sending period of the protocol conversion module, specifically including:
if the total time adjustment quantity obtained by subtracting the total time adjustment quantity of the previous frame from the total time integral offset of the current frame is greater than 0, adjusting the communication period to be T2+ Deltat;
if the total time integral offset of the received current frame minus the total time adjustment amount of the previous frame is equal to 0, the communication period is adjusted to be T2;
if the total time offset of the received current frame minus the total time adjustment amount of the previous frame is less than 0, the communication period is adjusted to T2- Δ T.
The invention has the following beneficial effects:
the invention provides a scheme for converting standard Ethernet to NCUC field bus protocol, which is characterized in that an NCUC main station function module is independent from a special computer of a numerical control device, so that the special computer of the numerical control device can be replaced by a general computer, thereby being beneficial to the standardization and modularization of the numerical control device, enhancing the replaceability and maintainability of a core unit of the numerical control device and greatly reducing the cost.
Drawings
Fig. 1 is an internal block diagram of a standard ethernet to NCUC fieldbus protocol device according to an embodiment of the present invention;
fig. 2 is a connection diagram of internal lines of a standard ethernet to NCUC fieldbus protocol device according to an embodiment of the present invention;
fig. 3 is a flowchart of data transmission processing in an implementation manner of a standard ethernet to NCUC fieldbus protocol according to an embodiment of the present invention;
fig. 4 is a format diagram of a standard ethernet frame according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, a standard ethernet to NCUC fieldbus protocol device provided as a first embodiment of the present invention includes a standard ethernet interface, a protocol conversion module, an NCUC output interface, and an NCUC input interface.
And the standard Ethernet interface is connected with the computer network port through a network cable and is used for sending the standard Ethernet frames output by the computer network port and the protocol conversion module, wherein the computer network port sends the standard Ethernet frames in a period of 1 ms.
The protocol conversion module is used for realizing the conversion between the standard Ethernet frame and the NCUC data frame, starting timing when the first effective standard Ethernet frame is received, and sending the NCUC data frame by taking 1ms as a period.
The NCUC output interface and the NCUC input interface are connected with each NCUC slave station by adopting a loop network loop, the NCUC output interface sends the NCUC data frame output by the protocol conversion module to the NCUC slave station, and the NCUC data frame returned by the NCUC slave station is sent to the protocol conversion module through the NCUC input interface.
As shown in fig. 2, which is a connection diagram of an internal circuit of a standard ethernet to NCUC fieldbus protocol device according to an embodiment of the present invention, wherein a power interface inputs a required voltage, and the internal outputs a voltage value required by each chip through a DC-DC power chip; the standard Ethernet interface is connected with a computer network port through a network cable and inputs or outputs standard Ethernet frames; the NCUC output interface and the NCUC input interface are connected with each NCUC slave station by adopting a ring network loop, so that communication between the NCUC master station and the NCUC slave station is realized. The PHY is connected with the FPGA by adopting RMII, and clock sources of the PHY are all provided by the FPGA. And a clock source of the FPGA is provided by an external crystal oscillator and is used for realizing conversion between a standard Ethernet frame and an NCUC data frame and adjusting and calibrating a communication period.
As shown in fig. 3, the protocol conversion module is implemented by an FPGA, and includes an RAM module, a parameter extraction module, a SYNC module, an NCUC output module, and a CRC module.
Wherein the RAM modules include a RAM1 module, a RAM2 module, and a RAM3 module.
The RAM1 module is used to write the first valid standard ethernet frame in a cycle.
The RAM2 module is used to write other valid standard ethernet frames in a cycle, preventing the valid standard ethernet frames in the RAM1 module from being refreshed before being sent out, resulting in data loss.
The RAM3 module is used to back up valid standard ethernet frames in the RAM1 module or the RAM2 module, and write NCUC data frames returned by the NCUC slave station into corresponding positions of the standard ethernet frames.
The RAM1 module and the RAM2 module do not work simultaneously, the RAM1 module works at a higher priority than the RAM2 module, and the RAM2 module works only when the data frame in the RAM1 module is not sent out and the FPGA receives the next valid standard ethernet frame.
The parameter extraction module is used for extracting corresponding parameter values of the standard Ethernet frames in the RAM1 module or the RAM2 module so as to judge whether the standard Ethernet frames in the RAM1 module or the RAM2 module are valid.
The SYNC module is used for sending a signal that SYNC is 1 after the FPGA receives an effective standard Ethernet frame 200us, and because the data moment periodically sent by a computer network port can deviate for 1ms, in order to prevent the stability of the NCUC slave station motor from being influenced by overlarge accumulated offset time, the SYNC module is also used for calibrating and finely adjusting each sending period.
The NCUC output module is configured to add a 64-bit preamble to the NCUC data frame read from the RAM1 module or the RAM2 module, and then sequentially send the NCUC data frame to the NCUC slave station.
The CRC module includes a CRC1 module and a CRC2 module:
the CRC1 module is used for calculating the 32-bit CRC of all returned NCUC data frames and writing the CRC into the corresponding position of the standard Ethernet frame in the RAM3 module.
The CRC2 module is used to calculate the FCS check sequence of the entire standard ethernet frame and write to the corresponding location of the standard ethernet frame in the RAM3 module.
As a second embodiment of the present invention, a method for implementing a standard ethernet to NCUC fieldbus protocol is provided, where the implementation flow specifically is as follows:
step 1, the computer interface sends standard ethernet frames in a period of 1ms, and the FPGA starts to transmit the standard ethernet frames when receiving the flag value indicating that the preamble transmission is finished, where the standard ethernet frames are specifically in a format as shown in fig. 4 and include a standard UDP header, an NCUC data frame data segment, and the like.
And 2, the FPGA preferentially starts a writing function of the RAM1 module, the RAM1 module writes the first standard Ethernet frame in the period, the RAM3 module simultaneously backs up the standard Ethernet frame in the RAM1 module, and the parameter extraction module extracts corresponding parameter values to judge whether the standard Ethernet frame in the RAM1 module is a communication effective frame.
Because the data periodically sent by the computer port deviates from 1ms, it may happen that data in a previous cycle of the RAM1 module is not sent out yet, and the FPGA receives a standard ethernet frame in a next cycle sent by the computer port. In order to prevent data loss caused by data refreshing in the RAM1 module, the writing function of the RAM2 module is started at this time, the standard ethernet frame is written into the RAM2 module, the corresponding parameter extraction module extracts the corresponding parameter value of the standard ethernet frame in the RAM2 module to determine whether the standard ethernet frame is a valid communication frame, if the standard ethernet frame is valid, the standard ethernet frame is retained, meanwhile, the RAM3 module backs up the standard ethernet frame in the RAM2 module, and the step 3 is performed, and if the standard ethernet frame is not valid, the corresponding standard ethernet frame is discarded.
Step 3, after receiving the valid standard ethernet frame 200us, the SYNC module sends a signal with SYNC equal to 1, and the sending period is 1 ms; because the data moment that computer network mouth periodic transmission can deviate 1ms, prevent that the stability of accumulative total offset time oversize influence NCUC slave station motor, the SYNC module can go to calibrate and finely tune each transmission cycle, specifically includes:
if the total time integral offset of the received current frame minus the total time adjustment amount of the previous frame is greater than 0, the communication period is adjusted to 1ms +1 us;
if the total time integral offset of the received current frame minus the total time adjustment quantity of the previous frame is equal to 0, adjusting the communication period to 1 ms;
and if the total time integral offset of the received current frame minus the total time adjustment amount of the previous frame is less than 0, adjusting the communication period to be 1ms-1 us.
And step 4, after receiving the signal with sync being 1, the RAM1 module opens a reading function, the NUCU output module sequentially reads the corresponding NCUC data frames in the RAM1 module, adds 64-bit preambles in front of each NCUC data frame, and sequentially sends the preambles to the NCUC slave stations through the NCUC output interface.
And step 5, the NCUC slave station updates data after receiving the NCUC data frame, and then returns the NCUC data frame to the FPGA through the NCUC input interface.
Step 6, when receiving RXDV corresponding to the NCUC input interface, the FPGA detects a value of the 64-bit preamble to determine whether the NCUC data frame is an effective return frame, if so, the RAM3 module opens the write function, and the returned NCUC data frame is written into a corresponding position of a standard ethernet frame in the RAM3 module; meanwhile, the CRC1 module calculates 32-bit CRC check data, and then fills in the corresponding position of the standard ethernet frame until all the NCUC data frames in the current period are returned and replaced and written into the RAM3 module, and then the process proceeds to step 7.
And step 7, opening the reading function of the RAM3 module, calculating the FCS check sequence of the whole standard Ethernet frame by the CRC2 module, and then sending the corresponding standard Ethernet frame to the computer through the standard Ethernet interface, so that the data communication between the general computer and the NCUC slave station is realized.
It should be noted that the connections described in the present invention all represent electrical connections.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (10)

1. A device for converting standard Ethernet to NCUC field bus protocol is characterized by comprising a standard Ethernet interface, a protocol conversion module, an NCUC output interface and an NCUC input interface, wherein the Ethernet interface, the NCUC output interface and the NCUC input interface are all connected with the protocol conversion module;
the standard Ethernet interface is connected with the computer network port through a network cable and is used for transmitting standard Ethernet frames output by the computer network port to the protocol conversion module or transmitting standard Ethernet frames output by the protocol conversion module to the computer network port;
the protocol conversion module is used for realizing conversion between a standard Ethernet frame and an NCUC data frame, converting the received standard Ethernet frame from the standard Ethernet interface into the NCUC data frame and outputting the NCUC data frame to the NCUC slave station through the NCUC output interface, or converting the received NCUC data frame from the NCUC input interface into the standard Ethernet frame and outputting the standard Ethernet frame to the standard Ethernet interface;
the NCUC output interface and the NCUC input interface are connected with each NCUC slave station by adopting a ring network loop, and the NCUC output interface is used for transmitting the NCUC data frame output by the protocol conversion module to the NCUC slave station; the NCUC data frame returned from the NCUC slave station is transmitted to the protocol conversion module through the NCUC input interface;
the computer network interface sends standard Ethernet frames with T1 as a period, the protocol conversion module starts timing when receiving the first valid standard Ethernet frame, converts the received standard Ethernet frames into NCUC data frames, and sends the NCUC data frames to the NCUC output interface with T2 as a period.
2. The apparatus of claim 1, wherein the protocol conversion module is implemented by FPGA and comprises three RAM modules, i.e. RAM1 module, RAM2 module and RAM3 module;
the RAM1 module is used to write the first valid standard ethernet frame in a cycle;
the RAM2 module is used for writing other valid standard Ethernet frames in a period, and data loss caused by refreshing the valid standard Ethernet frames in the RAM1 module before the valid standard Ethernet frames are sent out is prevented;
the RAM3 module is used to back up valid standard ethernet frames in the RAM1 module or the RAM2 module, and write NCUC data frames returned by the NCUC slave station into corresponding positions of the standard ethernet frames.
3. The apparatus of claim 2, wherein the RAM1 module and the RAM2 module do not operate simultaneously, and the RAM1 module operates at a higher priority than the RAM2 module, and the RAM2 module operates only when the FPGA receives a next valid standard ethernet frame before the data frame in the RAM1 module is not sent.
4. The apparatus of claim 2, wherein the protocol conversion module further comprises a parameter extraction module;
the parameter extraction module is used for extracting corresponding parameter values of the standard Ethernet frames in the RAM1 module or the RAM2 module so as to judge whether the standard Ethernet frames in the RAM1 module or the RAM2 module are valid.
5. The device of claim 2, wherein the protocol conversion module further comprises a SYNC module, the SYNC module triggers the FPGA to output a data frame by periodically sending a SYNC-enabled signal, and since the data periodically sent by the computer interface may deviate from the period time T1, in order to prevent the stability of the slave motor of the NCUC from being affected by the accumulated deviation time, the SYNC module is further configured to calibrate and fine-tune each sending period of the protocol conversion module.
6. The apparatus of claim 2, wherein the protocol conversion module further comprises an NCUC output module, and the NCUC output module is configured to add a preamble to the NCUC data frames read from the RAM1 module or the RAM2 module and then sequentially send the NCUC data frames to the NCUC slave station.
7. The apparatus of claim 2, wherein the protocol conversion module further comprises two CRC modules, namely a CRC1 module and a CRC2 module:
the CRC1 module is used for calculating CRC check data of all returned NCUC data frames and writing the CRC check data into corresponding positions of standard Ethernet frames in the RAM3 module;
the CRC2 module is used to calculate the FCS check sequence of the entire standard ethernet frame and write to the corresponding location of the standard ethernet frame in the RAM3 module.
8. A method for implementing a standard Ethernet to NCUC fieldbus protocol, the method comprising:
step 1, the computer port sends standard Ethernet frames by taking T1 as a period, when the FPGA receives a mark value indicating that the sending of the preamble is finished, the FPGA starts sending the standard Ethernet frames, and the step 2 is carried out;
step 2, the FPGA preferentially starts a writing function of the RAM1 module, the RAM1 module writes a first standard Ethernet frame in a period, the RAM3 module simultaneously backs up the standard Ethernet frame in the RAM1 module, the parameter extraction module extracts corresponding parameter values to judge whether the standard Ethernet frame in the RAM1 module is a communication effective frame, and if the standard Ethernet frame is effective, the step 3 is carried out;
step 3, the SYNC module sends out a SYNC effective signal after the FPGA receives an effective standard Ethernet frame time T (T < T2), and the sending period is T2;
step 4, after receiving the sync valid signal, the RAM1 module opens the reading function, the NUCU output module sequentially reads the corresponding NCUC data frames in the RAM1 module, adds a preamble in front of each NCUC data frame, and sequentially sends the NCUC data frames to the NCUC slave station through the NCUC output interface;
step 5, the NCUC slave station updates data after receiving the NCUC data frame, and then returns the NCUC data frame to the FPGA through the NCUC input interface;
step 6, when receiving that the RXDV corresponding to the NCUC input interface is valid, the FPGA detects the value of the leader to judge whether the NCUC data frame is a valid return frame, if the NCUC data frame is a valid return frame, the RAM3 module opens the write function, and the returned NCUC data frame is written into the corresponding position of the standard Ethernet frame in the RAM3 module; meanwhile, the CRC1 module calculates CRC check data, then fills the corresponding position of the standard Ethernet frame until all NCUC data frames of the current period are returned and replaced and written into the RAM3 module, and the process goes to step 7;
and 7, opening the reading function of the RAM3 module, calculating the FCS check sequence of the whole standard Ethernet frame by the CRC2 module, and then sending the corresponding standard Ethernet frame to the computer through the standard Ethernet interface.
9. The method of claim 8, wherein the data sent periodically by the computer port deviates from the period time T1, so that a period of data in the RAM1 module may not be sent yet, the FPGA receives a standard ethernet frame in a next period sent from the computer port, in step 2, in order to prevent the data in the RAM1 module from being refreshed and causing data loss, a write function of the RAM2 module is turned on, the standard ethernet frame is written into the RAM2 module, the corresponding parameter extraction module extracts a corresponding parameter value to determine whether the standard ethernet frame is valid, and if the standard ethernet frame is valid, the standard ethernet frame is retained, and the RAM3 module backs up the standard ethernet frame in the RAM2 module and proceeds to step 3, otherwise, the corresponding standard ethernet frame is discarded.
10. The method of claim 8, wherein since the data periodically transmitted from the computer interface may deviate from the period time T1, in step 3, in order to prevent the stability of the slave motor of the NCUC from being affected by an excessive accumulated deviation time, the SYNC module is further configured to calibrate and fine-tune each transmission period of the protocol conversion module, which specifically includes:
if the total time adjustment quantity obtained by subtracting the total time adjustment quantity of the previous frame from the total time integral offset of the current frame is greater than 0, adjusting the communication period to be T2+ Deltat;
if the total time integral offset of the received current frame minus the total time adjustment amount of the previous frame is equal to 0, the communication period is adjusted to be T2;
if the total time offset of the received current frame minus the total time adjustment amount of the previous frame is less than 0, the communication period is adjusted to T2- Δ T.
CN202011149669.9A 2020-10-23 2020-10-23 Device for converting standard Ethernet to NCUC field bus protocol and implementation method Active CN112436988B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011149669.9A CN112436988B (en) 2020-10-23 2020-10-23 Device for converting standard Ethernet to NCUC field bus protocol and implementation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011149669.9A CN112436988B (en) 2020-10-23 2020-10-23 Device for converting standard Ethernet to NCUC field bus protocol and implementation method

Publications (2)

Publication Number Publication Date
CN112436988A true CN112436988A (en) 2021-03-02
CN112436988B CN112436988B (en) 2022-06-10

Family

ID=74695994

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011149669.9A Active CN112436988B (en) 2020-10-23 2020-10-23 Device for converting standard Ethernet to NCUC field bus protocol and implementation method

Country Status (1)

Country Link
CN (1) CN112436988B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114003536A (en) * 2021-10-19 2022-02-01 武汉华中数控股份有限公司 Device and system for converting NCUC field bus into Anchuan M3 bus protocol

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586273A (en) * 1994-08-18 1996-12-17 International Business Machines Corporation HDLC asynchronous to synchronous converter
US5923557A (en) * 1997-08-01 1999-07-13 Hewlett-Packard Company Method and apparatus for providing a standard interface to process control devices that are adapted to differing field-bus protocols
US6317805B1 (en) * 1998-12-18 2001-11-13 Emc Corporation Data transfer interface having protocol conversion device and upper, lower, middle machines: with middle machine arbitrating among lower machine side requesters including selective assembly/disassembly requests
CN1697448A (en) * 2005-04-21 2005-11-16 上海大学 Multi protocol conversion method and device between MODBUS/TCP industry Ethernet and field bus device network as well as field bus of PRofibus DP
CN101950175A (en) * 2010-10-21 2011-01-19 广州数控设备有限公司 Implementation method of high-speed fieldbus based on industrial Ethernet
CN102170430A (en) * 2011-03-24 2011-08-31 华中科技大学 Multi-port multi-network protocol converter
CN102594627A (en) * 2012-03-12 2012-07-18 华中科技大学 Gigabit Ethernet field bus communication device based on FPGA
CN103095537A (en) * 2012-12-28 2013-05-08 武汉华中数控股份有限公司 Numerical control device capable of concurrently controlling two-class industrial Ethernet bus slave station equipment
CN105553795A (en) * 2015-12-24 2016-05-04 武汉华中数控股份有限公司 Method for transmitting standard Ethernet data in industrial Ethernet
CN106161168A (en) * 2016-07-06 2016-11-23 武汉理工大学 A kind of programmable double on-site bus translation interface and method
US20170118270A1 (en) * 2015-10-21 2017-04-27 Honeywell International, Inc. Mib data broadcast using inexpensive method incorporating microcontroller and fpga
CN107070937A (en) * 2017-04-27 2017-08-18 北京广利核系统工程有限公司 A kind of protocol conversion apparatus based on FPGA
CN107171920A (en) * 2017-05-03 2017-09-15 华中科技大学 A kind of bus gateway apparatus for being used to realize NCUC and POWERLINK interconnections
CN108199822A (en) * 2017-12-29 2018-06-22 武汉华中数控股份有限公司 A kind of bus synchronous method and device of EtherCAT-NCUC
CN109347884A (en) * 2018-12-05 2019-02-15 北京和利时系统工程有限公司 A kind of real-time ethernet is to the conversion method and device of fieldbus, storage medium

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586273A (en) * 1994-08-18 1996-12-17 International Business Machines Corporation HDLC asynchronous to synchronous converter
US5923557A (en) * 1997-08-01 1999-07-13 Hewlett-Packard Company Method and apparatus for providing a standard interface to process control devices that are adapted to differing field-bus protocols
US6317805B1 (en) * 1998-12-18 2001-11-13 Emc Corporation Data transfer interface having protocol conversion device and upper, lower, middle machines: with middle machine arbitrating among lower machine side requesters including selective assembly/disassembly requests
CN1697448A (en) * 2005-04-21 2005-11-16 上海大学 Multi protocol conversion method and device between MODBUS/TCP industry Ethernet and field bus device network as well as field bus of PRofibus DP
CN101950175A (en) * 2010-10-21 2011-01-19 广州数控设备有限公司 Implementation method of high-speed fieldbus based on industrial Ethernet
CN102170430A (en) * 2011-03-24 2011-08-31 华中科技大学 Multi-port multi-network protocol converter
CN102594627A (en) * 2012-03-12 2012-07-18 华中科技大学 Gigabit Ethernet field bus communication device based on FPGA
CN103095537A (en) * 2012-12-28 2013-05-08 武汉华中数控股份有限公司 Numerical control device capable of concurrently controlling two-class industrial Ethernet bus slave station equipment
US20170118270A1 (en) * 2015-10-21 2017-04-27 Honeywell International, Inc. Mib data broadcast using inexpensive method incorporating microcontroller and fpga
CN105553795A (en) * 2015-12-24 2016-05-04 武汉华中数控股份有限公司 Method for transmitting standard Ethernet data in industrial Ethernet
CN106161168A (en) * 2016-07-06 2016-11-23 武汉理工大学 A kind of programmable double on-site bus translation interface and method
CN107070937A (en) * 2017-04-27 2017-08-18 北京广利核系统工程有限公司 A kind of protocol conversion apparatus based on FPGA
CN107171920A (en) * 2017-05-03 2017-09-15 华中科技大学 A kind of bus gateway apparatus for being used to realize NCUC and POWERLINK interconnections
CN108199822A (en) * 2017-12-29 2018-06-22 武汉华中数控股份有限公司 A kind of bus synchronous method and device of EtherCAT-NCUC
CN109347884A (en) * 2018-12-05 2019-02-15 北京和利时系统工程有限公司 A kind of real-time ethernet is to the conversion method and device of fieldbus, storage medium

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
刘斌: "NCUC-Bus现场总线与USB总线转换技术研究及应用", 《中国优秀硕士学位论文全文数据库工程科技I辑》 *
常永财: "基于NCUC-Bus现场总线数控系统通信平台的设计与实现", 《无线互联科技》 *
陈明: "基于NCUC-Bus现场总线多功能网络互联装置的研究与实现", 《中国优秀硕士学位论文全文数据库工程科技I辑》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114003536A (en) * 2021-10-19 2022-02-01 武汉华中数控股份有限公司 Device and system for converting NCUC field bus into Anchuan M3 bus protocol

Also Published As

Publication number Publication date
CN112436988B (en) 2022-06-10

Similar Documents

Publication Publication Date Title
US11575495B2 (en) One-step timestamping in network devices
CN110649984B (en) Clock synchronization method and device, computer storage medium and electronic equipment
CN101631016B (en) Time synchronization method of fieldbus
US9209942B2 (en) Communication system and communication apparatus
CN106464559B (en) High speed embedded protocol for distributed control system
CN101645869B (en) Switch with submicrosecond clock and switching processing method thereof
CN112436988B (en) Device for converting standard Ethernet to NCUC field bus protocol and implementation method
CN113422665B (en) Method and system for realizing time synchronization of vehicle-mounted system based on IPC mechanism
CN111756861A (en) System for realizing internal and external network data exchange based on configuration file
CN108111494A (en) A kind of protocol conversion apparatus of 1553B buses and FlexRay buses
CN111193573B (en) FPGA asynchronous serial port communication device and method with adjustable speed
EP3806356A1 (en) Time synchronization method and device
Seo et al. Development of network gateway between CAN and FlexRay protocols for ECU embedded systems
CN102104415B (en) Frame frequency and frame number abnormal processing method and system
CN111988105B (en) RS 485-based high-precision time synchronization method
CN215121214U (en) Real-time synchronization device of wireless ad hoc network
CN117097590B (en) TSN real-time Ethernet gateway data transmission method
CN201789509U (en) Bidirectional frequency synchronous transmission master-slave device based on E1 link
US20230269161A1 (en) Dynamic one-step/two-step timestamping per packet in network devices
US20240126629A1 (en) Semiconductor device and serial communication interface control method
CN114124277A (en) Time service system and method based on local bus between terminals
CN117240392A (en) IEEE1588 clock synchronization method and system based on field programmable gate array
CN115996245A (en) Data frame stream transmission method, device, equipment and medium
Yang et al. The design of the CAN bus interface controller based on Verilog HDL
CN117998561A (en) Clock adjustment method, device, equipment, medium and vehicle

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant