CN112434771A - Flexible wireless communication chip and wireless communication label - Google Patents
Flexible wireless communication chip and wireless communication label Download PDFInfo
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- CN112434771A CN112434771A CN202011131719.0A CN202011131719A CN112434771A CN 112434771 A CN112434771 A CN 112434771A CN 202011131719 A CN202011131719 A CN 202011131719A CN 112434771 A CN112434771 A CN 112434771A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Theoretical Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention provides a flexible wireless communication chip, which comprises a flexible substrate and a wireless communication circuit arranged on the flexible substrate. The wireless communication circuit includes a plurality of thin film transistors. Each thin film transistor is provided with a first end, a second end and a control end, and the first end and the second end are arranged in a first direction in a plurality of vertical projections on the flexible substrate. The first directions of the thin film transistors of the wireless communication circuit are substantially parallel. The invention also provides a wireless communication tag comprising the flexible wireless communication chip.
Description
Technical Field
The present invention relates to electronic devices, and more particularly to a flexible wireless communication chip and a wireless communication tag.
Background
Near Field Communication (NFC) allows two electronic devices equipped with antenna functions to communicate wirelessly at a distance of a few centimeters. Since the contactless data exchange mechanism has the advantages of high response speed, high security, and convenience, many products are available in the market in recent years, which incorporate near field wireless communication functions, such as electronic ticket cards (e.g., yo-yo cards), electronic payment devices (e.g., smart phones, smart watches), and the like. The user only needs to approach an object with a near field wireless communication tag (NFC tag) to a card reader (NFC reader), and can complete identity verification and data exchange in a short time, so that a more convenient life style of the user is provided.
The near field communication tag (NFC tag) comprises an antenna and a wireless communication chip electrically connected with the antenna. In order to facilitate the installation of the near field wireless communication tag (NFC tag) on electronic products with various shapes, the near field wireless communication tag (NFC tag) and the wireless communication chip thereof need to be flexible. That is, the wireless communication chip needs to use the flexible substrate to carry the wireless communication circuit. However, when a wireless communication circuit is formed on a flexible substrate with a low melting point, the performance of the wireless communication chip/nfc tag is affected by the problem that the physical characteristics of a plurality of thin film transistors of the wireless communication circuit are not uniform.
Disclosure of Invention
The invention provides a flexible wireless communication chip with good performance.
The invention provides a wireless communication tag which is good in performance.
The flexible wireless communication chip of the invention comprises a flexible substrate and a wireless communication circuit arranged on the flexible substrate. The wireless communication circuit includes a plurality of thin film transistors. Each thin film transistor is provided with a first end, a second end and a control end, and the first end and the second end are arranged in a first direction in a plurality of vertical projections on the flexible substrate. The first directions of the thin film transistors of the wireless communication circuit are substantially parallel.
The wireless communication tag of the invention comprises the flexible wireless communication chip and an antenna electrically connected to the wireless communication circuit of the flexible wireless communication chip.
In an embodiment of the invention, the flexible substrate is bent in a second direction, and the first direction is substantially perpendicular to the second direction.
In an embodiment of the invention, the wireless communication circuit includes a D flip-flop, the plurality of thin film transistors includes all of the plurality of first thin film transistors of the D flip-flop, and the plurality of first directions of all of the first thin film transistors of the D flip-flop are substantially parallel.
In an embodiment of the invention, the wireless communication circuit includes a power supply line, a common line and a D flip-flop. The D flip-flop comprises a NOR gate and a NOT gate. The NOR gate comprises a first thin film transistor and a second thin film transistor in the plurality of thin film transistors, a first input line, a second input line and a first output line, wherein the first end of the first thin film transistor and the first end of the second thin film transistor are electrically connected to the first output line, the control end of the first thin film transistor and the control end of the second thin film transistor are respectively electrically connected to the first input line and the second input line, and the second end of the first thin film transistor and the second end of the second thin film transistor are electrically connected to the shared line. The inverter includes a third thin film transistor and a fourth thin film transistor among the plurality of thin film transistors, a third input line and a second output line, a first end of the third thin film transistor is electrically connected to the power supply line, a control end of the third thin film transistor and a control end of the fourth thin film transistor are electrically connected to the third input line, a second end of the third thin film transistor and a first end of the fourth thin film transistor are electrically connected to the second output line, and a second end of the fourth thin film transistor is electrically connected to the common line. The first direction of the first thin film transistor, the first direction of the second thin film transistor, the first direction of the third thin film transistor, and the first direction of the fourth thin film transistor are substantially parallel.
In an embodiment of the invention, the wireless communication circuit includes a power supply line, a common line and a D flip-flop. The D flip-flop includes a plurality of nor gates. Each NOR gate comprises a first thin film transistor and a second thin film transistor in the plurality of thin film transistors, a first input line, a second input line and a first output line, wherein the first end of the first thin film transistor and the first end of the second thin film transistor are electrically connected to the first output line, the control end of the first thin film transistor and the control end of the second thin film transistor are respectively electrically connected to the first input line and the second input line, and the second end of the first thin film transistor and the second end of the second thin film transistor are electrically connected to the shared line. The plurality of NOR gates includes a first NOR gate, a second NOR gate and a third NOR gate, a first output line of the first NOR gate is electrically connected to a second input line of the second NOR gate, and a first input line of the second NOR gate is electrically connected to a first input line of the third NOR gate. The plurality of first directions of the first thin film transistor and the second thin film transistor of the first nor gate, the plurality of first directions of the first thin film transistor and the second thin film transistor of the second nor gate, and the plurality of first directions of the first thin film transistor and the second thin film transistor of the third nor gate are substantially parallel.
In an embodiment of the invention, the first nor gate, the second nor gate and the third nor gate are disposed on the same side of the common line.
In an embodiment of the invention, the first nor gate, the second nor gate and the third nor gate are sequentially arranged in the first direction.
In an embodiment of the invention, the wireless communication circuit includes a frequency divider, a decoder, and a memory. The plurality of thin film transistors of the wireless communication circuit includes a first plurality of thin film transistors of the frequency divider. The decoder is electrically connected to the frequency divider. The plurality of thin film transistors of the wireless communication circuit includes a plurality of second thin film transistors of the decoder. The memory is electrically connected to the decoder. The plurality of thin film transistors of the wireless communication circuit includes a plurality of third thin film transistors of the memory. The first directions of the first TFTs of the frequency divider, the second TFTs of the decoder, and the third TFTs of the memory are substantially parallel to each other.
In an embodiment of the invention, the wireless communication circuit further includes a counter electrically connected to the frequency divider and the decoder. The plurality of thin film transistors of the wireless communication circuit comprise a plurality of fourth thin film transistors of the counter, and a plurality of first directions of the plurality of first thin film transistors of the frequency divider and a plurality of first directions of the plurality of fourth thin film transistors of the counter are substantially parallel.
In an embodiment of the invention, a portion of the frequency divider, a portion of the counter, and a portion of the decoder are sequentially arranged in the first direction.
Drawings
Fig. 1 is a schematic diagram of a flexible wireless communication chip 10 according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a thin film transistor 120 according to an embodiment of the invention.
Fig. 3 shows a circuit symbol of a D flip-flop DFF according to an embodiment of the invention.
Fig. 4 is a schematic diagram of an equivalent circuit of a D flip-flop DFF according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a circuit layout of a D flip-flop DFF according to an embodiment of the invention.
Fig. 6 shows circuit symbols of a NOR gate NOR according to an embodiment of the invention.
Fig. 7 is a schematic diagram of an equivalent circuit of a NOR gate NOR according to an embodiment of the invention.
Fig. 8 is a schematic diagram of a circuit layout of a NOR gate NOR according to an embodiment of the invention.
FIG. 9 shows a circuit diagram of an inverter INV according to an embodiment of the present invention.
Fig. 10 is a schematic diagram of an equivalent circuit of the inverter INV according to an embodiment of the present invention.
Fig. 11 is a schematic diagram of a circuit layout of the inverter INV according to an embodiment of the present invention.
Fig. 12 is a schematic diagram of a semi-finished product 1A of a wireless communication tag according to an embodiment of the invention.
Fig. 13 is a schematic diagram of a wireless communication tag 1 according to an embodiment of the invention.
Wherein, the reference numbers:
1: wireless communication tag 1A: semi-finished product
10: flexible wireless communication chip 21: tape winding
22: the reel 30: antenna with a shield
110: flexible substrate 120: thin film transistor
120-1: first thin film transistor 120-2: second thin film transistor
120-3: third thin film transistor 120-4: fourth thin film transistor
120-5: fifth thin film transistor 120-6: sixth thin film transistor
121: first end 122: second end
123: control end 124: semiconductor pattern
BF: a buffer C: wireless communication circuit
CNT: a counter D: data input terminal
DV: frequency dividers DC _3-8, DC _ 4-16: decoder
DFF: d flip-flop in 1: a first input line
in 2: second input line in 3: third input line
INV: not gate NOR: NOR gate
NOR-1: first NOR gate NOR-2: second NOR gate
NOR-3: third NOR gate NOR-4: fourth NOR gate
NOR-5: fifth NOR gate NOR-6: sixth nor gate
out 1: first output line out 2: second output line
P: a pad Q: output terminal for temporary data
QB: inverted value terminal ROM: memory device
VSS: shared line VDD: power supply line
x: first direction y: second direction
Detailed Description
Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to physical and/or electrical connections. Further, "electrically connected" or "coupled" may mean that there are additional elements between the elements.
As used herein, "about", "approximately", or "substantially" includes the stated value and the average value within an acceptable range of deviation of the specified value as determined by one of ordinary skill in the art, taking into account the measurement in question and the specified amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ± 30%, ± 20%, ± 10%, ± 5%. Further, as used herein, "about", "approximately" or "substantially" may be selected based on optical properties, etch properties, or other properties, with a more acceptable range of deviation or standard deviation, and not all properties may be applied with one standard deviation.
Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Fig. 1 is a schematic diagram of a flexible wireless communication chip 10 according to an embodiment of the invention.
Referring to fig. 1, the flexible wireless communication chip 10 includes a flexible substrate 110 and a wireless communication circuit C disposed on the flexible substrate 110. The flexible substrate 110 is made of flexible material. For example, in the present embodiment, the material of the flexible substrate 110 may include organic polymers, such as: polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), Polycarbonate (PC), Polyethersulfone (PES), or polyarylate (polyarylate), or other suitable materials, or a combination of at least two of the foregoing.
The wireless communication circuit C comprises a frequency Divider (Divider) DV, decoders (decoders) DC _3-8 and DC _4-16 electrically connected to the frequency Divider DV, and a memory ROM electrically connected to the decoders DC _3-8 and DC _ 4-16. In the present embodiment, the wireless communication circuit C further includes a Counter CNT electrically connected to the frequency divider DV and the decoders DC _3-8 and DC _ 4-16. In addition, the wireless communication circuit C may further optionally include a buffer bf (buffer) electrically connected to the frequency divider DV and the Counter CNT.
Fig. 2 is a schematic diagram of a thin film transistor 120 according to an embodiment of the invention.
Referring to fig. 1 and 2, the wireless communication circuit C includes a plurality of thin film transistors 120. Each thin film transistor 120 has a first end 121, a second end 122, a control end 123 and a semiconductor pattern 124, the first end 121 and the second end 122 are respectively electrically connected to two different regions of the semiconductor pattern 124, and a plurality of vertical projections of the first end 121 and the second end 122 on the flexible substrate 110 are arranged in the first direction x.
In the present embodiment, the control terminal 123 of the thin film transistor 120 is formed on the first metal layer, for example; the first end 121 and the second end 122 of the thin film transistor 120 are formed on the second metal layer, for example; a material of the semiconductor pattern 124 is, for example, polysilicon (poly-Si); however, the present invention is not limited thereto.
It is noted that the first directions x of the thin film transistors 120 of the wireless communication circuit C are substantially parallel. That is, in the process of the flexible wireless communication chip 10, when a plurality of semiconductor materials (e.g., amorphous silicon; not shown) are converted into a plurality of semiconductor patterns 124 (e.g., polysilicon) of the plurality of thin film transistors 120 by an Excimer-laser annealing (ELA) method, the laser beam can scan the plurality of semiconductor materials in the same direction/angle, so that the plurality of semiconductor patterns 124 of the plurality of thin film transistors 120 of the wireless communication circuit C have the same or similar physical properties. Therefore, the electrical properties of the thin film transistors 120 of the wireless communication circuit C are more consistent, which is helpful to improve the electrical properties of the flexible wireless communication chip 10.
Referring to fig. 1, in the present embodiment, the first directions x of the tfts 120 of the divider DV, the first directions x of the tfts 120 of the decoders DC _4-16, the first directions x of the tfts 120 of the memory ROM, the first directions x of the tfts 120 of the counter CNT, and the first directions x of the tfts 120 of the buffer BF are substantially parallel.
Further, in the present embodiment, the first direction x of all the thin film transistors 120 of the divider DV, the first direction x of all the thin film transistors 120 of the decoders DC _3-8, the first direction x of all the thin film transistors 120 of the decoders DC _4-16, the first direction x of all the thin film transistors 120 of the memory ROM, the first direction x of all the thin film transistors 120 of the counter CNT, and the first direction x of all the thin film transistors 120 of the buffer BF are substantially parallel. That is, in the present embodiment, the first directions x of all the thin film transistors 120 of the wireless communication circuit C are substantially the same.
Fig. 3 shows a circuit symbol of a D flip-flop DFF according to an embodiment of the invention.
Fig. 4 is a schematic diagram of an equivalent circuit of a D flip-flop DFF according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a circuit layout of a D flip-flop DFF according to an embodiment of the invention.
Referring to fig. 1, fig. 3, fig. 4 and fig. 5, in the present embodiment, the wireless communication circuit C may include a plurality of D-Flip-flops DFF (D-Flip-flops), and the plurality of first directions x of all the thin film transistors 120 of each D-Flip-flop DFF are substantially parallel. For example, in the present embodiment, the counter CNT and the frequency divider DV may include respective D flip-flops DFF, and the plurality of first directions x of all the thin film transistors 120 of the D flip-flops DFF of the counter CNT and the plurality of first directions x of all the thin film transistors 120 of the D flip-flops DFF of the frequency divider DV are substantially parallel.
Referring to fig. 3, 4 and 5, in the present embodiment, each D flip-flop DFF may include at least one NOR gate NOR and at least one NOR gate INV, wherein the first directions x of the thin film transistors 120 of the NOR gate NOR are substantially parallel, the first directions x of the thin film transistors 120 of the NOR gate INV are substantially parallel, and the first directions x of the thin film transistors 120 of the NOR gate NOR are substantially parallel to the first directions x of the thin film transistors 120 of the NOR gate INV.
Fig. 6 shows circuit symbols of a NOR gate NOR according to an embodiment of the invention.
Fig. 7 is a schematic diagram of an equivalent circuit of a NOR gate NOR according to an embodiment of the invention.
Fig. 8 is a schematic diagram of a circuit layout of a NOR gate NOR according to an embodiment of the invention.
Referring to fig. 6, 7 and 8, for example, in the present embodiment, each NOR gate NOR may include a first tft 120-1 and a second tft 120-2 among the tfts 120, a first input line in1, a second input line in2 and a first output line out1, a first end 121 of the first tft 120-1 and a first end 121 of the second tft 120-2 are electrically connected to the first output line out1, a control end 123 of the first tft 120-1 and a control end 123 of the second tft 120-2 are electrically connected to the first input line in1 and the second input line in2, respectively, and a second end 122 of the first tft 120-1 and a second end 122 of the second tft 120-2 are electrically connected to the common line VSS. Referring to fig. 8, in the present embodiment, in an actual circuit layout, the first end 121 of the first thin film transistor 120-1 and the first end 121 of the second thin film transistor 120-2 may share a conductive pattern, but the invention is not limited thereto.
Referring to fig. 6, 7 and 8, in the present embodiment, each NOR gate NOR may further selectively include a fifth tft 120-5 and a sixth tft 120-6 among the plurality of tfts 120, a first terminal 121 of the fifth tft 120-5 is electrically connected to the power supply line VDD, a control terminal 123 of the fifth tft 120-5 is electrically connected to the first input line 1, a second terminal 122 of the fifth tft 120-5 is electrically connected to the first terminal 121 of the sixth tft 120-6, the control terminal 123 of the sixth tft 120-6 is electrically connected to the second input line in2, and the second terminal 122 of the sixth tft 120-6 is electrically connected to the first output line out 1. Referring to fig. 8, in the actual circuit layout, the second end 122 of the fifth tft 120-5 and the first end 121 of the sixth tft 120-6 may share one conductive pattern, but the invention is not limited thereto.
Referring to fig. 5 and 8, in the present embodiment, the first direction x of the first tft 120-1, the first direction x of the second tft 120-2, the first direction x of the fifth tft 120-5, and the first direction x of the sixth tft 120-6 of the NOR gate NOR are substantially parallel.
It should be noted that the NOR gate NOR of the present invention is not limited to be formed by the first thin film transistor 120-1, the second thin film transistor 120-2, the fifth thin film transistor 120-5 and the sixth thin film transistor 120-6 of fig. 7. In other embodiments, the NOR gate NOR may be other types of circuits.
FIG. 9 shows a circuit diagram of an inverter INV according to an embodiment of the present invention.
Fig. 10 is a schematic diagram of an equivalent circuit of the inverter INV according to an embodiment of the present invention.
Fig. 11 is a schematic diagram of a circuit layout of the inverter INV according to an embodiment of the present invention.
Referring to fig. 9, 10 and 11, in the present embodiment, each of the inverter INV includes a third tft 120-3 and a fourth tft 120-4, a third input line in3 and a second output line out2 among the tfts 120, a first end 121 of the third tft 120-3 is electrically connected to the power supply line VDD, a control end 123 of the third tft 120-3 and a control end 123 of the fourth tft 120-4 are electrically connected to the third input line in3, a second end 122 of the third tft 120-3 and a first end 121 of the fourth tft 120-4 are electrically connected to the second output line 2, and a second end 122 of the fourth tft 120-4 is electrically connected to the common line VSS.
Referring to fig. 5 and 11, the first direction x of the third tft 120-3 and the first direction x of the fourth tft 120-4 of the inverter INV are substantially parallel.
Referring to fig. 5, in the present embodiment, the first directions x of the first tft 120-1, the second tft 120-2, the fifth tft 120-5 and the sixth tft 120-6 of the NOR gate NOR are substantially parallel to the first directions x of the third tft 120-3 and the fourth tft 120-4 of the nand gate INV.
Referring to fig. 3, 4 and 5, for example, in the present embodiment, the D flip-flop DFF may include a first NOR gate NOR-1, a second NOR gate NOR-2, a third NOR gate NOR-3, a fourth NOR gate NOR-4, a fifth NOR gate NOR-5, a sixth NOR gate NOR-6 and a NOR gate INV, wherein the first input line in1 of the first NOR gate NOR-1 may be regarded as the data input terminal D of the D flip-flop DFF, the second input line in2 of the first NOR gate NOR-1 is electrically connected to the first output line NOR 1 of the fifth NOR gate NOR-5 and the second input line in2 of the sixth NOR gate NOR-6, the first output line out1 of the first NOR gate NOR-1 is electrically connected to the second input line in2 of the second NOR gate NOR-2, and the first input line in1 of the second NOR gate NOR-2 is electrically connected to the first output line in1 of the fourth NOR gate NOR-4 and the third NOR gate NOR-3 An input line in1, a first output line out1 of the second NOR gate NOR-2 is electrically connected to a third input line in3 of the NOR gate INV and a first input line in1 of the fourth NOR gate NOR-4, a second output line out2 of the NOR gate INV is electrically connected to a second input line in2 of the fifth NOR gate NOR-5, a second input line in2 of the fourth NOR gate NOR-4 and a first input line in1 of the fifth NOR gate NOR-5 are electrically connected to a clock input terminal CLK of the flip-flop DFF, a first output line out1 of the fifth NOR gate NOR-5 is electrically connected to a second input line in2 of the sixth NOR gate NOR-6, a second input line in2 of the third NOR gate NOR-3 and a first output line 1 of the sixth NOR gate NOR-6 are electrically connected to an inverted value terminal QB of the temporary data output Q of the D flip-flop DFF, a first output line out1 of the third NOR gate NOR-3 and a first output line in 4625 of the sixth NOR gate NOR-5 are electrically connected to a first input line D1 of the temporary flip-flop DFF 59f A data storage output terminal Q.
Referring to fig. 5, in the present embodiment, the first directions x of the first thin film transistors 120-1, the second thin film transistors 120-2, the fifth thin film transistors 120-5, and the sixth thin film transistors 120-6 of the first NOR gate NOR-1, the second thin film transistors 120-2, the fifth thin film transistors 120-5, and the sixth thin film transistors NOR-4 are substantially parallel to the first directions x of the third thin film transistors 120-3 and the fourth thin film transistors 120-4 of the nand gates INV.
It should be noted that the D flip-flop DFF of the present invention is not limited to be composed of the first NOR gate NOR-1, the second NOR gate NOR-2, the third NOR gate NOR-3, the fourth NOR gate NOR-4, the fifth NOR gate NOR-5, the sixth NOR gate NOR-6 and the NOR gate INV of fig. 4. In other embodiments, the NOR gate NOR may be other types of circuits.
Referring to fig. 5, in the present embodiment, since the first direction x of each thin film transistor 120 of the D flip-flop DFF is identical, the first NOR gate NOR-1, the second NOR gate NOR-2, the third NOR gate NOR-3, the fourth NOR gate NOR-4, the fifth NOR gate NOR-5, the sixth NOR gate NOR-6 and the NOR gate INV may be disposed on the same side of a common line VSS, and the first NOR gate NOR-1, the second NOR gate NOR-2, the NOR gate INV, the fourth NOR gate NOR-4, the fifth NOR gate NOR-5, the third NOR gate NOR-3 and the sixth NOR gate NOR-6 may be sequentially arranged in the first direction x, so that the layout area of the D flip-flop DFF is small, which contributes to the reduction of the overall area of the flexible wireless communication chip 10.
Referring to fig. 1, in the present embodiment, since the first directions x of the thin film transistors 120 of the wireless communication circuit C are substantially parallel, the functional circuits of the wireless communication circuit C can be substantially arranged on the flexible substrate 110 according to the sequence of processing signals, which is helpful for reducing the overall layout area of the wireless communication circuit C and realizing the micro flexible wireless communication chip 10.
For example, in the present embodiment, the frequency divider DV, the buffer BF, the counter CNT, the decoder DC _3-8 and the memory ROM may be sequentially arranged on the flexible substrate 110, wherein a portion of the frequency divider DV, a portion of the counter CNT and a portion of the decoder DC _3-8 may be further sequentially arranged in the first direction x of the thin film transistor 120.
Fig. 12 is a schematic diagram of a semi-finished product 1A of a wireless communication tag according to an embodiment of the invention.
Referring to fig. 1 and 12, after the plurality of flexible wireless communication chips 10 are manufactured, the plurality of flexible wireless communication chips 10 may be disposed on a tape 21, so as to facilitate transportation and/or storage of the flexible wireless communication chips 10 before the flexible wireless communication chips 10 are connected to the antenna 30 (shown in fig. 13). In the semi-finished product 1A of the wireless communication tag, the wireless communication circuit C of the wireless communication chip 10 is disposed between the flexible substrate 110 of the wireless communication chip 10 and the tape 21, that is, the film surface of the wireless communication chip 10 faces the reel 22 of the semi-finished product 1A of the wireless communication tag.
The tape 21 is adapted to be wound on the reel 22 and bent in the second direction y, and the flexible substrate 110 of the wireless communication chip 10 is also bent in the second direction y along with the tape 21. It is noted that, in the semi-finished product 1A or the finished product of the wireless communication tag (e.g. the wireless communication tag 1 in fig. 13), the first direction x of the thin film transistor 120 of the wireless communication chip 10 is perpendicular to the second direction y (i.e. the bending direction). Therefore, the electrical variation of the thin film transistor 120 caused by bending can be reduced or avoided, which is helpful for improving the reliability of the flexible wireless communication chip 10.
Fig. 13 is a schematic diagram of a wireless communication tag 1 according to an embodiment of the invention.
Referring to fig. 1 and 13, the wireless communication tag 1 includes a flexible wireless communication chip 10 and an antenna 30 electrically connected to a wireless communication circuit C of the flexible wireless communication chip 10. In the present embodiment, the flexible wireless communication chip 10 may include a plurality of pads P disposed on the flexible substrate 110 and electrically connected to the wireless communication circuit C; the pads P of the flexible wireless communication chip 10 can be bonded to two ends of the antenna 30 by using silver paste, so that the wireless communication circuit C of the flexible wireless communication chip 10 is electrically connected to the antenna 30. However, the present invention is not limited thereto, and in other embodiments, the flexible wireless communication chip 10 may be electrically connected to the antenna 30 by other methods. For example, in one embodiment, the antenna 30 may be formed on the flexible wireless communication chip 10 in a printing direction to be electrically connected to the wireless communication circuit C of the flexible wireless communication chip 10.
In summary, the flexible wireless communication chip/wireless communication tag according to an embodiment of the present invention includes a flexible substrate and a wireless communication circuit disposed on the flexible substrate, wherein the wireless communication circuit includes a plurality of thin film transistors, each of the thin film transistors has a first end, a second end and a control end, and the first end and the second end are arranged in a first direction of a plurality of vertical projections on the flexible substrate.
In particular, a plurality of first directions of a plurality of thin film transistors of the wireless communication circuit are substantially parallel. Therefore, in the manufacturing process of the flexible wireless communication chip, the laser beam can scan a plurality of semiconductor materials in the same direction/angle, so that a plurality of semiconductor patterns of a plurality of thin film transistors of the wireless communication circuit have the same or similar physical characteristics, and the electrical property of the flexible wireless communication chip/the wireless communication label is further improved.
Although the present invention has been described with reference to the above embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (11)
1. A flexible wireless communication chip, comprising:
a flexible substrate; and
a wireless communication circuit disposed on the flexible substrate, wherein the wireless communication circuit includes a plurality of thin film transistors; each thin film transistor is provided with a first end, a second end and a control end, and a plurality of vertical projections of the first end and the second end on the flexible substrate are arranged in a first direction; the plurality of first directions of the thin film transistors of the wireless communication circuit are substantially parallel.
2. The flexible wireless communication chip of claim 1, wherein the flexible substrate is bent in a second direction, and the first direction is substantially perpendicular to the second direction.
3. The chip of claim 1, wherein the wireless communication circuit further comprises a D flip-flop, the thin film transistors include a plurality of first thin film transistors of the D flip-flop, and a plurality of first directions of the first thin film transistors of the D flip-flop are substantially parallel.
4. The flexible wireless communication chip of claim 1, wherein the wireless communication circuit comprises a power supply line, a common line and a D flip-flop, the D flip-flop comprising:
a nor gate including a first thin film transistor and a second thin film transistor, a first input line, a second input line, and a first output line among the thin film transistors, a first end of the first thin film transistor and a first end of the second thin film transistor being electrically connected to the first output line, a control end of the first thin film transistor and a control end of the second thin film transistor being electrically connected to the first input line and the second input line, respectively, and a second end of the first thin film transistor and a second end of the second thin film transistor being electrically connected to the common line; and
a not gate including a third thin film transistor and a fourth thin film transistor, a third input line and a second output line of the thin film transistors, wherein a first end of the third thin film transistor is electrically connected to the power supply line, a control end of the third thin film transistor and a control end of the fourth thin film transistor are electrically connected to the third input line, a second end of the third thin film transistor and a first end of the fourth thin film transistor are electrically connected to the second output line, and a second end of the fourth thin film transistor is electrically connected to the common line;
the first direction of the first thin film transistor, the first direction of the second thin film transistor, the first direction of the third thin film transistor and the first direction of the fourth thin film transistor are substantially parallel.
5. The flexible wireless communication chip of claim 1, wherein the wireless communication circuit comprises a power supply line, a common line and a D flip-flop, the D flip-flop comprising:
a plurality of nor gates, wherein the nor gates include a first thin film transistor and a second thin film transistor in the thin film transistors, a first input line, a second input line, and a first output line, a first end of the first thin film transistor and a first end of the second thin film transistor are electrically connected to the first output line, a control end of the first thin film transistor and a control end of the second thin film transistor are electrically connected to the first input line and the second input line, respectively, and a second end of the first thin film transistor and a second end of the second thin film transistor are electrically connected to the common line;
the NOR gate comprises a first NOR gate, a second NOR gate and a third NOR gate, wherein a first output line of the first NOR gate is electrically connected to a second input line of the second NOR gate, and a first input line of the second NOR gate is electrically connected to a first input line of the third NOR gate;
the plurality of first directions of the first and second thin film transistors of the first nor gate, the plurality of first directions of the first and second thin film transistors of the second nor gate, and the plurality of first directions of the first and second thin film transistors of the third nor gate are substantially parallel.
6. The flexible wireless communication chip of claim 5, wherein the first NOR gate, the second NOR gate and the third NOR gate are disposed on a same side of the common line.
7. The flexible wireless communication chip of claim 5, wherein the first NOR gate, the second NOR gate and the third NOR gate are sequentially arranged in the first direction.
8. The flexible wireless communication chip of claim 1, wherein the wireless communication circuit comprises:
a frequency divider, wherein the thin film transistors of the wireless communication circuit comprise a plurality of first thin film transistors of the frequency divider;
a decoder electrically connected to the frequency divider, wherein the thin film transistors of the wireless communication circuit include a plurality of second thin film transistors of the decoder; and
a memory electrically connected to the decoder, wherein the thin film transistors of the wireless communication circuit include a plurality of third thin film transistors of the memory;
the plurality of first directions of the first thin film transistors of the frequency divider, the plurality of first directions of the second thin film transistors of the decoder and the plurality of first directions of the third thin film transistors of the memory are substantially parallel.
9. The flexible wireless communication chip of claim 8, wherein the wireless communication circuit further comprises:
and the counter is electrically connected to the frequency divider and the decoder, wherein the thin film transistor of the wireless communication circuit comprises a plurality of fourth thin film transistors of the counter, and the first direction of the first thin film transistor of the frequency divider is substantially parallel to the plurality of first directions of the fourth thin film transistors of the counter.
10. The flexible wireless communication chip of claim 9, wherein a portion of the frequency divider, a portion of the counter, and a portion of the decoder are sequentially arranged in the first direction.
11. A wireless communication tag, comprising:
the flexible wireless communication chip as claimed in any one of claims 1 to 10; and
an antenna electrically connected to the wireless communication circuit of the flexible wireless communication chip.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962930794P | 2019-11-05 | 2019-11-05 | |
| US62/930,794 | 2019-11-05 | ||
| TW109123393 | 2020-07-10 | ||
| TW109123393A TWI743882B (en) | 2019-11-05 | 2020-07-10 | Flexible wireless communication chip and wireless communication tag |
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| CN112434771A true CN112434771A (en) | 2021-03-02 |
| CN112434771B CN112434771B (en) | 2023-08-18 |
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| CN112434771B (en) | 2023-08-18 |
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