CN112420539A - Silicon wafer processing method and silicon wafer - Google Patents
Silicon wafer processing method and silicon wafer Download PDFInfo
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- CN112420539A CN112420539A CN202011266352.3A CN202011266352A CN112420539A CN 112420539 A CN112420539 A CN 112420539A CN 202011266352 A CN202011266352 A CN 202011266352A CN 112420539 A CN112420539 A CN 112420539A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 136
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 136
- 239000010703 silicon Substances 0.000 title claims abstract description 136
- 238000003672 processing method Methods 0.000 title claims abstract description 16
- 230000007547 defect Effects 0.000 claims abstract description 184
- 238000000034 method Methods 0.000 claims abstract description 54
- 238000000149 argon plasma sintering Methods 0.000 claims abstract description 36
- 238000007517 polishing process Methods 0.000 claims description 66
- 239000007788 liquid Substances 0.000 claims description 22
- 239000012530 fluid Substances 0.000 claims description 15
- 238000007865 diluting Methods 0.000 claims description 4
- 230000002596 correlated effect Effects 0.000 claims description 3
- 238000005498 polishing Methods 0.000 abstract description 13
- 239000002699 waste material Substances 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 118
- 238000004140 cleaning Methods 0.000 description 22
- 230000000694 effects Effects 0.000 description 9
- 239000000243 solution Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000011001 backwashing Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention provides a silicon wafer processing method and a silicon wafer. The silicon wafer processing method comprises the steps of detecting a first defect parameter of a local light scattering defect of a target silicon wafer; detecting a second defect parameter of an uncleanable defect in the local light scattering defects under the condition that the first defect parameter is larger than a first defect threshold value; and under the condition that the second defect parameter is larger than a second defect threshold value, marking the target silicon wafer as a silicon wafer to be inversely polished. According to the embodiment of the invention, the silicon wafer with the local light scattering defects larger than the first defect threshold and the uncleanable defects in the local light scattering defects larger than the second defect threshold is subjected to the reverse polishing treatment, so that the number of the defects in the target silicon wafer is reduced or reduced, the defects in the silicon wafer can be effectively eliminated, meanwhile, the waste of working procedures due to excessive treatment is avoided, and the rework cost is saved.
Description
Technical Field
The invention relates to the technical field of semiconductor processing, in particular to a silicon wafer processing method and a silicon wafer.
Background
Various defects may exist in the production and transportation processes of semiconductors such as silicon wafers, and for finished silicon wafers, the defects which may exist in the finished silicon wafers need to be detected after the production is finished, and the products with problems need to be reworked. In the related art, defects on the surface of a silicon wafer are mainly detected, and then the silicon wafer with the defects is cleaned, however, the silicon wafer treated in the way still cannot meet the requirements of products, and the process is wasted.
Disclosure of Invention
The embodiment of the invention provides a silicon wafer processing method and a silicon wafer, and aims to solve the problem that the existing silicon wafer processing method possibly causes process waste.
In a first aspect, an embodiment of the present invention provides a silicon wafer processing method, including the following steps:
detecting a first defect parameter of a local light scattering defect of a target silicon wafer;
detecting a second defect parameter of an uncleanable defect in the local light scattering defects under the condition that the first defect parameter is larger than a first defect threshold value;
and under the condition that the second defect parameter is larger than a second defect threshold value, marking the target silicon wafer as a silicon wafer to be inversely polished.
In some embodiments, after marking the target silicon wafer as a silicon wafer to be reverse polished, the method further includes:
and carrying out reverse polishing process treatment on the target silicon wafer, wherein the target silicon wafer is obtained through a polishing process, the reverse polishing process and the polishing process have different process parameters, and the process parameters comprise one or more of grinding time, concentration of used grinding fluid and grinding speed.
In some embodiments, the lapping time of the back-polishing process is greater than the lapping time of the polishing process; and/or
The concentration of the grinding fluid of the reverse polishing process is greater than that of the grinding fluid of the polishing process; and/or
The grinding speed of the reverse polishing process is greater than that of the polishing process.
In some embodiments, the back-polishing process comprises a first grinding stage and a second grinding stage which are sequentially performed, wherein the duration of the first grinding stage is a first duration, and the duration of the second grinding stage is a second duration;
before the target silicon wafer is subjected to the reverse polishing process, the method comprises the following steps:
detecting the maximum depth of the uncleanable defect on the target silicon wafer;
determining the first duration from the maximum depth, wherein the first duration is linearly positively correlated with maximum depth.
In some embodiments, the second length of time is less than the first length of time, and the sum of the first length of time and the second length of time is greater than the lapping time of the polishing process.
In some embodiments, the second grinding stage has a grinding speed less than the first grinding stage, and the second grinding stage has a grinding speed greater than the polishing process.
In some embodiments, the performing a reverse polishing process on the target silicon wafer includes:
carrying out first-stage grinding on the target silicon wafer by using first grinding fluid;
recovering the first grinding liquid, and diluting the first grinding liquid into a second grinding liquid;
and carrying out second-stage grinding on the target silicon wafer by using the second grinding liquid, wherein the concentration of the second grinding liquid is greater than that of the grinding liquid used in the polishing process.
In some embodiments, the detecting a second defect parameter of a non-cleanable one of the localized light scattering defects comprises:
detecting the number of uncleanable defects of the target silicon wafer;
and calculating the ratio of the number of the uncleanable defects to the number of the local light scattering defects, and taking the ratio as the second defect parameter.
In some embodiments, the second defect threshold is not less than 50%.
In a second aspect, an embodiment of the present invention provides a silicon wafer obtained by processing according to the silicon wafer processing method in any one of the first aspects.
The silicon wafer processing method comprises the steps of detecting a first defect parameter of a local light scattering defect of a target silicon wafer; detecting a second defect parameter of an uncleanable defect in the local light scattering defects under the condition that the first defect parameter is larger than a first defect threshold value; and under the condition that the second defect parameter is larger than a second defect threshold value, marking the target silicon wafer as a silicon wafer to be inversely polished. According to the embodiment of the invention, the silicon wafer with the local light scattering defects larger than the first defect threshold and the uncleanable defects in the local light scattering defects larger than the second defect threshold is subjected to the reverse polishing treatment, so that the number of the defects in the target silicon wafer is reduced or reduced, the defects in the silicon wafer can be effectively eliminated, meanwhile, the waste of working procedures due to excessive treatment is avoided, and the rework cost is saved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a flowchart of a silicon wafer processing method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a silicon wafer processing method.
As shown in fig. 1, in one embodiment, the silicon wafer processing method includes the steps of:
step 101: and detecting a first defect parameter of the local light scattering defect of the target silicon wafer.
The local light scattering defects in this embodiment can be obtained by detecting the light scattering condition of the surface of the target silicon wafer, and it should be understood that when there is a defect on the surface of the silicon wafer, for example, there is a protrusion or a damage, the light scattering of this region is different from that of other relatively flat regions, and therefore, the defect on the surface of the silicon wafer can be determined by analyzing the light scattering condition on the surface of the silicon wafer.
The first defect parameter can be determined by counting the number of defects on the surface of the target silicon wafer, or by counting the area of the defects on the surface of the target silicon wafer, or by counting the number of defects with different areas, so that the defects on the surface of the target silicon wafer can be quantified as the first defect parameter.
Step 102: and detecting a second defect parameter of the uncleanable defect in the local light scattering defects under the condition that the first defect parameter is larger than a first defect threshold value.
It should be understood that if the first defect parameter is not greater than the first defect threshold, which indicates that the number of defects on the surface of the target wafer is small, the target wafer can be regarded as a qualified product without rework.
When the first defect parameter is greater than the first defect threshold, it indicates that there are many defects on the surface of the target silicon wafer, which may affect the subsequent application, and therefore, the target silicon wafer needs to be reworked to reduce or eliminate the defects on the surface of the target silicon wafer, so that the target silicon wafer becomes a qualified product meeting the use requirements.
Accordingly, the first defect threshold needs to be set according to the usage requirement of the product, for example, in a certain application scenario, if relatively more defects are allowed to exist on the silicon wafer, the first defect threshold may be set to be relatively larger, and in other application scenarios, if the requirements on the precision and quality of the silicon wafer are higher, the first defect threshold needs to be set to be relatively smaller.
And when the first defect parameter is larger than the first defect threshold value, further detecting a second defect parameter of the uncleanable defect.
It should be understood that the uncleanable defect is a portion of the localized light scattering defects. The rework operation of the silicon wafer generally comprises a back-cleaning process and a back-polishing process, wherein the back-cleaning process refers to cleaning the silicon wafer again, the process difficulty, the cost and the like of the back-cleaning process are far lower than those of the back-polishing process, and the back-cleaning process can remove some slight scratches and other damages on the surface of the silicon wafer. However, the back-cleaning process cannot remove some damage with relatively large depth on the silicon wafer, and these defects that cannot be removed or weakened by the back-cleaning process are referred to as non-cleanable defects in this embodiment.
The specific size of the non-cleanable defect is determined according to the used back cleaning process, and the size of the defect that can be eliminated by different back cleaning processes is also different, so the defect that cannot be eliminated by the back cleaning process is defined as the non-cleanable defect in this embodiment.
In implementation, the defect depth and other parameters are detected and compared with the effect parameters of the backwashing process to determine whether the defect is a non-cleanable defect.
For example, if a back-cleaning defect can eliminate defects having a depth of 0.5 microns or less, a defect having a depth of 2 microns may be defined as a non-cleanable defect. In this way, a second defect parameter for uncleanable ones of the localized light scattering defects can be achieved.
Step 103: and under the condition that the second defect parameter is larger than a second defect threshold value, marking the target silicon wafer as a silicon wafer to be inversely polished.
When the second defect parameter in the target silicon wafer is greater than the second defect threshold value, the number of the uncleanable defects in the target silicon wafer is relatively large, and the defects on the target silicon wafer are difficult to eliminate through a back-cleaning process, so that the target silicon wafer is marked as a silicon wafer to be back-polished, the back-polishing process is carried out later, the defects existing in the target silicon wafer are eliminated or reduced, and the use requirement is met.
It should be understood that if the reverse polishing process is directly used to treat all the silicon wafers with defects, the rework treatment cost of the silicon wafers is significantly increased, and therefore, in the related art, all the silicon wafers which do not meet the requirements are subjected to the reverse cleaning operation through the reverse cleaning process, and when the defects of the silicon wafers cannot be eliminated through the reverse cleaning process, the silicon wafers are subjected to the reverse polishing treatment.
In the practical process, the inventor of the application finds that for the silicon wafer processed by the back-cleaning process and the back-polishing process, a redundant back-cleaning process is performed once, so that the rework cost is increased. In addition, the back-cleaning process may cause the uncleanable defect to be further enlarged, so that the quality of the silicon wafer is reduced, the difficulty in processing the enlarged uncleanable defect is increased, and the effect of the back-polishing process on the enlarged uncleanable defect is reduced.
The method further defines the uncleanable defects, and further detects the silicon wafer and processes the target silicon wafer by using the reverse polishing process according to the number of the uncleanable defects, so that the reworking effect of the silicon wafer is improved, the reworking process is saved, and the reworking cost is reduced.
According to the embodiment of the invention, the silicon wafer with the local light scattering defects larger than the first defect threshold and the uncleanable defects in the local light scattering defects larger than the second defect threshold is subjected to the reverse polishing treatment, so that the number of the defects in the target silicon wafer is reduced or reduced, the defects in the silicon wafer can be effectively eliminated, meanwhile, the waste of working procedures due to excessive treatment is avoided, and the rework cost is saved.
In some embodiments, after marking the target silicon wafer as a silicon wafer to be reverse polished, the method further includes:
and carrying out reverse polishing process treatment on the target silicon wafer, wherein the target silicon wafer is obtained through a polishing process, the reverse polishing process and the polishing process have different process parameters, and the process parameters comprise one or more of grinding time, concentration of used grinding fluid and grinding speed.
It should be understood that, in the production process of the target silicon wafer, the target silicon wafer has been processed by the polishing process, and in this embodiment, when the target silicon wafer marked as the silicon wafer to be inversely polished is inversely polished, the process parameters need to be adjusted to eliminate the defect that is not eliminated by the polishing process on the target silicon wafer.
In this embodiment, the control of the back-polishing process can be realized by adjusting one or more of the polishing time, the concentration of the used polishing slurry, and the polishing speed, so as to eliminate the uncleanable defect existing on the target silicon wafer.
Specifically, in some embodiments, the lapping time of the back-polishing process is greater than the lapping time of the polishing process; and/or
The concentration of the grinding fluid of the reverse polishing process is greater than that of the grinding fluid of the polishing process; and/or
The grinding speed of the reverse polishing process is greater than that of the polishing process.
By prolonging the grinding time, increasing the concentration of the grinding fluid or increasing the grinding speed, the grinding effect of the reverse polishing process can be improved, and the defect that the target silicon wafer cannot be cleaned is eliminated or weakened.
In some embodiments, before the performing the reverse polishing process on the target silicon wafer, the method includes:
detecting the maximum depth of the uncleanable defect on the target silicon wafer;
and determining the first duration according to the maximum depth.
In this embodiment, a reverse polishing process is further improved, where the reverse polishing process includes a first grinding stage and a second grinding stage that are sequentially performed, a duration of the first grinding stage is a first duration, and a duration of the second grinding stage is a second duration.
The first duration in this embodiment is determined according to the maximum depth of the uncleanable defect, and the first duration is linearly and positively correlated with the maximum depth, that is, the larger the maximum depth of the uncleanable defect is, the longer the first duration is, that is, the longer the polishing time in the first polishing stage is.
While the first grinding stage described above is primarily intended to eliminate or reduce the presence of non-washable defects, it should be understood that after the first grinding stage is completed, the non-washable defects may or may not be completely eliminated, and the effect of the non-eliminated non-washable defects on product performance has been reduced to an acceptable level.
Furthermore, the target wafer is ground in the second stage, and the second stage grinding process is mainly used for improving the uniformity of the overall flatness of the target wafer.
In some embodiments, the second length of time is less than the first length of time, and the sum of the first length of time and the second length of time is greater than the lapping time of the polishing process. In some embodiments, the second grinding stage has a grinding speed less than the first grinding stage, and the second grinding stage has a grinding speed greater than the polishing process.
By arranging the reverse polishing process comprising the first grinding stage and the second grinding stage, the treatment effect on the uncleanable defects can be improved, and the quality of products is improved.
In some embodiments, the performing a reverse polishing process on the target silicon wafer includes:
carrying out first-stage grinding on the target silicon wafer by using first grinding fluid;
recovering the first grinding liquid, and diluting the first grinding liquid into a second grinding liquid;
and carrying out second-stage grinding on the target silicon wafer by using the second grinding liquid, wherein the concentration of the second grinding liquid is greater than that of the grinding liquid used in the polishing process.
In the back-polishing process in this embodiment, the concentration of the polishing slurry used is greater than that used in the polishing process, so as to improve the polishing effect on the target silicon wafer. The first polishing stage is mainly used for removing the uncleanable defect, so that the concentration of the used first polishing solution is relatively higher.
And in the next second grinding stage, recovering and diluting the first grinding fluid to obtain a second grinding fluid. Because the concentration of the second grinding liquid is lower than that of the first grinding liquid but higher than that of the grinding liquid used in the polishing process after dilution, the effect of eliminating the uncleanable defect in the reverse polishing process is improved, and meanwhile, the grinding liquid is saved.
In some embodiments, the detecting a second defect parameter of a non-cleanable one of the localized light scattering defects comprises:
detecting the number of uncleanable defects of the target silicon wafer;
and calculating the ratio of the number of the uncleanable defects to the number of the local light scattering defects, and taking the ratio as the second defect parameter.
In practice, the number of non-erasable defects may be counted and compared to a set number threshold to determine whether to mark the target wafer as a wafer to be reverse polished. In other embodiments, a corresponding ratio threshold is set as the second defect parameter according to the ratio of the non-cleanable defects to the total number of the local light scattering defects.
In some embodiments, the second defect threshold is not less than 50%, and in particular, the second defect threshold is set to a factor between 50% and 100%, for example, it may be a different value such as 55%, 60%, 70%, etc.
It will be appreciated that during rework of the wafer, it is relatively easy to eliminate relatively less critical defects, i.e., defects other than uncleanable defects, from the light scattering defects.
When the number of the local light scattering defects is certain, the proportion of the uncleanable defects is low, a large proportion of the local light scattering defects can be removed through a backwashing process, and therefore the number of the remaining local light scattering defects is small. And if the proportion of the uncleanable defects in the local light scattering defects is high, enough local light scattering defects cannot be removed through the back cleaning process. Therefore, the ratio of the number of uncleanable defects to the number of total local light scattering defects is used as the second defect parameter in this embodiment.
In one embodiment, the target silicon wafer is marked as a silicon wafer to be back-cleaned if the second defect parameter is not greater than the second defect threshold.
In one embodiment, the second defect threshold is set to 70%. When the second defect parameter is less than 70%, for example, 50%, it indicates that the target silicon wafer can be processed by the back-cleaning process to meet the defect requirement of the product, that is, at this time, the target silicon wafer is marked as a silicon wafer to be back-cleaned, in other words, the target silicon wafer can be back-cleaned by the back-cleaning process to meet the use requirement, which is helpful to save rework cost.
When the second defect parameter is 80%, it means that the target silicon wafer has more defects remained even if it is processed by the back-cleaning process, and thus, the target silicon wafer is difficult to meet the requirements for products. In this embodiment, the target silicon wafer is marked as a silicon wafer to be inversely polished, and then the target silicon wafer is further processed by using an inverse polishing process, so that the target silicon wafer meets the use requirement.
The embodiment of the invention provides a silicon wafer which is obtained by processing through the silicon wafer processing method in any one of the first aspect.
Since this embodiment includes all technical solutions of the above silicon wafer processing method embodiment, at least all technical effects can be achieved, and details are not described here.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A silicon wafer processing method is characterized by comprising the following steps:
detecting a first defect parameter of a local light scattering defect of a target silicon wafer;
detecting a second defect parameter of an uncleanable defect in the local light scattering defects under the condition that the first defect parameter is larger than a first defect threshold value;
and under the condition that the second defect parameter is larger than a second defect threshold value, marking the target silicon wafer as a silicon wafer to be inversely polished.
2. The method of claim 1, wherein after marking the target wafer as a wafer to be reverse polished, further comprising:
and carrying out reverse polishing process treatment on the target silicon wafer, wherein the target silicon wafer is obtained through a polishing process, the reverse polishing process and the polishing process have different process parameters, and the process parameters comprise one or more of grinding time, concentration of used grinding fluid and grinding speed.
3. The method of claim 2, wherein the lapping time of the back-polishing process is greater than the lapping time of the polishing process; and/or
The concentration of the grinding fluid of the reverse polishing process is greater than that of the grinding fluid of the polishing process; and/or
The grinding speed of the reverse polishing process is greater than that of the polishing process.
4. The method of claim 2, wherein the reverse polishing process comprises a first grinding stage and a second grinding stage performed sequentially, the first grinding stage having a duration of a first duration and the second grinding stage having a duration of a second duration;
before the target silicon wafer is subjected to the reverse polishing process, the method comprises the following steps:
detecting the maximum depth of the uncleanable defect on the target silicon wafer;
determining the first duration from the maximum depth, wherein the first duration is linearly positively correlated with maximum depth.
5. The method of claim 4, wherein the second time period is less than the first time period, and the sum of the first time period and the second time period is greater than a lapping time of the polishing process.
6. The method of claim 4, wherein the second grinding stage has a grinding speed less than the first grinding stage, and wherein the second grinding stage has a grinding speed greater than the polishing process.
7. The method as claimed in claim 4, wherein the subjecting the target silicon wafer to a reverse polishing process comprises:
carrying out first-stage grinding on the target silicon wafer by using first grinding fluid;
recovering the first grinding liquid, and diluting the first grinding liquid into a second grinding liquid;
and carrying out second-stage grinding on the target silicon wafer by using the second grinding liquid, wherein the concentration of the second grinding liquid is greater than that of the grinding liquid used in the polishing process.
8. The method of claim 1, wherein said detecting a second defect parameter of a non-cleanable one of said localized light scattering defects comprises:
detecting the number of uncleanable defects of the target silicon wafer;
and calculating the ratio of the number of the uncleanable defects to the number of the local light scattering defects, and taking the ratio as the second defect parameter.
9. The method of claim 8, wherein the second defect threshold is not less than 50%.
10. A silicon wafer obtained by the silicon wafer treatment method according to any one of claims 1 to 9.
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| US6012966A (en) * | 1996-05-10 | 2000-01-11 | Canon Kabushiki Kaisha | Precision polishing apparatus with detecting means |
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| US20150364387A1 (en) * | 2014-06-13 | 2015-12-17 | Moon-Gi Cho | Wafer polishing method |
| CN106461581A (en) * | 2014-05-15 | 2017-02-22 | 科磊股份有限公司 | Defect sampling for electron beam review based on defect attributes from optical inspection and optical review |
| CN111052330A (en) * | 2017-09-06 | 2020-04-21 | 信越半导体株式会社 | Method for evaluating silicon wafer and method for manufacturing silicon wafer |
| US20200203233A1 (en) * | 2017-09-06 | 2020-06-25 | Shin-Etsu Handotai Co., Ltd. | Method for evaluating silicon wafer and method for manufacturing silicon wafer |
-
2020
- 2020-11-13 CN CN202011266352.3A patent/CN112420539A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6012966A (en) * | 1996-05-10 | 2000-01-11 | Canon Kabushiki Kaisha | Precision polishing apparatus with detecting means |
| KR20050050189A (en) * | 2003-11-25 | 2005-05-31 | 동부아남반도체 주식회사 | Cmp apparatus for detecting scratch of the wafer and control method thereof |
| CN106461581A (en) * | 2014-05-15 | 2017-02-22 | 科磊股份有限公司 | Defect sampling for electron beam review based on defect attributes from optical inspection and optical review |
| US20150364387A1 (en) * | 2014-06-13 | 2015-12-17 | Moon-Gi Cho | Wafer polishing method |
| CN111052330A (en) * | 2017-09-06 | 2020-04-21 | 信越半导体株式会社 | Method for evaluating silicon wafer and method for manufacturing silicon wafer |
| US20200203233A1 (en) * | 2017-09-06 | 2020-06-25 | Shin-Etsu Handotai Co., Ltd. | Method for evaluating silicon wafer and method for manufacturing silicon wafer |
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