CN112418429B - Method and system for realizing CZ door - Google Patents
Method and system for realizing CZ door Download PDFInfo
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Abstract
A method and system for implementing a CZ gate, comprising: s1, preparing single quantum state or superposition state of multiple quantum states of |00>,01>, |10>, |11> on two quantum bits, wherein at least one quantum bit of the two quantum bits is provided with a Z line; s2, defining a waveform function, and generating a voltage signal according to the waveform function, wherein the voltage signal is a voltage signal which enables quantum state |11> and quantum state |20> in two quantum bits to be aligned so as to realize exchange probability of quantum state |11> and quantum state |20 >; s3, loading a voltage signal onto a Z line, so that quantum state |11 in two quantum bits is larger than accumulated phase pi, and realizing a CZ gate; s4, measuring the fidelity of the CZ gate, and adjusting the coefficient defining the waveform function according to the measurement result to adjust the fidelity of the CZ gate to be above a preset value. The method can realize CZ gate with fidelity over 99.5%, and the waveform function definition method can improve the working efficiency of the quantum bit, thereby realizing large-scale quantum computation.
Description
Technical Field
The invention relates to the field of quantum computers, in particular to a method and a system for realizing a CZ door.
Background
The core of a quantum computing processor is a qubit. The performance of the processor is reflected in both the number of qubits and the performance of the qubits. The indicators of qubit performance are the fidelity of a single bit gate and the fidelity of a two bit gate. Among the various two-bit gate operations, CZ gates are one of particular importance. All qubit gate operations can be implemented with a combination of single bit gates and two bit CZ gates. In a practical qubit system, implementing a high fidelity CZ gate is one of the most important measurement control techniques. Therefore, it is particularly important to provide a method for implementing a high fidelity CZ gate.
Disclosure of Invention
First, the technical problem to be solved
Aiming at the technical problems, the invention provides a method and a system for realizing a CZ door, which are used for realizing the CZ door with the fidelity higher than 99%.
(II) technical scheme
In one aspect, the invention provides a method for implementing a CZ gate, comprising: s1, preparing two quantum bits, wherein at least one quantum bit in the two quantum bits is provided with a Z line; s2, defining a waveform function, and generating a voltage signal according to the waveform function, wherein the voltage signal is a voltage signal which enables quantum state |11> and quantum state |20> in two quantum bits to be aligned so as to realize exchange probability of the quantum state |11> and the quantum state |20 >; s3, loading a voltage signal onto the Z line, and enabling quantum state |11> in the two quantum bits to accumulate phase pi to realize a CZ gate.
Optionally, in step S2, defining the waveform function includes: the waveform function is defined in terms of coefficients of the low frequency term and the double frequency term of the fourier function.
Optionally, the waveform function is defined by selecting coefficients of low frequency terms having no more than 5 terms and coefficients of low frequency terms and double frequency terms having no more than 10 total terms.
Optionally, in step S1, a single quantum state of the four quantum states or an superposition of multiple quantum states is prepared on the two qubits |00>,01>, |10>, |11 >.
Optionally, the voltage signal is filtered by a low pass filter and then loaded onto the Z line.
Optionally, after step S3, the method includes: s4, measuring the fidelity of the CZ gate, and adjusting the coefficient defining the waveform function according to the measurement result, so as to adjust the fidelity of the CZ gate to be above a preset value.
Another aspect of the invention provides a system for implementing a CZ door, comprising: the quantum bit system comprises two quantum bits, wherein at least one quantum bit in the two quantum bits is provided with a Z line, and the two quantum bits are provided with a single quantum state of four quantum states or a superposition state of a plurality of quantum states, i 00, 01, 10 and 11; and the signal generator is used for outputting a voltage signal to the Z line according to the waveform function, so that the quantum state |11> in the two quantum bits accumulates the phase pi to realize the CZ gate, wherein the voltage signal is used for aligning the energy levels of the quantum state |11> and the quantum state |20> in the two quantum bits to realize the exchange probability of the quantum state |11> and the quantum state |20 >.
Optionally, the signal generator outputs the voltage signal according to a waveform function defined by coefficients of a low frequency term and a double frequency term of the fourier function.
Optionally, coefficients of low frequency terms having a waveform function selection term number not exceeding 5 and coefficients of low frequency terms and double frequency terms having a total term number not exceeding 10 are defined.
Optionally, the system for implementing a CZ gate further comprises: and the low-pass filter is connected with the Z line and is used for filtering the voltage signal and loading the voltage signal on the Z line.
(III) beneficial effects
The invention provides a method and a system for realizing a CZ door, which have the beneficial effects that:
the method adopts a quantum two-bit system with a Z line for preparing at least one quantum bit of a single quantum state or a superposition state of a plurality of quantum states with |00>,01>, |10>, and|11 > of four quantum states, and rapidly defines a waveform function according to the coefficients of a low-frequency item and a double-frequency item of a Fourier function to generate a voltage signal to be loaded on the Z line, so that the quantum state|11 > in the two quantum bits accumulates phase pi, and a CZ gate with the fidelity of more than 99% can be realized. The method for defining the waveform function can improve the time efficiency of realizing the CZ gate by the waveform, namely shorten the time for realizing the CZ gate and realize large-scale quantum computation.
Drawings
FIG. 1 schematically illustrates a flow chart of a method of implementing a CZ gate in accordance with an embodiment of the present invention.
Fig. 2 schematically shows a graph of the quantization energy level of two qubits as a function of the Z-line according to an embodiment of the present invention.
Fig. 3 schematically shows a graph of probability of two qubits being in an energy eigenstate over time in an embodiment of the invention.
Fig. 4 schematically shows a graph of the evolution path of a quantum state of two qubits on a bloch sphere according to an embodiment of the invention.
Fig. 5 schematically shows a waveform diagram defining a waveform function according to an embodiment of the present invention.
FIG. 6 schematically illustrates a pulse sequence diagram for measuring CZ gate fidelity in accordance with an embodiment of the present invention
Fig. 7 schematically shows an optimization process diagram after coefficient trimming when 6 coefficients are adopted in the embodiment of the invention.
FIG. 8 schematically illustrates a process diagram for CZ gate optimization during coefficient trimming in accordance with an embodiment of the present invention.
Fig. 9 schematically shows a waveform diagram of a waveform function after coefficient optimization according to an embodiment of the present invention.
FIG. 10 schematically illustrates a graph of the actual effect of measured CZ gate fidelity achieved by the method provided by embodiments of the present invention.
Detailed Description
The present invention will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent.
The embodiment of the invention provides a method for realizing a CZ gate, wherein the fidelity of the CZ gate is more than 99 percent, as shown in figure 1, the method comprises the following steps:
s1, preparing two qubits, wherein at least one of the two qubits is provided with a Z line.
To implement a CZ gate, bits having XY and Z line structures may be employed. Wherein the XY line is such that microwave photons can be provided. The Z-line can change the energy level of the qubit (i.e., the optimal frequency at which photons can be absorbed). For CZ gate operation, at least one bit is required to have a Z line. In the above operation S1, a single quantum state of four quantum states or a superposition state of a plurality of quantum states of |00>,01>, |10>, |11> are prepared on two qubits, at least one of which is provided with a Z line.
S2, defining a waveform function, and generating a voltage signal according to the waveform function, wherein the voltage signal is a voltage signal which enables quantum state |11> and quantum state |20> in two quantum bits to be aligned so as to realize exchange probability of the quantum state |11> and the quantum state |20 >.
To implement the CZ gate, the two qubits prepared in step S1 need to undergo non-adiabatic evolution, as shown in fig. 2, the address state low and the address state high represent the high-energy eigenstates and the low-energy eigenstates formed by the two quantum states participating in the interaction. Non-adiabatic evolution refers to the fact that the quantum system is always in the eigenstate when the voltage signal applied to the Z-line changes slowly enough to the energy level. In one embodiment of the present invention, to implement a CZ gate, a voltage signal corresponding to that shown in fig. 3 is applied to the Z line. The quantum system will now undergo a non-adiabatic process, i.e. the quantum state will proceed from the 11> state along the dashed line. If a proper voltage signal can be applied to the Z line, the quantum state performs quantum evolution near the intersection of two dotted lines, and a pi phase is obtained, and the evolution path of the 11 quantum state on the Buroche sphere is shown in figure 4.
In one embodiment of the invention, the waveform function is defined according to the coefficients of the low-frequency term and the double-frequency term of the Fourier function, the coefficients of the low-frequency term with the number of terms not exceeding 5 and the coefficients of the low-frequency term and the double-frequency term with the total number of terms not exceeding 10 are selected to define the waveform function, so that the voltage signal output by the signal generator according to the waveform function is the proper voltage signal, the two quantum bits can be subjected to non-adiabatic evolution, the energy levels of the quantum state |11> and the quantum state |20> in the two quantum bits are aligned, the energy levels of the quantum state |11> and the quantum state |20> pass through the alignment points for a plurality of times, the quantum state |11> and the quantum state |20> are exchanged, the quantum state accumulated phase pi of the |11> is realized, and the CZ gate is realized. The waveform of the defined waveform function is shown in fig. 5, and the probability of two qubits being in the energy eigenstate is changed with time as shown in fig. 3. The coefficients may be any number, and may be complex numbers within 10 without loss of generality. The method for defining the waveform function can improve the time efficiency of realizing the CZ gate by the waveform and realize large-scale quantum computation.
S3, loading a voltage signal onto the Z line, and enabling quantum state |11> in the two quantum bits to accumulate phase pi to realize a CZ gate.
In the above operation S3, when the signal generator outputs the voltage signal according to the defined waveform function, the voltage signal is filtered by the low-pass filter and then loaded onto the Z line, at this time, the quantum state |11> in the two quantum bits accumulates the phase pi, while the other quantum states are not affected, so as to return the bits to the original working point, where the original working point is a voltage value corresponding to the bit frequency equal to the idle and the single-bit gate time frequency, to implement the CZ gate.
S4, measuring the fidelity of the CZ gate, and adjusting the coefficient defining the waveform function according to the measurement result, so as to adjust the fidelity of the CZ gate to be above a preset value.
The fidelity of the CZ gate is measured by using the pulse sequence shown in fig. 6, the coefficients defining the waveform function are finely tuned by using the expected effect shown in fig. 7 and 8 according to the measurement result, the waveform function is optimized until the CZ fidelity reaches the expected value, the value of 1 or several parameters can be finely tuned, the final result of the optimized waveform function is shown in fig. 9, and the length of the waveform function in fig. 9 is 40ns. In a practical physical device, the voltage pulse tends to have rising and falling edges, which in fig. 9 do not affect the effect of the CZ gate.
Fig. 10 is a graph showing the actual effect of the fidelity of the CZ gate realized by the method provided by the embodiment of the invention, and it can be seen from the graph that the fidelity of the CZ gate reaches more than 99.5%.
The embodiment of the invention provides a system for realizing a CZ door, which comprises the following steps:
the quantum bit system comprises two quantum bits, wherein at least one quantum bit in the two quantum bits is provided with a Z line, and the two quantum bits are provided with a single quantum state of four quantum states or an overlapped state of a plurality of quantum states, i 00, 01, 10 and 11.
And the signal generator is used for outputting a voltage signal to the Z line according to the waveform function, so that the quantum state |11> in the two quantum bits accumulates the phase pi to realize the CZ gate, wherein the voltage signal is used for aligning the energy levels of the quantum state |11> and the quantum state |20> in the two quantum bits to realize the exchange probability of the quantum state |11> and the quantum state |20 >. In one embodiment of the invention, the signal generator outputs the voltage signal according to a waveform function defined by coefficients of a low frequency term and a double frequency term of the fourier function. And defining the coefficients of the low frequency terms with the waveform function selection terms not exceeding 5 and the coefficients of the low frequency terms and the double frequency terms with the total terms of the low frequency terms and the double frequency terms not exceeding 10. The signal generator is an arbitrary waveform generator, and in one embodiment of the present invention, the waveform generator is a digital signal generator capable of digital frequency modulation and amplitude modulation.
And the low-pass filter is connected with the Z line and is used for filtering the voltage signal and loading the voltage signal on the Z line.
The actual effect of the measurement of the fidelity of the CZ gate is shown in figure 10, and the fidelity of the CZ gate is over 99.5 percent.
In summary, the invention provides a method and a system for implementing a CZ gate, which adopts a quantum two-bit system having a Z line for preparing at least one quantum bit of a single quantum state or a superposition state of a plurality of quantum states including |00>,01>, |10>, |11>, and four quantum states, and rapidly defines a waveform function according to coefficients of a low frequency term and a double frequency term of a fourier function, and generates a voltage signal to be loaded onto the Z line, so that the |11> of the quantum states in the two quantum bits accumulates a phase pi, thereby implementing the CZ gate with a fidelity of more than 99.5%. The method for defining the waveform function can improve the time efficiency of the waveform to realize the CZ gate and realize the large-scale quantum computation.
While the foregoing is directed to embodiments of the present invention, other and further details of the invention may be had by the present invention, it should be understood that the foregoing description is merely illustrative of the present invention and that no limitations are intended to the scope of the invention, except insofar as modifications, equivalents, improvements or modifications are within the spirit and principles of the invention.
Claims (5)
1. A method of implementing a CZ door, comprising:
s1, preparing two quantum bits, including: preparing a single quantum state of four quantum states or a superposition state of a plurality of quantum states of |00>,01>, |10>, |11> on two quantum bits, wherein at least one quantum bit in the two quantum bits is provided with a Z line;
s2, defining a waveform function, and generating a voltage signal according to the waveform function, wherein the voltage signal is a voltage signal which enables quantum state |11> and quantum state |20> in the two quantum bits to be aligned so as to realize exchange probability of the quantum state |11> and the quantum state |20 >; defining the waveform function includes: defining a waveform function according to coefficients of low frequency terms and double frequency terms of a Fourier function, wherein the waveform function is defined by selecting the coefficients of the low frequency terms with the number of terms not exceeding 5 and the coefficients of the low frequency terms and double frequency terms with the total number of terms of the low frequency terms and the double frequency terms not exceeding 10
S3, loading the voltage signal to the Z line, and enabling quantum state |11> in the two quantum bits to accumulate phase pi to realize a CZ gate.
2. The method of implementing a CZ gate according to claim 1, wherein the voltage signal is filtered by a low pass filter and then loaded onto the Z-line.
3. The method of implementing a CZ door of claim 1, comprising, after step S3:
s4, measuring the fidelity of the CZ gate, and adjusting the coefficient defining the waveform function according to the measurement result, so as to adjust the fidelity of the CZ gate to be above a preset value.
4. A system for implementing a CZ door, comprising:
the quantum bit system comprises two quantum bits, wherein at least one quantum bit in the two quantum bits is provided with a Z line, and the two quantum bits are provided with single quantum states of four quantum states or superposition states of a plurality of quantum states, i 00, 01, 10 and 11;
and the signal generator is used for outputting a voltage signal to the Z line according to a waveform function, so that the quantum state |11> in the two quantum bits accumulates phase pi to realize a CZ gate, wherein the voltage signal is a voltage signal which enables the quantum state |11> in the two quantum bits to be aligned with the quantum state |20> energy level to realize the exchange probability of the quantum state |11> and the quantum state |20>, the signal generator outputs the voltage signal according to the waveform function defined by the coefficients of the low-frequency term and the double-frequency term of the Fourier function, and the waveform function is defined to select the coefficients of the low-frequency term and the double-frequency term, the total number of the low-frequency term and the double-frequency term of which does not exceed 5, and the coefficients of the low-frequency term and the double-frequency term of which does not exceed 10.
5. The CZ door implementing system of claim 4, further comprising:
and the low-pass filter is connected with the Z line and used for filtering the voltage signal and loading the voltage signal onto the Z line.
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