CN112346708A - Method for improving block chain throughput by using zturk low-delay modular square algorithm - Google Patents

Abstract

The technical problem to be solved by the invention is as follows:

the algorithm can realize the modular square operation of 1016-bit integers at most on an 8-bit computer, and cannot realize larger-scale modular square operation required by a block chain. In order to solve the technical problem, the technical scheme of the invention is to provide a novel multifunctional electric heating cooker

A method for improving block chain throughput by a low-delay modular quadratic algorithm. The invention expands

The processing capacity of the algorithm on the 8-bit computer enables the algorithm to meet the requirement of a leader of the block chain on selecting the modular squaring operation. By using the algorithm after the 8-bit superconducting integrated circuit runs and expands, the operation of the VDF can be accelerated, the time for reaching consensus is reduced, and the throughput of a block chain is improved.

Description

Method for improving block chain throughput by low-delay modular square algorithm

Technical Field

The invention relates to a method for

A method for improving block chain throughput by a low-delay modular quadratic algorithm.

Background

In the blockchain consensus protocol, Leader Election (Leader Election) is often used to determine block right and out-of-block reward attribution, and once a workload attestation mechanism (PoW) is employed. Since PoW needs to consume a lot of computing resources and causes environmental pollution, leader election in the blockchain consensus protocol is transitioning from the PoW scheme to a new scheme combining space attestation (PoSpace) and Verifiable Delay Function (VDF). The block links using the new scheme are environmentally friendly, but still face the performance bottleneck of throughput. In order to improve throughput, accelerating the calculation speed of VDF is an urgent problem to be solved.

The Verifiable Delay Function (VDF) is a function in which the computation process cannot be performed in parallel and the computation result can be verified quickly. VDF based on modular exponentiation is currently the most widely used configuration. The core of the VDF structure is a modular exponential operation

mod M, when M is agnostic of prime factorization, can only be implemented by T serial modulo-square operations, but not in parallel. Therefore, constructing an efficient low-latency modular squaring algorithm is key to speeding up such VDF operations.

The Montgomery algorithm is one of the most commonly used modular squaring algorithms at present, but it requires a large amount of additional pre-and post-processing overhead. The Barrett algorithm is more efficient in computing a single modular squaring operation and less efficient in processing multiple modular squaring operations. In addition, neither the Montgomery algorithm nor the Barrett algorithm involve multiplication operations with efficient low-latency hardware implementations.

A practical low-delay modular squaring algorithm is provided, the algorithm expresses a large integer as a polynomial, the length of a Carry Chain (Carry Chain) is greatly reduced by operating the polynomial coefficient, and efficient low-delay multiplication is realized; the modular operation is realized by table look-up, and the serial modular smoothing method is suitable for executing serial modular smoothing required by VDFAnd (6) square operation.

The actual speed of VDF calculation depends not only on the algorithm employed, but also on the machine performance. Compared with a semiconductor integrated circuit, the superconducting integrated circuit with the single-core processing frequency up to 50GHz has the advantages of higher running speed, shorter time delay and lower power consumption, and has great significance for improving the calculation speed of the VDF. In the initial stage of the development of the superconducting integrated circuit, the realization of arithmetic operation as low as 8 bits is an important stage achievement due to the limitation of the superconducting integrated process. The realization of VDF operation on an 8-bit superconducting integrated circuit has important application value.

Disclosure of Invention

The technical problem to be solved by the invention is as follows:

the algorithm can realize the modular square operation of 1016-bit integers at most on an 8-bit computer, and cannot realize larger-scale modular square operation required by a block chain.

In order to solve the technical problem, the technical scheme of the invention is to provide a novel multifunctional electric heating cooker

The method for improving the throughput of the block chain by the low-delay modular squaring algorithm is characterized by comprising the following steps of:

step 1, each miner on a block chain generates a space certificate from a plurality of spaces owned by each miner; one space corresponds to one space certificate, and the space certificate quantity of miners is equal to the space quantity owned by the miners;

step 2, inputting the respective space certificate into a uniform hash function H (-) by each miner, and calculating to respectively obtain a hash value corresponding to each space certificate;

step 3, taking the minimum value T from the hash values of the owned space certificates by each miner_zPerforming modular exponentiation

mod M where a represents the input, mod represents the modulo operation, and M represents the modulus;

fastest completion of modular exponentiation

The miners at mod M become leaders, win the block right and reward;

each miner performs modular exponentiation

mod M, continuous T on 8-bit superconducting IC_zSub-serial operation modulo square a²mod M, then any miners run the modulo quadratic operation a once per time²mod M includes the following steps:

step 301, the large integer a participating in the multiplication operation is expressed into a corresponding polynomial form, which includes:

a＝a₀r⁰+a₁r¹+a₂r²+…+a_Ir^I (1)

in the formula (1), the unknown number of the r polynomial is the base number of the computer; the index of r is defined as the weight;

in step 302, if the factor a is a and the factor B is a, the following formulas (2) and (3) are provided:

A＝A₀r⁰+A₁r¹+A₂r²+…+A_Ir^I (2)

B＝B₀r⁰+B₁r¹+B₂r²+…+B_Ir^I (3)

coefficient A in formula (2)_iAnd the coefficient B in the formula (3)_jThe number of bits of (c) is d +2, d is 8, I belongs to [0, I ∈ [ ]]， j∈[0,I]；

Step 303, calculate the coefficient A_iAnd coefficient B_jMultiplying to obtain T_ij＝A_i·B_j，T_ijThe number of bits of (d) is 2d + 4;

step 304, adding T_ijIs divided into three blocks, which are expressed as (T)_ij2,T_ij1,T_ij0) Wherein, T_ij0And T_ij1The number of bits of (1) is d, T_ij2The number of bits of (a) is 4;

will (T)_ij2,T_ij1,T_ij0) Is described as (T)_k2,T_k1,T_k0)，k∈[0,(I+1)²]Will have T of the same weight_k2、T_k1、T_k0Add to obtain D_t，t∈[0,2(I+1)]，D_tHas a bit number of 3D, D_tIs divided into three blocks, which are expressed as (D)_t2,D_t1,D_t0)，D_t2、D_t1、D_t0The number of bits is d;

step 305, D with the same weight_t2、D_t1、D_t0Add to obtain C_tMixing C with_tObtaining a polynomial representing a multiplication result C obtained by multiplying the factor A by the factor B as a coefficient;

step 306, expressing the modulus M as a polynomial, and obtaining the highest weight M of the polynomial;

step 307, obtaining all weights greater than the highest weight M in the polynomial of the multiplication result C obtained in step 305, calculating a modulo operation result of a modulus M corresponding to each weight, then expressing the calculation result as the polynomial, and storing coefficients of the polynomial;

step 308, for each weight of which the multiplication result C obtained in step 305 is greater than the highest weight of the modulus M, inquiring the coefficients of the weight stored in step 307 in the modulus operation result of the corresponding weight, and for all the inquired coefficients, adding the coefficients of the same weight to obtain D_v，D_vHas a bit number of 3d, v ∈ [0, m ]]；

Step 309, compare D_vIs divided into three blocks, denoted as D_v＝(D_v2,D_v1,D_v0)，D_v2、D_v1、D_v0The number of bits of (1) is D, and D with the same weight_v2,D_v1,D_v0Add to give Res_u，u∈[0,m+2]；

Step 310, Res is added_uObtaining a polynomial as a coefficient, the polynomial representing a large integer as a next modular squaring operation a²Input a in mod M.

Preferably, in step 307, if any one of the polynomials in the multiplication result C that is greater than the highest weight m is defined as w, then:

the result of calculating the weight w corresponding to the modulus M is L, L ═ s · r^wmod M, where s is the traversal coefficient interval [0,2^d+2-1]And expressing the calculation result L as a polynomial in the form of:

storing coefficients L of polynomials_l。

The invention expands

The processing capacity of the algorithm on the 8-bit computer enables the algorithm to meet the requirement of a leader of the block chain on selecting the modular squaring operation. By using the algorithm after the 8-bit superconducting integrated circuit runs and expands, the operation of the VDF can be accelerated, the time for reaching consensus is reduced, and the throughput of a block chain is improved.

Drawings

FIG. 1 illustrates the coefficient A_i,B_jProduct of (A) T_ijHow to add according to the weight to obtain D_t；

FIG. 2 illustrates how D is adjusted_tAdding according to the weight to obtain C_t；

FIG. 3 illustrates how coefficients C may be queried_tPerforming modulo operation on the result corresponding to the weight and adding the results according to the weight to obtain D_vCorresponding to the situation shown in fig. 2;

FIG. 4 illustrates how the coefficient C is queried in another case than that shown in FIG. 3_tPerforming modulo operation on the result corresponding to the weight and adding the results according to the weight to obtain D_v；

FIG. 5 illustrates how D is adjusted_vAdd according to the weight to get Res_uCorresponding to the situation shown in fig. 4.

Detailed Description

The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.

The invention provides a method for

The method for improving the throughput of the block chain by the low-delay modular squaring algorithm comprises the following steps:

step 1, each miner M on the block chain₁,…,M_pFrom respectively owned s₁,…,s_nGenerating spatial proofs ps in space₁,…,ps_n；

Step 2, each miner proves the respective space ps₁,…,ps_nInputting a uniform hash function H (-) and calculating to obtain corresponding n hash values H (ps)₁),…,H(ps_n)；

Step 3, each miner uses n hash values H (ps)₁),…,H(ps_n) Take the minimum value T_z＝2²⁰Performing modular exponentiation

mod M where a represents the input, mod represents the modulo operation, and M represents the modulus;

in this embodiment:

a＝24962743716270738850186870770798503430604591768649693001283 92674297814219386094552430442942032815516773302870103484710974 43578584158231323388210160706364556180659930044663144504819686 12260164627324337446836017723156221439790409391707069546229498 24100955660109265468820780799848410214509680693031924170697071 85588147369575617939094205594972332667704640975564883743117028 59483198091589116755867278611649931899448024409614927449975145 81812081423160261417967490758044526602811690958060478772330835 80543569151302891852074034982277456709187636506346226340228234 61803235879111193218846795663771228812038161174756075561046023

M＝27753518966756833043310696658680489011063642864067473991324150898386466958471768596164596493433277993392527742250625431044493065910052020199538067630453415235559298916231325819462445717277295524847868588751980799634715333666195052388189052062280926439638833711206164705291841660581623493606991585908254321280667487377443515229326260998427734322647085082804753009205406425944676994048399934815311525895043560986701162730869838266387447976468713239075912661738304981310188255059572154024529437810282388575978080680135343845379552565264224050689423622788304232123385662662599376345478981783857431670519061413837777695409 modular exponentiation is performed by each miner

mod M, continuous T on 8-bit superconducting IC_zSub-serial operation modulo square a²modM, then any miners run the modulo quadratic operation a once per time²mod M includes the following steps:

step 301, the large integer a participating in the multiplication operation is expressed into a corresponding polynomial form, which includes:

a＝a₀r⁰+a₁r¹+a₂r²+…+a_Ir^I (1)

in the formula (1), the unknown number of the r polynomial is the base number of the computer; the exponent of r is defined as the weight, and when the number of bits d of a computer word is 8 (i.e., in 8-bit computers), the base is r 2^d＝2⁸＝256；

In step 302, if the factor a is a and the factor B is a, the following formulas (2) and (3) are provided:

A＝A₀r⁰+A₁r¹+A₂r²+…+A_Ir^I (2)

B＝B₀r⁰+B₁r¹+B₂r²+…+B_Ir^I (3)

coefficient A in formula (2)_iAnd the coefficient B in the formula (3)_jThe number of bits of (a) is d +2, d ═ d8，i∈[0,I]， j∈[0,I]；

Step 303, calculate the coefficient A_iAnd coefficient B_jMultiplying to obtain T_ij＝A_i·B_j，T_ijThe number of bits of (d) is 2d + 4;

step 304, adding T_ijIs divided into three blocks, which are expressed as (T)_ij2,T_ij1,T_ij0) Wherein, T_ij0And T_ij1The number of bits of (1) is d, T_ij2The number of bits of (a) is 4;

will (T)_ij2,T_ij1,T_ij0) Is described as (T)_k2,T_k1,T_k0)，k∈[0,(I+1)²]Will have T of the same weight_k2、 T_k1、T_k0Add to obtain D_t，t∈[0,2(I+1)]，D_tHas a bit number of 3D, D_tIs divided into three blocks, which are expressed as (D)_t2,D_t1,D_t0)，D_t2、D_t1、D_t0The number of bits is d;

step 305, D with the same weight_t2、D_t1、D_t0Add to obtain C_tMixing C with_tObtaining a polynomial representing a multiplication result C obtained by multiplying the factor A by the factor B as a coefficient;

from FIG. 1, D can be seen_2(I+1)Only the low D bits have data, D_2I+1Only the lower 2d bits have data. In fig. 2, only the positions with data need to be added; c_tA sum of at most 3d bits, d +2 bits, and A_i,B_jKeeping consistent;

step 306, expressing the modulus M as a polynomial, and obtaining the highest weight M of the polynomial;

step 307, obtaining all weights greater than the highest weight M in the polynomial of the multiplication result C obtained in step 305, calculating a modulo operation result of a modulus M corresponding to each weight, then expressing the calculation result as the polynomial, and storing coefficients of the polynomial;

defining any weight in the polynomial of the multiplication result C larger than the highest weight m as w, then:

calculating the weight w corresponding to the node of the modulus MThe fruit is L, L is s r^wmod M, where s is the traversal coefficient interval [0,2^d+2-1]And expressing the calculation result L as a polynomial in the form of:

storing coefficients L of polynomials_l；

Step 308, for each weight of which the multiplication result C obtained in step 305 is greater than the highest weight of the modulus M, inquiring the coefficients of the weight stored in step 307 in the modulus operation result of the corresponding weight, and for all the inquired coefficients, adding the coefficients of the same weight to obtain D_v，D_vHas a bit number of 3d, v ∈ [0, m ]]；

As shown in fig. 3, the coefficient C is queried_tThe result of the modulo operation at the corresponding weight w is denoted as LUT (w, C)_t)， t∈(m,2(I+1)]；

Step 309, compare D_vIs divided into three blocks, denoted as D_v＝(D_v2,D_v1,D_v0)，D_v2、D_v1、D_v0The number of bits of (1) is D, and D with the same weight_v2,D_v1,D_v0Add to give Res_u，u∈[0,m+2]；

Res_uA sum of at most 3d bits, d +2 bits, and A_i、B_jKeeping consistent;

step 310, Res is added_uObtaining a polynomial as a coefficient, the polynomial representing a large integer as a next modular squaring operation a²Input a in mod M.

Fastest completion of modular exponentiation

Becomes a leader, wins the block right and awards the block.

When parameter T_z＝2²⁰I.e. carry out 2 serially²⁰The result of the submodular squaring operation is a large integer

93131168495806433794105952058146804125683044998940633368482405 94238761348112981208109457665428144239123743847857353972270749 71310831553935642149432317642476278889018182023847960487843904 02164051540535519582198541484494041664789150917896927364210510 32032088130019592046315604223922634160792816890607827492823029 35213638990615389059671204133624462412439674733457626719331091 50503119918706220094874496129033060643689091621244558639683312 36076418409624917633094632604225698534288877297409743792410626 3981159186607520956600654091879692273741517121439260660067328 30524940136272640331045853468337872108295009808751649707659 。

Claims (2)

1. One kind is used

The method for improving the throughput of the block chain by the low-delay modular squaring algorithm is characterized by comprising the following steps of:

step 1, each miner on a block chain generates a space certificate from a plurality of spaces owned by each miner; one space corresponds to one space certificate, and the space certificate quantity of miners is equal to the space quantity owned by the miners;

step 2, inputting the respective space certificate into a uniform hash function H (-) by each miner, and calculating to respectively obtain a hash value corresponding to each space certificate;

step 3, taking the minimum value T from the hash values of the owned space certificates by each miner_zPerforming modular exponentiation

Wherein a represents the input, mod represents the modulo operation, and M represents the modulus;

fastest completion of modular exponentiation

The miners become the leaders and win the block right and the block reward;

each miner performs modular exponentiation

Continuous T on 8-bit superconducting integrated circuit_zSub-serial operation modulo square a²mod M, then any miners run the modulo quadratic operation a once per time²mod M includes the following steps:

step 301, the large integer a participating in the multiplication operation is expressed into a corresponding polynomial form, which includes:

a＝a₀r⁰+a₁r¹+a₂r²+…+a_Ir^I (1)

in the formula (1), the unknown number of the r polynomial is the base number of the computer; the index of r is defined as the weight;

in step 302, if the factor a is a and the factor B is a, the following formulas (2) and (3) are provided:

A＝A₀r⁰+A₁r¹+A₂r²+…+A_Ir^I (2)

B＝B₀r⁰+B₁r¹+B₂r²+…+B_Ir^I (3)

coefficient A in formula (2)_iAnd the coefficient B in the formula (3)_jThe number of bits of (c) is d +2, d is 8, I belongs to [0, I ∈ [ ]]，j∈[0，I]；

Step 303, calculate the coefficient A_iAnd coefficient B_jMultiplying to obtain T_ij＝A_i·B_j，T_ijThe number of bits of (d) is 2d + 4;

step 304, adding T_ijIs divided into three blocks, which are expressed as (T)_ij2，T_ij1，T_ij0) Wherein, T_ij0And T_ij1The number of bits of (1) is d, T_ij2The number of bits of (a) is 4;

will (T)_ij2，T_ij1，T_ij0) Is described as (T)_k2，T_k1，T_k0)，k∈[0，(I+1)²]Will have T of the same weight_k2、T_k1、T_k0Add to obtain D_t，t∈[0，2(I+1)]，D_tHas a bit number of 3D, D_tIs divided into three blocks which are represented as (D_t2，D_t1，D_t0)，D_t2、D_t1、D_t0The number of bits is d;

step 305, D with the same weight_t2、D_t1、D_t0Add to obtain C_tMixing C with_tObtaining a polynomial representing a multiplication result C obtained by multiplying the factor A by the factor B as a coefficient;

step 306, expressing the modulus M as a polynomial, and obtaining the highest weight M of the polynomial;

step 307, obtaining all weights greater than the highest weight M in the polynomial of the multiplication result C obtained in step 305, calculating a modulo operation result of a modulus M corresponding to each weight, then expressing the calculation result as the polynomial, and storing coefficients of the polynomial;

step 308, for each weight of which the multiplication result C obtained in step 305 is greater than the highest weight of the modulus M, inquiring the coefficients of the weight stored in step 307 in the modulus operation result of the corresponding weight, and for all the inquired coefficients, adding the coefficients of the same weight to obtain D_v，D_vHas a bit number of 3d, v ∈ [0, m ]]；

Step 309, compare D_vIs divided into three blocks, denoted as D_v＝(D_v2，D_v1，D_v0)，D_v2、D_v1、D_v0The number of bits of (1) is D, and D with the same weight_v2，D_v1，D_v0Add to give Res_u，u∈[0，m+2]；

Step 310, Res is added_uObtaining a polynomial as a coefficient, the polynomial representing a large integer as a next modular squaring operation a²Input a in mod M.

2. An application as in claim 1

The method for improving the throughput of the block chain by the low-latency modular squaring algorithm is characterized in that in step 307, the weight of any polynomial of the multiplication result C which is larger than the highest weight m is defined asw, then:

the result of calculating the weight w corresponding to the modulus M is L, L ═ s · r^wmod M, where s is the traversal coefficient interval [0,2^d+2-1]And expressing the calculation result L as a polynomial in the form of:

storing coefficients L of polynomials_l。

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