CN112346665B - PCIE-based communication method, device, equipment, system and storage medium - Google Patents

PCIE-based communication method, device, equipment, system and storage medium Download PDF

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CN112346665B
CN112346665B CN202011375136.2A CN202011375136A CN112346665B CN 112346665 B CN112346665 B CN 112346665B CN 202011375136 A CN202011375136 A CN 202011375136A CN 112346665 B CN112346665 B CN 112346665B
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data
command
area
host
hard disk
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CN112346665A (en
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吴剑锋
徐晓玉
王付军
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Sage Microelectronics Corp
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Sage Microelectronics Corp
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

The invention discloses a communication method based on PCIE, wherein a hard disk controller of a solid state disk is provided with a configuration register, and a mapping memory space of a base address register in the configuration register is used as a data communication area; the communication method comprises the following steps: the host writes command data to the data communication area of the hard disk controller, the hard disk controller reads the command data from the data communication area to process, and writes the processed response data to the data communication area to read the response data by the host and process. Therefore, the scheme realizes communication between the host and the hard disk controller based on the existing PCIE channel, the transmission rate can reach the limit speed of PCIE bandwidth, and the data transmission efficiency is improved; in addition, the mode is not limited by a protocol, any command data and any format can be customized, and the data transmission quality is improved. The invention also discloses a communication device, equipment, a system and a storage medium based on PCIE, and the technical effects can be realized.

Description

PCIE-based communication method, device, equipment, system and storage medium
Technical Field
The present invention relates to the field of solid state hard drives, and in particular, to a PCIE-based communication method, apparatus, device, system, and storage medium.
Background
Currently, the solid state disk communication technology mainly includes NVM Express (Non-Volatile Memory Express, non-volatile memory host controller interface specification) protocol based on PCIE (peripheral component interconnect Express, high-speed serial computer expansion bus standard), ATA (Advanced Technology Attachment ) protocol based on SATA (Serial Advanced Technology Attachment, serial advanced technology attachment) protocol, and SCSI (Small Computer System Interface ) protocol. NVM Express is an open collection of standards and information to fully demonstrate the advantages of non-volatile memory in all types of computing environments from mobile devices to data centers. NVM Express is used for register interfaces and command sets for PCI Express add-in storage and industry standard software for a variety of operating systems. Based on NVME protocol, the host can send conventional read-write erase and some standard commands to the hard disk controller chip, so as to achieve the purpose of using the hard disk storage space.
Currently, when a solid state disk is debugged, a debugging technical scheme is a serial port communication (Universal Asynchronous Receiver/Transmitter, UART) protocol. Serial communication refers to the use of a data line to transfer data bit by bit in sequence, each bit of data occupying a fixed length of time. UARTs send data in an asynchronous manner, namely: no clock signal synchronizes the bit output of the transmitting UART with the bit samples of the receiving UART. The host and the controller respectively use two UART modules to send UART and receive UART for communication. The transmitting UART is not a clock signal, but rather adds start and stop bits to the data packet being transmitted. These bits define the beginning and end of the packet so the receiving UART knows when to begin reading the bits. When the receiving UART detects the start bit, it begins to read the input bits at a particular frequency called the baud rate. Baud rate is a measure of the speed of data transmission, expressed in bits per second (bps). Both UARTs must operate at approximately the same baud rate. The baud rate between transmitting and receiving UARTs can only differ by about 10%. Two UARTs must also be configured to send and receive the same packet structure.
It can be seen that the existing communication technology serial port debugging technology: the transmission rate is low, the fastest baud rate is 1228800bps, the transmission speed is only about 0.1MB/s, and the transmission efficiency of large data volume is low in addition to the protocol overhead; the calibration error correction mechanism is behind, when the baud rate is high, the signal quality is poor, and the signal is easy to distort, so that transmission errors are caused; the interface is led out to the shell after the product is made.
Disclosure of Invention
The invention aims to provide a communication method, a device, equipment, a system and a storage medium based on PCIE, so as to improve the data transmission efficiency and quality between a host and a solid state disk.
In order to achieve the above objective, the present invention provides a PCIE-based communication method, where a hard disk controller of a solid state disk has a configuration register, and a mapping memory space of a base address register in the configuration register is used as a data communication area; the communication method comprises the following steps:
writing command data into the data communication area of the hard disk controller by a host computer so that the hard disk controller reads the command data from the data communication area for processing, and writing processed response data into the data communication area;
and the host reads the response data from the data communication area and processes the response data to realize the communication between the host and the solid state disk.
Wherein, the mapping memory space of the base address register 2 and the base address register 3 in the configuration register is used as the data communication area, and the data communication area comprises: a configuration area, a command area, and a data area.
Wherein the host writes command data to the data communication area of the hard disk controller, so that the hard disk controller reads the command data from the data communication area to process, and writes processed response data to the data communication area, comprising:
the host writes command data into a received command list of the command area and modifies a received command pointer of the configuration area; and if the hard disk controller detects that the receiving command pointer of the configuration area changes, reading the command data from the receiving command list, processing the command data, writing the response data generated after the processing into the sending command list of the command area, and modifying the sending command pointer of the configuration area.
Wherein the host reads the response data from the data communication area and processes the response data, and the method comprises the following steps: and if the host detects that the sending command pointer of the configuration area changes, reading the response data from the sending command list and processing the response data.
Wherein the host reads the response data from the data communication area and processes the response data, and the method comprises the following steps: if the command data is a data writing command, the host reads response data carrying a data area starting address from a sending command list of the command area;
writing data into the data area by utilizing the initial address of the data area, writing the downloaded command data into a receiving command list of the command area, so that the hard disk controller checks the data written into the data area after reading the downloaded command data from the receiving command list, and writing response data carrying a checking result into a transmitting command list of the command area;
and the host reads the response data carrying the check result from the sending command list, and determines a data writing result according to the check result.
The host writes command data to the data communication area or reads response data of the data communication area through a PCIE transport layer TLP command.
To achieve the above object, the present invention further provides a PCIE-based communication device, the communication device being host-based, the communication device comprising:
a data writing module, configured to write command data into a data communication area of a hard disk controller, so that the hard disk controller reads the command data from the data communication area for processing, and writes processed response data into the data communication area; the hard disk controller of the solid state disk is provided with a configuration register, and the mapping memory space of a base address register in the configuration register is used as a data communication area;
and the data reading module is used for reading the response data from the data communication area and processing the response data so as to realize the communication between the host and the solid state disk.
To achieve the above object, the present invention further provides an electronic device including:
a memory for storing a computer program; and the processor is used for realizing the steps of the PCIE-based communication method when executing the computer program.
In order to achieve the above objective, the present invention further provides a PCIE-based communication system, including the above electronic device for a solid state disk.
To achieve the above object, the present invention further provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the PCIE-based communication method as described above.
As can be seen from the above solution, in the PCIE-based communication method provided by the embodiments of the present invention, a hard disk controller of a solid state disk has a configuration register, and a mapping memory space of a base address register in the configuration register is used as a data communication area; the communication method comprises the following steps: writing command data into a data communication area of the hard disk controller by the host so that the hard disk controller reads the command data from the data communication area for processing, and writing the processed response data into the data communication area; and the host reads and processes the response data from the data communication area, so that the communication between the host and the solid state disk is realized.
Therefore, after the mapping memory space of the base address register is used as a data communication area, the host can realize communication between the host and the hard disk controller only based on the existing PCIE channel without additional hardware conditions, and the transmission rate reaches the limit speed of PCIE bandwidth, so that the data transmission efficiency is improved; in addition, the mode is not limited by a protocol, any command data and any format can be customized, and the data transmission quality is improved. The invention also discloses a communication device, equipment, a system and a storage medium based on PCIE, and the technical effects can be realized.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a PCIE-based communication method according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of another communication method based on PCIE according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a mapping space structure according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a system architecture according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a PCIE-based communication device according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention discloses a communication method, a device, equipment, a system and a storage medium based on PCIE (peripheral component interface express), which are used for improving the data transmission efficiency and quality between a host and a solid state disk.
Referring to fig. 1, in the PCIE-based communication method provided by the embodiment of the present invention, a hard disk controller of a solid state disk has a configuration register, and a mapping memory space of a base address register in the configuration register is used as a data communication area. Specifically, the communication method includes:
s101, writing command data into a data communication area of a hard disk controller by a host, so that the hard disk controller reads the command data from the data communication area to process, and writing processed response data into the data communication area;
it should be noted that, at present, when the host computer communicates with the hard disk controller, a communication interaction technology based on protocols such as NVME/SATA is used, and the communication through the technology has the technical problems of single interaction command, few debugging means after finished products, connection failure after errors and the like. Therefore, in the present application, in order to solve the above technical problem, the mapping memory space of the base address register 2 (Base address register) and the base address register 3 (Base address register 3) of the configuration register is used as a data communication area, so as to support the host to communicate with a plurality of controllers in one chip. Communication can be performed based on the existing PCIE lanes without resorting to additional hardware conditions.
And, the type of command data in the application can be set by user in a self-defined way, such as: the downloading of firmware instructions, activating firmware instructions, viewing current hard disk controller status instructions, hard disk controller information, hard disk system log logs, and the like are not particularly limited herein.
S102, the host reads and processes the response data from the data communication area, and the communication between the host and the solid state disk is realized.
Specifically, after the host computer writes command data into the data communication area, the hard disk controller reads the command data from the data communication area for processing, and writes processed response data into the data communication area, and the host computer obtains the response data from the data communication area, so that the communication between the host computer and the solid state disk is realized.
In summary, after the mapping memory space of the base address register is used as the data communication area, the host computer can realize communication between the host computer and the hard disk controller based on the existing PCIE channel without additional hardware conditions, and the transmission rate reaches the limit speed of PCIE bandwidth, thereby improving the data transmission efficiency; in addition, the mode is not limited by a protocol, any command data and any format can be customized, and the data transmission quality is improved. In addition, the communication mode described in this embodiment can be independently communicated with a protocol, so when the connection of the NVME has a problem, the connection with the chip of the solid state disk can be continuously established through the scheme, multiple debugging means are provided for the solid state disk, and the technical problems of connection failure of the host and the solid state disk and the like caused by the connection error of the NVME are avoided.
Referring to fig. 2, a PCIE-based communication method provided by an embodiment of the present invention includes the following specific technical contents:
s201, writing command data into a received command list of a command area by a host, and modifying a received command pointer of a configuration area; if the hard disk controller detects that the receiving command pointer of the configuration area changes, reading command data from the receiving command list and processing the command data, writing response data generated after processing into the sending command list of the command area, and modifying the sending command pointer of the configuration area;
referring to fig. 3, a schematic diagram of a mapping space structure disclosed in an embodiment of the present invention is shown; as can be seen from fig. 3, the mapping space has a maximum size of 264, i.e., 64MB, and is mainly divided into a configuration area, a command area, and a data area; the configuration area is used for setting relevant configuration information of an interaction command between the host and the hard disk controller, the configuration information of the area can be checked by the host and the controller, and the relevant configuration information comprises: command length, maximum number of command stripes, receive command pointer, send command pointer, etc. The command area comprises a sending command table and a receiving command table, command data in the sending command table is written by a host for being acquired and processed by the hard disk controller, and command data in the receiving command table is written by the hard disk controller for being acquired and processed by the host. The data area is used for storing data written by the host.
S202, if the host detects that the sending command pointer of the configuration area changes, the response data is read from the sending command list and processed.
When the host reads and processes the response data from the command sending list, if the command data is a data writing command, the host reads the response data carrying the start address of the data area from the command sending list of the command area; writing data into the data area by utilizing the initial address of the data area, writing the downloaded command data into the receiving command list of the command area, so that after the hard disk controller reads the downloaded command data from the receiving command list, checking the data written into the data area, and writing response data carrying a checking result into the sending command list of the command area; and the host reads the response data carrying the check result from the sending command list, and determines the data writing result according to the check result.
It should be noted that, when the host and the hard disk controller communicate through the data communication area, the hard disk controller executes different processing operations according to different command data sent by the host, and similarly, the host also executes corresponding operations according to response data fed back by the hard disk controller.
For example: when the host sends a data writing command, the hard disk controller determines the position of the data to be written in the data area, after the host receives the response data, the host can write the data into the data area according to the position of the data to be written fed back by the hard disk controller and prompts the hard disk controller that the data is written in, at the moment, the hard disk controller can check the written data, and the checking result is fed back to the host to enable the host to obtain the data writing result; the verification result fed back by the hard disk controller may be: and correspondingly, if the verification result received by the host is verification failure, indicating that the data writing fails, and if the verification result received by the host is error, indicating that the data writing fails, and only if the received verification code is correct, indicating that the data writing is successful.
In this embodiment, the host may command writing command data to the data communication area or reading response data of the data communication area through the PCIE transmission layer TLP (Transaction Layer specification). That is, the mapped memory space in the present application is accessed using PCIE transport layer TLP commands, such as: memory Write TLP command/Memory Read TLP command. Through the mapping space, the host can interact with a plurality of controllers in the chip, whether direct connection is performed or not is not limited, and communication can be realized only by accessing the memory address space. For example: in the command sending and receiving stage, when a host client sends command data, the command data is written into a corresponding position of a receiving command table of a hard disk controller server through a Memory Write TLP command, the size of the command table is self-defined and recycled, after the hard disk controller server monitors the command data, the command data is read, the command content is analyzed and processed, response data is generated, and the response data is written into a sending command table; and the host client reads the response data from the sending command table of the server through the Memory Read TLP command, and completes command transmission.
In this application, the response data is the result of the hard disk controller executing the command, such as: whether the hard disk controller is successful in processing, the cause of the error, etc. For example: after the hard disk controller executes the firmware activating command, if the firmware activating command is successful, the hard disk controller generates response data 0, if the firmware activating command fails due to illegal activation, response data 1 is generated, if the firmware reading error fails, response data 2 is generated, and after the response data is sent to the host, the host can know the specific result of command execution.
Further, in this embodiment, in order for the hard disk controller to timely receive command data sent by the host, the host timely receives response data sent by the hard disk controller, a receiving command pointer and a sending command pointer are set in the configuration area, if the receiving command pointer changes, command data is written into the command area on behalf of the host, and if the sending command pointer changes, response data is written into the command area on behalf of the hard disk controller. Therefore, the hard disk controller in the application can detect whether the receiving command pointer changes in real time, if so, the host reads the command data from the corresponding position of the receiving command list, and similarly, the host can detect whether the sending command pointer changes in real time, and if so, the host reads the response data from the sending command list and processes the response data.
Referring to fig. 4, a schematic diagram of a system architecture according to an embodiment of the present invention is provided; as can be seen from this figure, the communication system in the present application includes a host and a controller; the method comprises the steps that a client is established at a host, a memory space is allocated to a sending command table and a receiving command table, the sending command table of the host needs to record information such as a connection handle and a receiving command pointer, the receiving command table needs to record information such as the sending command pointer, and the sending command table and the receiving command table of the host interact with the receiving command table and the sending command table in a controller. The host computer also needs to pre-establish a connection request service, a command sending service and a command response service, wherein the connection request service mainly generates a connection request carrying a connection handle before sending command data to the hard disk controller, and the sending process of the connection request is the same as that of the command data; the command sending service is specifically configured to send a connection request and command data, and the command response is mainly configured to obtain response data.
At the hard disk controller end, a service end for establishing communication based on the data communication area comprises a connection response processing service, a command request processing service, a command response processing service and a data interaction processing service, wherein the data interaction processing service comprises a write data processing service and a read data response service. After reading the connection request from the command area, processing the connection request through the connection response processing service; after the command data is read from the command area, the command data is analyzed and processed by the command request processing service, and then a response process corresponding to the command data is executed by the command response processing service. The write data processing service is for writing data to the data area, and the read data response service is for reading data from the data area.
Here, taking command data as an example of downloading firmware, the present scheme will be specifically described:
1. the host fills in command data to be sent according to a fixed format (the command data carries firmware length information to be downloaded), writes the command data into a hard disk controller receiving command table, and modifies a receiving command pointer of a hardware controller configuration area in a mapping space;
2. the controller judges whether the receiving command pointer of the hardware controller configuration area changes in real time, if so, the controller represents a new command, and command data is taken out from the corresponding position in the receiving command table; carrying out command request processing on the command data, judging that the command is a downloading firmware request and needing to carry out data transmission; then starting response processing, executing preparation operation on the data area, initializing the data area to be full 00 or full FF, generating response data by the hardware controller according to the format after the completion, writing the response data into a sending command table of the hardware controller, and modifying a sending command table pointer of a controller configuration area in a mapping space, wherein the response data comprises a data area starting address;
3. the host end judges whether the sending command pointer of the hard disk controller configuration area changes in real time, if so, new response data are represented, and the response data are taken out from the corresponding position in the sending command table; performing response processing, judging that data transmission can be performed, and starting writing from a data area initial address in response data until the data is completed;
4. after the writing of data at the host end is completed, continuously filling command data to be sent according to a fixed format, wherein the command data is used for prompting the hard disk controller that the downloading is completed, writing the command data into a hard disk controller receiving command table, and modifying a receiving command pointer of a controller configuration area in a mapping space;
5. the hard disk controller judges whether the receiving command pointer of the configuration area changes in real time, if so, the hard disk controller represents new command data, and the new command data is fetched from the corresponding position in the receiving command table; performing command request processing, judging that the downloading firmware request needs to be subjected to data verification, starting response processing, calculating a firmware verification code, and generating response data according to a format by the controller after the completion of the data verification, wherein the response data contains information of successful or failed verification, writing the response data into a sending command table of the hard disk controller, and modifying a sending command table pointer of a controller configuration area in a mapping space;
6. and the host end judges in real time, if the sending command pointer of the hard disk controller configuration area is found to be changed, new response data are judged, the response data are taken out from the corresponding position in the sending command table, response processing is carried out, whether the downloaded firmware check code is correct or not is judged, the success of downloading the firmware is indicated, and if the downloaded firmware check code is correct, the failure of downloading is indicated.
The following describes a communication device provided in an embodiment of the present invention, and the communication device described below and the communication method described above may be referred to each other.
Referring to fig. 5, a PCIE-based communication device according to an embodiment of the present invention is based on a host, and includes:
a data writing module 100, configured to write command data to a data communication area of a hard disk controller, so that the hard disk controller reads the command data from the data communication area to process the command data, and write processed response data to the data communication area; the hard disk controller of the solid state disk is provided with a configuration register, and the mapping memory space of a base address register in the configuration register is used as a data communication area;
and the data reading module 200 is used for reading the response data from the data communication area and processing the response data so as to realize the communication between the host and the solid state disk.
Wherein, the mapping memory space of the base address register 2 and the base address register 3 of the configuration register is the data communication area, and the data communication area includes: a configuration area, a command area, and a data area.
The data writing module is specifically configured to: writing command data into a received command list of the command area, and modifying a received command pointer of the configuration area; and if the hard disk controller detects that the receiving command pointer of the configuration area changes, reading the command data from the receiving command list, processing the command data, writing the response data generated after the processing into the sending command list of the command area, and modifying the sending command pointer of the configuration area.
Wherein, the data reading module includes:
and the first processing unit is used for reading the response data from the sending command list and processing the response data when detecting that the sending command pointer of the configuration area changes.
Wherein, the data reading module includes:
the data reading unit is used for reading response data carrying the start address of the data area from the sending command list of the command area when the command data is a data writing command;
a data writing unit, configured to write data into the data area by using the start address of the data area, and write downloaded command data into a received command list of the command area, so that after the hard disk controller reads the downloaded command data from the received command list, verify the data written into the data area, and write response data carrying a verification result into a transmitted command list of the command area;
and the writing result determining unit is used for reading the response data carrying the check result from the sending command list and determining a data writing result according to the check result.
The host writes command data to the data communication area or reads response data of the data communication area through a PCIE transmission layer TLP command.
Referring to fig. 6, an electronic device provided in an embodiment of the present invention includes:
a memory 11 for storing a computer program;
and a processor 12, configured to implement the steps of the PCIE-based communication method according to any of the method embodiments when executing the computer program.
In this embodiment, the device is a host in the above embodiment, and may be a terminal device such as a PC (Personal Computer ), a smart phone, a tablet computer, a palm computer, a portable computer, or the like.
The device may include a memory 11, a processor 12, and a bus 13.
The memory 11 includes at least one type of readable storage medium including flash memory, a hard disk, a multimedia card, a card memory (e.g., SD or DX memory, etc.), a magnetic memory, a magnetic disk, an optical disk, etc. The memory 11 may in some embodiments be an internal storage unit of the device, such as a hard disk of the device. The memory 11 may in other embodiments also be an external storage device of the device, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card) or the like, which are provided on the device. Further, the memory 11 may also include both an internal storage unit of the device and an external storage device. The memory 11 may be used not only for storing application software installed in the device and various types of data, such as program codes for executing a communication method, etc., but also for temporarily storing data that has been output or is to be output.
The processor 12 may in some embodiments be a central processing unit (Central Processing Unit, CPU), controller, microcontroller, microprocessor or other data processing chip for executing program code stored in the memory 11 or for processing data, such as program code for performing communication methods, etc.
The bus 13 may be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus, or an extended industry standard architecture (extended industry standard architecture, EISA) bus, among others. The bus may be classified as an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in fig. 6, but not only one bus or one type of bus.
Further, the device may also include a network interface 14, and the network interface 14 may optionally include a wired interface and/or a wireless interface (e.g., WI-FI interface, bluetooth interface, etc.), typically used to establish a communication connection between the device and other electronic devices.
Optionally, the device may further comprise a user interface 15, the user interface 15 may comprise a Display (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 15 may further comprise a standard wired interface, a wireless interface. Alternatively, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, or the like. The display may also be referred to as a display screen or display unit, as appropriate, for displaying information processed in the device and for displaying a visual user interface.
Fig. 6 shows only a device having components 11-15, it will be understood by those skilled in the art that the configuration shown in fig. 6 is not limiting of the device and may include fewer or more components than shown, or may combine certain components, or a different arrangement of components.
The embodiment of the invention also discloses a communication system based on PCIE, which comprises the solid state disk and the electronic equipment in the previous embodiment.
The embodiment of the invention also discloses a computer readable storage medium, wherein the computer readable storage medium is stored with a computer program, and the computer program realizes the steps of the communication method based on PCIE in any method embodiment when being executed by a processor.
Wherein the storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A communication method based on PCIE is characterized in that a hard disk controller of a solid state disk is provided with a configuration register, and a mapping memory space of a base address register in the configuration register is used as a data communication area; the communication method comprises the following steps:
writing command data into the data communication area of the hard disk controller by a host computer so that the hard disk controller reads the command data from the data communication area for processing, and writing processed response data into the data communication area;
and the host reads the response data from the data communication area and processes the response data to realize the communication between the host and the solid state disk.
2. The communication method according to claim 1, wherein the mapped memory space of the base address register 2 and the base address register 3 in the configuration register is used as the data communication area, and the data communication area includes: a configuration area, a command area, and a data area.
3. The communication method according to claim 2, wherein the host writing command data to the data communication area of the hard disk controller to cause the hard disk controller to read the command data from the data communication area for processing, and writing processed response data to the data communication area, comprises:
the host writes command data into a received command list of the command area and modifies a received command pointer of the configuration area; and if the hard disk controller detects that the receiving command pointer of the configuration area changes, reading the command data from the receiving command list, processing the command data, writing the response data generated after the processing into the sending command list of the command area, and modifying the sending command pointer of the configuration area.
4. A communication method according to claim 3, wherein the host reads the response data from the data communication area and processes it, comprising:
and if the host detects that the sending command pointer of the configuration area changes, reading the response data from the sending command list and processing the response data.
5. The communication method according to claim 2, wherein the host reads the response data from the data communication area and processes the response data, comprising:
if the command data is a data writing command, the host reads response data carrying a data area starting address from a sending command list of the command area;
writing data into the data area by utilizing the initial address of the data area, writing the downloaded command data into a receiving command list of the command area, so that the hard disk controller checks the data written into the data area after reading the downloaded command data from the receiving command list, and writing response data carrying a checking result into a transmitting command list of the command area;
and the host reads the response data carrying the check result from the sending command list, and determines a data writing result according to the check result.
6. The communication method according to any one of claims 1 to 5, wherein the host writes command data to the data communication area or reads response data of the data communication area by a PCIE transport layer TLP command.
7. A PCIE-based communication device, wherein the communication device is host-based, the communication device comprising:
a data writing module, configured to write command data into a data communication area of a hard disk controller, so that the hard disk controller reads the command data from the data communication area for processing, and writes processed response data into the data communication area; the hard disk controller of the solid state disk is provided with a configuration register, and the mapping memory space of a base address register in the configuration register is used as a data communication area;
and the data reading module is used for reading the response data from the data communication area and processing the response data so as to realize the communication between the host and the solid state disk.
8. An electronic device, comprising:
a memory for storing a computer program;
processor for implementing the steps of the PCIE-based communication method according to any one of claims 1 to 6 when executing said computer program.
9. A PCIE-based communication system, comprising a solid state disk, and the electronic device of claim 8.
10. A computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, which when executed by a processor, implements the steps of the PCIE-based communication method of any one of claims 1 to 6.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101498994A (en) * 2009-02-16 2009-08-05 华中科技大学 Solid state disk controller
CN106372004A (en) * 2015-07-24 2017-02-01 爱思开海力士有限公司 Programmable protocol independent bar memory for SSD controller
CN109983449A (en) * 2018-06-30 2019-07-05 华为技术有限公司 The method and storage system of data processing
CN110389877A (en) * 2019-06-25 2019-10-29 苏州浪潮智能科技有限公司 Log read method, system, device and storage medium when solid state hard disk is run
CN111221476A (en) * 2020-01-08 2020-06-02 深圳忆联信息系统有限公司 Front-end command processing method and device for improving SSD performance, computer equipment and storage medium

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10585843B2 (en) * 2018-03-05 2020-03-10 Samsung Electronics Co., Ltd. SSD architecture for FPGA based acceleration

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101498994A (en) * 2009-02-16 2009-08-05 华中科技大学 Solid state disk controller
CN106372004A (en) * 2015-07-24 2017-02-01 爱思开海力士有限公司 Programmable protocol independent bar memory for SSD controller
CN109983449A (en) * 2018-06-30 2019-07-05 华为技术有限公司 The method and storage system of data processing
CN110389877A (en) * 2019-06-25 2019-10-29 苏州浪潮智能科技有限公司 Log read method, system, device and storage medium when solid state hard disk is run
CN111221476A (en) * 2020-01-08 2020-06-02 深圳忆联信息系统有限公司 Front-end command processing method and device for improving SSD performance, computer equipment and storage medium

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