CN112313905A

CN112313905A - Receiving apparatus and receiving method

Info

Publication number: CN112313905A
Application number: CN201980041192.1A
Authority: CN
Inventors: 平山雄一; 小岛知也
Original assignee: Sony Semiconductor Solutions Corp
Current assignee: Sony Semiconductor Solutions Corp
Priority date: 2018-06-27
Filing date: 2019-06-13
Publication date: 2021-02-02
Anticipated expiration: 2039-06-13
Also published as: JP2021158394A; KR20210023853A; CN112313905B; WO2020004050A1

Abstract

The present technology relates to a receiving apparatus and a receiving method capable of reducing fluctuation in processing a data stream. A receiving apparatus includes a control unit that controls a clock for reading data written in a memory based on an amount of data written in a section of a predetermined frame and a time of the section of the predetermined frame when data of a payload section among header sections and payload sections constituting divided variable-length packets are sequentially written in the memory when the divided variable-length packets are included in a transmission data stream transmitted by each of a plurality of carriers and the divided variable-length packets are divided. The present technology can be applied to, for example, a receiver supporting digital cable television broadcasting.

Description

Receiving apparatus and receiving method

Technical Field

The present technology relates to a receiving apparatus and a receiving method, and more particularly, to a receiving apparatus and a receiving method capable of reducing fluctuation in processing a data stream.

Background

In order to transmit a large-capacity signal that cannot be transmitted in one channel, a multicarrier transmission scheme has been developed that extends the conventional transmission scheme and divides the large-capacity signal into a plurality of carriers to transmit the signal (see, for example, patent document 1).

Documents of the prior art

Patent document

Patent document 1: international publication No. 2016/117283

Disclosure of Invention

Technical problem to be solved by the invention

In a receiving apparatus supporting a multicarrier transmission scheme, data streams of a plurality of carriers are combined and output, and it is necessary to reduce fluctuations in processing the data streams.

The present technology has been made in view of such circumstances, and an object thereof is to reduce fluctuations in processing a data stream.

Means for solving the technical problem

A receiving apparatus according to an aspect of the present technology includes a control unit that controls a clock for reading data written in a memory based on an amount of data written in a section of a predetermined frame and a time of the section of the predetermined frame when data of a payload section among header sections and payload sections constituting divided variable-length packets is sequentially written in the memory when the divided variable-length packets are included in a transmission data stream transmitted by each of a plurality of carriers.

In a reception method according to an aspect of the present technology, a reception apparatus performs control as follows: when a divided variable-length packet formed by dividing a variable-length packet is included in a transport stream transmitted by each of a plurality of carriers, and when data of a payload section among a header section and a payload section constituting the divided variable-length packet is sequentially written into a memory, a clock for reading the data written into the memory is controlled based on the amount of data written in a section of a predetermined frame and the time of the section of the predetermined frame.

In a receiving apparatus and a receiving method according to an aspect of the present technology, when a divided variable-length packet formed by dividing a variable-length packet is included in a transport stream transmitted by each of a plurality of carriers, and data of a payload section among header sections and payload sections constituting the divided variable-length packet is sequentially written into a memory, a clock for reading the data written into the memory is controlled based on an amount of data written in a section of a predetermined frame and a time of the section of the predetermined frame.

The receiving device of one aspect of the present technology may be a stand-alone device or may be an internal block constituting one device.

Effects of the invention

According to one aspect of the present technique, fluctuations in processing a data stream may be reduced.

In addition, the effects described herein are not necessarily limited, and may be any effects described in the present disclosure.

Drawings

Fig. 1 is a diagram showing a configuration of an embodiment of a transmission system to which the present technology is applied.

Fig. 2 is a diagram of an example of the structure of a multiframe.

Fig. 3 is a diagram showing an outline of the syntax of the frame header.

Fig. 4 is a diagram showing an example of the configuration of a TLV packet and a split TLV packet.

Fig. 5 is a diagram showing an example of the configuration of the header portion and the payload portion of the split TLV packet.

Fig. 6 is a diagram showing an example of the structure of a superframe.

Fig. 7 is a block diagram showing an example of the configuration of a demodulation IC of a receiving apparatus having a conventional function.

Fig. 8 is a diagram schematically illustrating a principle of containing fluctuation when processing a data stream using an existing function.

Fig. 9 is a diagram schematically showing delays between carriers.

Fig. 10 is a block diagram showing an example of the configuration of a receiving apparatus having a new function.

Fig. 11 is a diagram showing operations of each part in a demodulation IC supporting a header removal and smoothing function and a signal flow thereof.

Fig. 12 is a flowchart illustrating the flow of the carrier correspondence processing.

Fig. 13 is a flowchart illustrating the TLV conversion process in detail.

Fig. 14 is a flowchart illustrating the flow of the data read clock control process.

Fig. 15 is a diagram showing an example of setting data readout start timing with the delay coping function.

Fig. 16 is a flowchart illustrating the flow of the data read start timing control process.

Fig. 17 is a block diagram showing another configuration example of a demodulation IC supporting a delay coping function.

Fig. 18 is a diagram showing a configuration example of a computer.

Detailed Description

Hereinafter, embodiments of the present technology will be described with reference to the drawings. The explanation is made in the following order.

1. Embodiments of the present technology

2. Modification example

3. Constitution of computer

< 1. embodiment of the present technology >

(example of Transmission System construction)

Fig. 1 is a diagram showing a configuration of an embodiment of a transmission system to which the present technology is applied. In addition, a system refers to a logical set of a plurality of devices.

In fig. 1, a transmission system 1 is a system supporting a broadcast system of Digital cable television Broadcasting such as ISDB-c (integrated Services Digital Broadcasting for cable).

In this digital cable television broadcasting (cable television), a multicarrier transmission method is adopted, in which a data stream exceeding the transmission capacity of one carrier is divided and transmitted using a plurality of carriers on the transmitting side, and the data streams divided and transmitted by the plurality of carriers are combined on the receiving side. In the multi-carrier transmission scheme, a modulation scheme such as 64QAM (quadrature Amplitude modulation) or 256QAM may be used for each of the plurality of carriers.

The transmission system 1 includes a transmission device 10, a reception device 20, and a CATV transmission line 30. Note that, in fig. 1, only one receiving device 20 is shown for simplicity of explanation, but actually, the receiving device 20 is installed in each house of the cable television user.

The transmitting apparatus 10 is provided at the head end of a cable television station.

The transmission device 10 receives a broadcast signal of terrestrial broadcasting or satellite broadcasting, processes a content stream such as a program thereof, and transmits (retransmits) the content stream to the reception device 20 via the CATV transmission line 30. In addition to the retransmission, the transmission device 10 may transmit a content stream such as a program independently created by a cable television station or a program received via a communication line such as the internet to the reception device 20 via the CATV transmission line 30.

The CATV transmission line 30 is formed of a transmission medium such as a coaxial cable or an optical fiber, and connects a head end of a cable television station to a house of a cable television subscriber by cable.

The receiving apparatus 20 is a fixed receiver such as a television receiver or a Set Top Box (STB) installed in the house of a cable television user.

The receiving device 20 receives the broadcast signal transmitted from the transmitting device 10 via the CATV transmission line 30, processes the content data stream, displays a video such as a program on a display, and outputs a sound synchronized with the video from a speaker. Thus, cable users can view content such as programs.

Here, the data streams handled by (the receiving system of) the receiving apparatus 20 include, for example, a single transport data stream (single TS) conforming to a single TS multiplexing scheme, a plurality of transport data streams (a plurality of TSs) conforming to a plurality of TS multiplexing schemes, and a transport data stream conforming to a multicarrier transmission scheme.

The single TS is used for general broadcast oriented, for example. On the other hand, a transmission data stream of a multi-TS and multi-carrier transmission scheme is used to retransmit content of satellite broadcasting on, for example, a cable television.

In addition, as satellite broadcasting (BS broadcasting), advanced broadband satellite digital broadcasting (advanced BS broadcasting) has been started to be used, and for example, a plurality of TSs can be used for normal BS broadcasting retransmission, and a transmission data stream of a multicarrier transmission scheme can be used for advanced BS broadcasting retransmission providing ultra high definition television broadcasting services of 4K and 8K.

(multiframe structure)

Fig. 2 is a diagram showing an example of the configuration of a multiframe.

In fig. 2, a plurality of multiframes such as TS constitute 1 frame by 53 time slots in total, and include 1 time slot assigned to the frame header and 52 time slots assigned to data of each program such as program a, program B, and program C. The multiframe is called TSMF (transport Streams Multiplexing frame) and the multiframe header is called TSMF header. Each program such as program a, program B, and program C is a program of a different broadcast station channel.

(TSMF header outline)

Fig. 3 is a diagram showing a syntax outline of a duplicate frame header (TSMF header).

The TSMF header includes, as header information, a packet header, frame _ sync, version _ number, relative _ stream _ number _ mode, frame _ type, stream _ status, stream _ id/original _ network _ id, receive _ status, reserved _ for _ future _ use, elementary _ indicator, relative _ stream _ number, extension information, and a CRC field. These fields specify the parameters of the header information.

The packet header contains the sync byte, frame _ PID, and continuity indicator. frame _ sync is a field of the TSMF sync signal. The version _ number is a field for indicating TSMF header change.

A relative _ stream _ number _ mode is a field for distinguishing a slot allocation method. frame _ type is a field for distinguishing TSMF forms. stream _ status is a field for indicating validity/invalidity of a relative stream number.

stream _ id/original _ network _ id is a field for identifier/relative stream number correspondence information. Hereinafter, stream _ id is also referred to as a data stream identifier, and original _ network _ id is also referred to as a network identifier. The data stream identifier (stream _ id) and the network identifier (original _ network _ id) are also collectively referred to as identification information.

The receive _ status is a field indicating reception information of the head end. reserved _ for _ future _ use is a field (undefined) for future extension. An emergency _ indicator is a field for indicating an emergency alert. relative _ stream _ number is a field for information corresponding to a slot with respect to a stream number.

When header information of the TSMF header is extended, the extension information is configured using the private _ data extension area. The CRC is a field of a CRC (cyclic redundancy check) value for error detection.

Here, the extension information defines, for example, information used for synthesis. The extension information includes earthquake _ early _ warning, stream _ type, group _ id, number _ of _ carriers, carrier _ sequence, number _ of _ frames, frame _ position, field _ for _ extension fields.

earth _ alarm _ warning is a field of earthquake alarm information for terrestrial digital broadcasting.

stream _ type is a field for indicating a type of data stream. "TS" or "TLV" is designated as stream _ type. That is, "TS" is specified for a transport data stream (TS) containing TS packets, and "TLV" is specified for a transport data stream (TLV) containing TLV packets (split TLV packets).

Hereinafter, stream _ type is also referred to as type information. Furthermore, the TS packet is a packet having a fixed length (for example, 188 bytes), and is therefore also referred to as a fixed-length packet. TLV data packets, on the other hand, are variable length data packets and are therefore also referred to as variable length data packets.

The group _ id is a field for identifying a carrier group. number _ of _ carriers is a field for indicating the total number of carriers constituting a carrier group. carrier _ sequence is a field for indicating the synthesis order of the carrier demodulation output.

number _ of _ frames is a field for indicating the number of frames contained in a superframe. frame _ position is a field for frame position information. field _ for _ extension is a field (undefined) for future extensions.

(construction of TLV and Split TLV)

Here, although the broadcast system of the digital cable television broadcast (for example, ISDB-C) is output after demodulation, the broadcast system of the advanced BS broadcast or the like outputs a signal (TLV signal) in the form of TLV (type Length value) as compared with a signal (TS signal) in the form of TS. Therefore, in order to transmit (transmit) TLV signals in a broadcast system such as advanced BS broadcast by a broadcast system such as ISDB-C, it is necessary to convert the TLV signals into TS signals.

That is, the TLV packet is divided, and as the divided TLV packet, the variable TLV vector is converted into a fixed length form of 188 bytes. The TS packet is 188 bytes, and the time slot of the multiframe (TSMF) is also 188 bytes of the same size as the TS packet.

Specifically, in fig. 4, for example, when the TLV packet P1 is contiguous to the TLV packet P2, the TLV packet P1 is divided into 3 parts in 185 bytes, and stored in the payload portions of the divided TLV packets DP1, DP2, and DP3, respectively. In the split TLV packet DP, the payload section is 185 bytes, and a 3-byte split TLV packet header is added. That is, the split TLV data packet is 188 bytes including 3 bytes of the header portion and 185 bytes of the payload portion.

In the example of fig. 4, a portion (185 bytes of signal) of TLV data packet P1 is stored sequentially into the payload portions of split TLV data packets DP1, DP2 and the remaining portion (less than 185 bytes of signal) is stored into the payload portion of split TLV data packet DP 3. That is, the payload portion of the split TLV packet DP3 stores 185 bytes in total, including the remainder of TLV packet P1 (less than 185 bytes of signal), followed by a portion of TLV packet P2 (less than 185 bytes of signal).

Fig. 5 shows an example of the structure of the header portion and the payload portion of the divided TLV packet. In the split TLV packet, the 3-byte header of the split TLV packet includes a sync byte, a transport error indicator, a TLV packet start indicator, and a PID.

The sync byte is "0 x 47". The transport error indicator designation flag is used to indicate whether there is a bit error within the fragmented TLV packet.

The TLV packet start indicator specifies a flag indicating whether the payload portion of the fragmented TLV packet contains a header of the TLV packet. For example, in the split TLV packet, when the TLV packet start indicator of the split TLV packet header is "1", it indicates that the payload portion thereof includes the header of the TLV packet.

Further, when the TLV packet start indicator is "1", as shown in a of fig. 5, a header TLV indication is set at the first byte of the payload part. For example, a value after the value indicated by the header TLV plus 1 indicates the number of bytes in the payload of the split TLV data packet immediately following the indication of the header TLV up to the start position of the TLV data packet of the header. In addition, when the TLV packet start indicator is "0", as shown in B of fig. 5, no header TLV indication is inserted.

As such, when the TLV packet start indicator of the header of the split TLV packet is "1", the payload part of the split TLV packet contains the header of the TLV packet, and a 1-byte header TLV indication is to be inserted, so that the data stored therein is 184 bytes (a of fig. 5). On the other hand, when the TLV packet start indicator of the split TLV packet header is "0", the payload part of the split TLV packet does not contain the header of the TLV packet, and the header TLV indication is not inserted, so that the data stored therein is 185 bytes (B of fig. 5).

The data used by the PID to identify the payload portion is TLV data. The value thereof is defined as "0 x 002D".

In the multicarrier transmission scheme, the multi-frame (TSMF header) format shown in fig. 2 and the divided TLV packets shown in fig. 4 are used for the synthesis. At this time, by adding the TSMF header (fig. 3) to the TLV signal (TLV data stream) for dividing the TLV data packet, it is possible to process the TLV signal as a transport data stream composed of multiframes.

In the multicarrier transmission scheme, a super frame is defined as a frame composed of a plurality of multiframes (TSMF). Here, in the multicarrier transmission scheme, for example, when modulation schemes of 64QAM and 256QAM are used, the transmission rate is 31.644Mbps in 64QAM, 42.192Mbps in 256QAM, and the relationship between 64QAM and 256QAM is 3: 4.

according to this relationship, as shown in fig. 6, in the carrier of 64QAM, 53 slots of the multiframe are set to 3 groups as 1 superframe, while in the carrier of 256QAM, 53 slots of the multiframe are set to 4 groups as 1 superframe. As shown in fig. 6, a carrier of 64QAM has 1 subframe of 3 slots, while a carrier of 256QAM has 1 subframe of 4 slots.

The reception device 20 performs combining in units of subframes, and combines the subframes in ascending order of carrier number ("after combining" in fig. 6). However, the 4 th synthesis of 1 subframe is performed only in 256QAM carriers.

(examples of existing functions)

Here, in order to compare the new functions to which the present technology is applied, the configuration and operation of (the demodulation IC902 of) the reception apparatus 20 having the conventional functions will be described with reference to fig. 7 to 9.

Fig. 7 is a block diagram showing an example of the configuration of a demodulation IC902 of the reception apparatus 20 having a conventional function.

In fig. 7, the demodulation IC902 of the receiver apparatus 20 having the conventional function includes a control unit 910, TSMF processing units 911-1 to 911-4, a combining unit 912, a memory 913, a TLV conversion unit 914, and a memory 915.

The control unit 910 controls the operations of the respective units of the demodulation IC 902.

The TSMF processing units 911-1 to 911-4 perform TSMF processing on the transport data streams from the internal demodulation unit or the external demodulation IC, and supply the target transport data streams to the combining unit 912. The TSMF processing units 911-1 to 911-4 supply header information of the TSMF header to the control unit 910.

The combining unit 912 performs a combining process of combining the transport data streams from the TSMF processing units 911-1 to 911-4 and writes the resultant data to the memory 913.

The TLV conversion unit 914 reads out the data from the memory 913, performs TLV conversion processing, and writes the resultant data into the memory 915. The data written in the memory 915 is read out and output to a subsequent processing unit (for example, a system on a chip).

(problem of fluctuation)

Here, fig. 8 schematically shows a principle of containing fluctuation when processing a data stream using an existing function.

Note that the symbols "a" to "E" added to each data (signal) in fig. 8 correspond to the symbols "a" to "E" added to the arrow indicating the flow of the data (signal) in the demodulation IC902 in fig. 7, and the description will be given in association with the data (signal) and the flow thereof in the description of fig. 8.

A in fig. 8 indicates a 64QAM carrier signal, and this transmission data stream is input to the TSMF processing unit 911-1 (arrow a in fig. 7). Note that B in fig. 8 indicates a 64QAM carrier signal, and this transmission data stream is input to the TSMF processing unit 911-2 (arrow B in fig. 7). These transport data streams contain split TLV packets.

The transport streams input to the TSMF processing unit 911-1 and the TSMF processing unit 911-2 are combined by the combining unit 912 and written into the memory 913 (S1). Then, the TLV conversion unit 914 reads the data written in the memory 913, and at this time, the data is read according to a predetermined clock, thereby smoothing the data (S1). Here, smoothing is a function of reading data written in the memory at a constant rate and continuously outputting the data.

C in fig. 8 represents the DATA (DATA) read from the memory 913, and the (DATA of the) divided TLV packet is input to the TLV conversion unit 914 (arrow C in fig. 7). Then, the VALID signal of the DATA (DATA) in the header portion of the divided TLV packet is set to Low level, and the header portion is invalidated (S2).

D in fig. 8 indicates DATA (DATA) output from the TLV conversion unit 914, and the divided TLV packet (DATA of the divided TLV packet whose header is invalid) is written into the memory 915 (arrow D in fig. 7).

Then, the data written in the memory 915 is read out and output to a processing unit (for example, a system on a chip) in the subsequent stage, and at this time, the data is read out according to a predetermined clock, thereby smoothing the data (S3). E of fig. 8 indicates DATA (DATA) read out from the memory 915 (arrow E of fig. 7).

In this way, when the split TLV packets are combined and smoothed by the conventional function, it is necessary to further perform smoothing at the time of TLV conversion. Specifically, in the example of fig. 8, two smoothements of "synthesize & smooth" of S1 and "smooth" of S3 are to be performed, and the original TLV packet may contain fluctuations compared to the original TLV packet.

That is, in the period of the VALID signal shown in D of fig. 8, when the DATA (DATA) is always 184 bytes or 185 bytes, the output rate can be calculated and smoothed by the conventional function, but when the DATA stored in the payload portion of the divided TLV packet is written into the memory as described above, the DATA may be 184 bytes (a of fig. 5) or 185 bytes (B of fig. 5).

Further, the random mixture of data having different byte numbers of 184 bytes and 185 bytes causes fluctuation, and the conventional function cannot cope with this. Therefore, it is necessary to solve the problem of the fluctuation when 184 bytes and 185 bytes of data are mixed as data to be written into the payload section of the memory, which is a configuration in which the minimum amount of memory can be used to achieve the smoothing.

(delay to deal with problem)

In the multicarrier transmission scheme, since the order of arrangement of the multiframes (TSMF) is specified by the carrier order (carrier _ sequence) and the frame position information (frame _ position), it is necessary to assume that the frame phases between the carriers coincide in the processing on the transmitting side and the processing on the receiving side. Therefore, when the transmission delay times of the carriers are different during transmission, it is necessary to match the phases of the carriers in the processing on the receiving side.

Here, when the propagation delay time difference between carriers is large, it is difficult to search for the head position of a desired super frame when transmitting by the processing of the receiving side. Therefore, for example, in the cross modulation usage specification (JLabs SPEC-034) established by the Japan Cable laboratory (Japan Cable Lab) of general corporate law, a super-frame phase difference range at the time of reception is set, and the transmission delay difference is absorbed or controlled so as to satisfy the range in the transmission section until the reception device 20 is reached.

Here, in the super-frame phase alignment at a certain time, it is determined whether or not the phases are the same based on the arrival time difference between the super-frame before and after the super-frame and the super-frame of another carrier. Therefore, the arrival time difference needs 1/2 less than 1 superframe. Since the frame at the head of the super frame needs to be included in a section smaller than 1/2, for example, in the above-mentioned usage specification (JLabs SPEC-034), as shown in fig. 9, a phase difference range smaller than 1/6 is obtained by subtracting 1/3 super frames of 64 QAM.

That is, in fig. 9, when the carriers #1 to #3 are transmitted via different transmission lines, the delay between the carriers may become large, and if the delay between the carriers #1 to #3 is equal to or more than 1/2 superframes, the header of the frame cannot be detected, and the combination cannot be performed. Therefore, for example, as specified in the above usage specification (JLabs SPEC-034), the receiving side needs to support up to 1/6 superframe delays.

As described above, the conventional function has problems that firstly, when the divided TLV packets are combined and smoothed to convert the TLV packets, smoothing needs to be performed again, which increases fluctuation, secondly, when there is a delay in each carrier, each carrier needs to be synchronized, and the receiving side needs to support a predetermined delay (for example, the receiving side supports a maximum delay of 1/6 superframes according to the usage specification), but cannot sufficiently cope with such a delay.

In view of these problems, applying the new function of the present technology can reduce fluctuations in processing data streams of multiple carriers. In addition, in the new function to which the present technology is applied, the receiving side can cope with a predetermined delay (for example, a delay on the receiving side according to a requirement of a usage specification) when each carrier is delayed. The configuration and operation of the receiver 20 having the new function will be described below.

(constitution of receiving apparatus with New function)

Fig. 10 is a block diagram showing an example of the configuration of the receiving apparatus 20 having a new function.

In FIG. 10, a receiver 20 with new functions includes tuners 201-1 to 201-4, demodulation ICs 202-1 to 202-4, and a system-on-chip 203.

The tuner 201-1 receives the broadcast signal transmitted by the transmission apparatus 10 and applies necessary processing, and then supplies the resultant received signal (the signal of the carrier #1) to the demodulation IC 202-1. Similarly to the tuner 201-1, the tuners 201-2 to 201-4 apply necessary processing to the broadcast signal, and supply the resultant received signals (signals of the carriers #2 to #4) to the demodulation ICs 202-2 to 202-4, respectively.

The demodulation IC202-2 applies demodulation processing (demodulation such as 64QAM, 256QAM, or the like) to the reception signal (signal of the carrier # 2) supplied from the tuner 201-2, and supplies the resultant transmission data stream to the demodulation IC 202-1. As with the demodulation IC202-2, the demodulation IC202-3 and the demodulation IC202-4 apply demodulation processing to the received signals (signals of the carriers #3, #4), and supply the resultant transmission data stream to the demodulation IC 202-1.

The demodulation IC202-1 includes a control unit 210, a demodulation unit 211, TSMF processing units 212-1 to 212-4, TLV conversion units 213-1 to 213-4, memories 214-1 to 214-4, and a selector 215. The demodulation IC202-1 receives a reception signal from the tuner 201-1 and a transmission data stream from the demodulation ICs 202-2 to 202-4.

The control unit 210 controls the operations of the respective units of the demodulation IC 202-1. For example, the control unit 210 includes a processor such as a microcontroller.

The demodulation section 211 applies demodulation processing (demodulation such as 64QAM, 256QAM, etc.) to the reception signal (signal of carrier #1) of the tuner 201-1, and supplies the resultant transmission data stream to the TSMF processing section 212-1.

The TSMF processing unit 212-1 applies TSMF processing related to a TSMF packet to the transport stream supplied from the demodulation unit 211. In this TSMF process, for example, (the TSMF header of) a TSMF packet is detected from a transmission data stream extracted from a received signal (the signal of carrier #1), or header information (extension information) of the TSMF header is extracted.

The TSMF processing section 212-1 supplies header information (extension information) of the extracted TSMF header to the control section 210. Furthermore, the TSMF processing section 212-1 supplies the transport data stream supplied from the demodulation section 211 to the TLV conversion section 213-1.

The TSMF processing units 212-2 to 212-4 apply TSMF processing to the transport streams of the external demodulation ICs 202-2 to 202-4, respectively, and supply header information (extension information) of the TSMF header to the control unit 210, respectively, as in the TSMF processing unit 212-1. The TSMF processing units 212-2 to 212-4 supply the transmission data streams of the external demodulation ICs 202-2 to 202-4 to the TLV conversion units 213-2 to 213-4, respectively.

The TLV conversion unit 213-1 writes (the payload portion of) the data of the divided TLV packet included in the transport stream supplied from the TSMF processing unit 212-1 into the memory 214-1. Further, the TLV conversion section 213-1 supplies information indicating the amount of data written to the memory 214-1 to the control section 210.

Like the TLV conversion units 213-1, the TLV conversion units 213-2 to 213-4 write (payload parts of) the data of the divided TLV packets of the TSMF processing units 212-2 to 212-4 to the memories 214-2 to 214-4, respectively. The TLV conversion units 213-2 to 213-4 supply information indicating the amount of data written in the memories 214-2 to 214-4 to the control unit 210, respectively.

The memories 214-1 to 214-4 are buffer memories (e.g., semiconductor memory devices such as ram (random Access memory)) having a predetermined capacity.

Header information (extension information) of TSMF headers of TSMF processing sections 212-1 to 212-4 and information indicating the amount of write data of TLV conversion sections 213-1 to 213-4 are supplied to a control section 210.

The control unit 210 calculates all the data amount written in the predetermined frame section and the time of the predetermined frame section based on the written data amount and the header information (extension information), and generates a data read clock corresponding to smoothing based on the calculation result. The control unit 210 controls the selector 215 based on the generated clock, and reads data written in the memories 214-1 to 214-4 in a predetermined order.

The control unit 210 also determines the read start timing of data written in the memories 214-1 to 214-4 based on information such as header information (extended information). The control unit 210 controls (timing of) the start of data reading based on the determined reading start timing.

The data (synthesized data) read out from the memories 214-1 to 214-4 are continuously output at a constant rate and output to the system-on-chip 203 as an output data stream.

The system-on-chip 203 applies predetermined processing such as decoding to the output data stream input from (the selector 215 of) the demodulation IC202-1, outputs the resulting video data (or image data) to a display (not shown) in the subsequent stage, and outputs audio data to an audio output device (not shown) in the subsequent stage.

The Display is a Display device (Display device) such as a Liquid Crystal Display (LCD) or an organic EL Display (OLED). The display displays a picture (or image) corresponding to the picture data (or image data) input by the system-on-chip 203.

The sound output device is for example a loudspeaker. The sound output device outputs sound (audio) corresponding to the sound data processed by the system-on-chip 203.

The receiving apparatus 20 having the new function is configured as described above.

Here, the new functions are mainly a header removal/smoothing function for solving the above-described fluctuation problem and a delay coping function for solving the above-described delay coping problem. Therefore, the header removal, smoothing function, and delay coping function are described in detail in this order below.

(example of header removal, smoothing function)

First, an example of the header removal and smoothing function in the new function will be described with reference to fig. 11 to 14.

Fig. 11 shows operations of each part in the demodulation IC202-1 corresponding to the header removal and smoothing functions and a signal flow thereof. Fig. 12 to 14 are flowcharts illustrating a process flow corresponding to the header removal and smoothing function.

In fig. 11, "S1 XX" corresponds to step S1XX in fig. 12 to 14, and the operations and signal flows of the respective parts shown in fig. 11 are referred to as appropriate when describing fig. 12 to 14. In this example, as shown in fig. 11, four types of waves, i.e., carriers #1 to #4, are received by the receiving apparatus 20.

(flow of Carrier wave correspondence processing)

Referring to the flowchart of fig. 12, a description will be given of a flow of carrier mapping processing executed by the demodulation section 211, TSMF processing sections 212-1 to 212-4, and TLV conversion sections 213-1 to 213-4 of the demodulation IC 202-1.

In step S111, the demodulation unit 211 applies demodulation processing to the received signal (the signal of the carrier #1 of the first wave) input thereto.

The transmission data stream obtained by the demodulation processing is supplied to the TSMF processing section 212-1. The TSMF processing units 212-2 to 212-4 are inputted with the transmission data streams of the external demodulation ICs 202-2 to 202-4, respectively. These transmission data streams are extracted from carriers #2 to #4 of the second to fourth waves.

Then, TSMF processing is performed by TSMF processing units 212-1 to 212-4 (S113), and TLV conversion is performed by TLV conversion units 213-1 to 213-4 (S114).

Here, the TSMF processing units 212 to N, TLV, i.e., the conversion units 213 to N, are set to have an initial value of N equal to 1(S112), and N is increased by N > 4 (yes in S116) (S115), and the loop of steps S113 to S116 is repeated to represent the TSMF processing (S113) performed by each TSMF processing unit 212 and the TLV conversion processing (S114) performed by each TLV conversion unit 213.

The TSMF processing unit 212-1 performs TSMF processing (S113), and supplies the transport stream including the TSMF packet identified by the identification information (stream _ id, original _ network _ id) to the TLV conversion unit 213-1, for example. In addition, in the TSMF process (S113), when (the TSMF header of) the TSMF packet is detected from the transport stream, the header information (extension information) is notified to the control unit 210.

The TSMF processing units 212-2 to 212-4 also perform TSMF processing (S113), as in the TSMF processing unit 212-1.

When the transport stream of the TSMF processing part 212-1 includes the split TLV packet, the TLV conversion part 213-1 performs TLV conversion processing for converting the split TLV packet into a TLV packet (S114).

Here, fig. 13 is a flowchart illustrating details of the TLV conversion process corresponding to step S114 of fig. 12.

In step S131, the TLV conversion unit 213-1 confirms the TLV packet start indicator included in the header of the divided TLV packet attached to the divided TLV packet.

In step S132, the TLV conversion section 213-1 determines whether the TLV packet start indicator is "1" based on the confirmation result of the header section.

In step S132, when it is judged that the TLV packet start indicator is designated as "1", the process proceeds to step S133. In step S133, the TLV conversion unit 213-1 writes 184 bytes of data in the payload section of the divided TLV packet into the memory 214-1.

That is, when the TLV packet start indicator stored in the header (header) of the split TLV packet of 3 bytes is "1", a header TLV indication of 1 byte is inserted into the payload part, and a header TLV indication area of 1 byte is secured in addition to the header of 3 bytes, so that the data of the payload part is the remaining 184 bytes in the split TLV packet of 188 bytes (a in fig. 5).

On the other hand, when it is judged in step S132 that the TLV packet start indicator is designated as "0", the process proceeds to step S134. In step S134, the TLV conversion unit 213-1 writes 185 bytes of data in the payload section of the divided TLV packet into the memory 214-1.

That is, when the TLV packet start indicator stored in the header (header) of the 3-byte split TLV packet is "0", no header TLV indication is inserted into the payload part, and it is not necessary to secure a 1-byte header TLV indication area in addition to the 3-byte header, and therefore, the data of the payload part is 185 bytes remaining in the 188-byte split TLV packet (fig. 5B).

If 184 bytes or 185 bytes of data are written in the memory 214-1 by the processing of step S133 or S134, the processing proceeds to step S135.

In step S135, the TLV conversion unit 213-1 notifies the control unit 210 of the data amount (e.g., the number of bytes) written in the memory 214-1.

After the process of step S135 is completed, the process returns to step S114 of fig. 12, and the subsequent processes are repeated.

That is, as with the TLV conversion unit 213-1, the TLV conversion units 213-2 to 213-4 perform TLV conversion processing (S114), and write 184 bytes or 185 bytes of data of the payload section of the split TLV packet into the memories 214-2 to 214-4, respectively (S133 or S134 in fig. 13). The TLV converters 213-2 to 213-4 notify the controllers 210 of the amounts of data written in the memories 214-2 to 214-4, respectively (S135).

When the loop of steps S113 to S116 ends, the process proceeds to step S117. In step S117, it is determined whether or not the process is ended.

If it is determined in step S117 that the processing is not to be ended, the processing returns to step S111, and the above-described processing is repeated. When it is determined in step S117 that the processing is ended, the carrier association processing in fig. 12 is ended.

The flow of the carrier mapping process is described above. In this carrier correlation process, when the TLV conversion units 213-1 to 213-4 write the data of the divided TLV packet into the memories 214-1 to 214-4, the header of the divided TLV packet is removed, and only the data of the payload portion (184 bytes or 185 bytes of data) is written (S133 or S134 in fig. 13).

In the description of fig. 12 and 13, for convenience of explanation, the TSMF processing units 212-1 to 212-4 sequentially perform the TSMF processing (S113) for each carrier, and then the TLV conversion units 213-1 to 213-4 sequentially perform the TLV conversion processing (S114) for each carrier, and actually, as shown in fig. 11, the TSMF processing (S113) and the TLV conversion processing (S114) are performed for each carrier in parallel.

(flow of data read clock control processing)

Next, the flow of the data read clock control process executed by the control section 210 of the demodulation IC202-1 will be described with reference to the flowchart of fig. 14. The data read clock control process is executed in parallel with the carrier wave correspondence process (fig. 12 and 13).

In step S151, the control unit 210 obtains header information (extension information) of the TSMF header notified by each of the TSMF processing units 212-1 to 212-4.

In step S152, the control unit 210 obtains the write data amounts notified by the TLV conversion units 213-1 to 213-4, respectively.

In step S153, the control unit 210 calculates all the data amounts (e.g., the total number of bytes) written in the memories 214-1 to 214-4 in the 1 superframe section based on the notified write data amount (e.g., the number of bytes).

In step S154, the control unit 210 calculates the time of the 1 superframe section based on the header information (extension information) of the notified TSMF header. Here, for example, by using frame position information (frame _ position) included in the extension information of the header information, the time of 1 superframe section can be calculated.

In step S155, the control unit 210 generates a data read clock corresponding to smoothing based on the calculated total data amount written in the 1 super frame section and the time of the 1 super frame section.

Here, the clock generated as the clock for data reading corresponds to a certain rate (for example, a bit rate (unit: Mbps)) obtained from a relationship between the total data amount (for example, the total number of bytes) written in the 1 superframe section and the time of the 1 superframe section, for example. Further, as a technique related to smoothing, for example, a technique disclosed in JP 2012-205266 is known, and the same technique can be used here.

In step S156, the control unit 210 reads the data written in the memories 214-1 to 214-4 by selecting the slave selector 215 based on the generated data read clock.

In this case, when the control unit 210 controls data reading in accordance with the data reading clock, the order of reading the memories 214-1 to 214-4 can be determined as follows, for example.

That is, for example, in the digital cable television broadcasting standard specification (JCTEA STD-002-6.1) established by the CATV technical association of japan, the arrangement order of the super frame slots of each carrier is defined, and the control unit 210 can determine the order of reading data from the memories 214-1 to 214-4 in which data obtained from the signals of the carriers (carriers #1 to #4) is written, based on the arrangement order of the slots. However, when controlling the reading order of the memory 214, information such as header information (extension information) of the TSMF header may be used.

In step S157, it is determined whether or not the process is ended.

If it is determined in step S157 that the processing is not to be ended, the processing returns to step S151, and the above-described processing is repeated. When it is determined in step S157 that the processing is ended, the data read clock control processing in fig. 14 is ended.

The flow of the data read clock control process is described above.

In this data read clock control process, header information (extension information) of TSMF headers of TSMF processing units 212-1 to 212-4 and write data amounts of TLV conversion units 213-1 to 213-4 (S151 and S152 in fig. 11) are sequentially notified by carrier association processes (fig. 12 and 13) executed in parallel, and the control unit 210 generates data read clocks (S153 to S155 in fig. 11) corresponding to smoothing based on the header information (extension information) and the write data amounts, and controls data reading (S156 in fig. 11), thereby achieving smoothing.

As described above, the above-described fluctuation problem can be solved by a new function of header removal, smoothing function.

That is, in the header removal and smoothing function, when writing the data of the divided TLV packets into the memories 214-1 to 214-4, the data written in the payload part by removing the header of the divided TLV packets (the processing shown in fig. 12 and 13) is smoothed based on the amount of the data to be written when reading the data from the memories 214-1 to 214-4 (the processing shown in fig. 14), and therefore, for example, when writing the data into the memories 214-1 to 214-4, even if there is random mixing of data having different byte numbers such as 184 bytes and 185 bytes, the smoothing can be performed more thoroughly.

As a result, when data having different byte counts is randomly mixed at the time of writing data, the fluctuation can be reduced (reduced), and the problem of fluctuation can be solved (smoothing can be performed with a minimum number of memories). In addition, the configuration of the demodulation IC202-1 (fig. 10) of the reception apparatus 20 having the new function requires smoothing twice in comparison with the configuration of the demodulation IC902 (fig. 7) of the reception apparatus 20 having the conventional function, and the demodulation IC202-1 (fig. 10) having the new function only needs smoothing once, so that the number of memories, circuits, and the like can be reduced, for example.

(examples of delay coping function)

Next, with reference to fig. 15 to 17, an example of the delay coping function in the new function is explained.

Fig. 15 shows an example of setting the data read start timing by the delay coping function.

In fig. 15, 4 carriers #1 to #4 are received by the receiving apparatus 20. In the demodulation IC202-1, the transmission data streams corresponding to the signals of the carriers #1 to #4 are input to the TSMF processing sections 212-1 to 212-4, respectively, where the carriers are delayed.

That is, when focusing on carrier #1, the delays of carrier #2, carrier #3, and carrier #4 become larger in order with respect to carrier # 1. In this example, the delay amount (delay time) of the carrier #2, the carrier #3, and the carrier #4 with respect to the carrier #1 is smaller than 1/2 superframe section (less than 1/2 of the time corresponding to the length of 1 superframe).

In the demodulation IC202-1, memories 214-1 to 214-4 have capacities corresponding to data of size 3/2 superframe interval (1 superframe interval +1/2 superframe interval).

In the demodulation IC202-1, TSMF processing units 212-1 to 212-4 perform TSMF processing, respectively, and TLV conversion units 213-1 to 213-4 perform TLV conversion, respectively, so that data obtained from signals of 4 carriers #1 to #4 are sequentially written into memories 214-1 to 214-4, respectively.

Here, the control unit 210 identifies the head position of each carrier of the synthesis target corresponding to the frame position information (frame _ position) based on the header information (extension information) of the TSMF header notified from each of the TSMF processing units 212-1 to 212-4. In the example of fig. 15, the head position of carrier #1 (reference carrier) among carriers #1 to #4 is identified.

The control unit 210 calculates a read start time Ts as a timing for starting reading data written in the memories 214-1 to 214-4. Here, for example, the readout start time Ts when the header of the reference carrier #1 (the earliest carrier #1) is set as a reference in the 4 carriers #1 to #4 satisfies the relationship shown in the following expression (1) with respect to the time Tsf corresponding to the length of 1 super frame.

Ts＜1/2×Tsf……(1)

For example, as shown in fig. 15, in 4 carriers #1 to #4, the read start time Ts is later in time than the head of the latest carrier #4 with reference to the head of the earliest carrier # 1.

Then, the control unit 210 controls the selector 215 to start reading the data written in the memories 214-1 to 214-4 at the timing of the reading start time Ts.

By starting reading data at such a timing and obtaining a composite data stream as an output data stream, as shown in fig. 15, the delay of each of carrier #2, carrier #3, and carrier #4 with respect to carrier #1 can be absorbed when the read start time Ts is located behind the head of the most delayed carrier # 4.

(flow of data read-out start timing control processing)

Next, the flow of the data read start timing control process executed by the control section 210 of the demodulation IC202-1 will be described with reference to the flowchart of fig. 16. The data read start timing control process may be executed in parallel with the carrier wave association process (fig. 12 and 13) and the data read clock control process (fig. 14).

In step S171, the control unit 210 obtains header information (extension information) of the TSMF header notified by each of the TSMF processing units 212-1 to 212-4.

In step S172, the control unit 210 identifies the head position of each carrier of the synthesis target based on the frame position information (frame _ position) included in the notified header information (extension information). Here, for example, when the carrier #2, the carrier #3, and the carrier #4 are delayed with respect to the carrier #1, the head position of the carrier #1 (reference carrier) among the carriers #1 to #4 is identified.

In step S173, the control unit 210 determines the read start timing for starting reading of the data written in the memories 214-1 to 214-4. Here, the read start time Ts satisfying the relationship of the above expression (1) is specified as the read start time from the head position of the carrier #1 recognized.

In step S174, the control unit 210 starts reading data written in the memories 214-1 to 214-4 when the read start time Ts is reached based on the determined read start timing.

The flow of the data read start timing control process is described above.

As described above, the delay coping problem can be solved by the delay coping function of the new function.

That is, in this delay coping function, the memories 214-1 to 214-4 are provided for each of a plurality of carriers (for example, carriers #1 to #4), and the data written in the memories 214-1 to 214-4 is started to be read at the timing of the read start time Ts satisfying the relationship of the above expression (1) to absorb the delay of each carrier, so that the receiving side can cope with a predetermined delay (for example, cope with a delay required by the receiving side according to the usage specification) (the respective carriers in which the delay occurs can be synchronized).

In addition, in the demodulation IC202-1 (fig. 10) of the reception apparatus 20 having a new function, a predetermined delay can be dealt with on the reception side by the configuration shown in fig. 10, and for example, it is not necessary to use a circuit such as a delay matching circuit, and the number of circuits can be reduced.

(other constitution example of demodulation IC)

In FIG. 17, a demodulation IC202-1 includes a demodulation section 211, TSMF processing sections 212-1 to 212-4, memories 214-1 to 214-4, and a selector 215. That is, the demodulation IC202-1 in FIG. 17 is different from the demodulation IC202-1 in FIG. 10 in that TLV conversion units 213-1 to 213-4 are omitted.

The TSMF processing unit 212-1 performs TSMF processing on the transport stream from the demodulation unit 211, and writes the resultant data in the memory 214-1.

The TSMF processing units 212-2 to 212-4 perform TSMF processing on the transmission data streams of the external demodulation ICs 202-2 to 202-4, respectively, and write the resultant data into the memories 214-2 to 214-4, respectively, as in the TSMF processing unit 212-1.

Header information (extension information) of TSMF headers of the TSMF processing units 212-1 to 212-4 is notified to the control unit 210. The control unit 210 calculates, as the timing to start reading the data written in each of the memories 214-1 to 214-4, the read start time Ts satisfying the relationship of the above expression (1) based on the header information (extension information) of the notified TSMF header.

As described above, in the configuration shown in fig. 17, although the TLV converters 213-1 to 213-4 are omitted, when a TS packet (a fixed-length packet of 188 bytes) is synthesized as a fixed-length packet instead of a variable-length packet, the delay-handling function can be applied even in the case where data is directly written into the memories 214-1 to 214-4 without passing through the TLV converters 213-1 to 213-4.

That is, in the case of the multicarrier transmission scheme, the demodulation IC202-1 on the receiving side may apply only the delay handling function among the above-described new functions when processing (combining) fixed length packets such as TS packets.

< 2. modification example >

(other constitution of the receiving apparatus)

In the above description, the reception device 20 (fig. 1) is described as a fixed receiver such as a television receiver or a set-top box (STB), but the fixed receiver also includes, for example, a recorder, a game machine, a personal computer, a network storage, and the like. The receiving device 20 is not limited to a fixed receiver, and includes, for example, a mobile receiver such as a smartphone, a mobile phone, a tablet computer, or the like, an in-vehicle device such as an in-vehicle television Mounted on a vehicle, and an electronic device such as a wearable computer such as a Head Mounted Display (HMD).

Further, the demodulation IC202-1 (demodulation device) constituting the reception apparatus 20 (fig. 1) can also be understood as a reception apparatus or a demodulation apparatus to which the present technology is applied. In the above description, the number of the plurality of carriers is 2 to 4, but the number of the carriers may be any number as long as the number is 2 or more (for example, 5 or more).

In this case, the receiving apparatus 20 (fig. 10) is provided with tuners 201-1 to 201-N and demodulation ICs 202-1 to 202-N corresponding to the number of N (N is an integer of 2 or more) carriers. In addition, the demodulation IC202-1 (FIG. 10) is provided with a demodulation unit 211, N TSMF processing units 212-1 to 212-N, N TLV conversion units 213-1 to 213-N, and N memories 214-1 to 214-N, respectively. The number of the tuner 201, the demodulation IC202, the TSMF processing unit 212, the TLV conversion unit 213, and the memory 214 is not necessarily the same as the number of carriers, and may be larger than the number of carriers.

(constitution including communication line)

Although not shown in the drawing, the transmission system 1 (fig. 1) may be configured such that various servers are connected to a communication line such as the internet, and the receiving device 20 (fig. 1) having a communication function can perform bidirectional communication by accessing the various servers through the communication line such as the internet, and can receive various data such as contents and applications.

(others)

In addition, the terms described in this specification are examples, and are not intended to exclude the use of other terms. For example, in the above description, frames may be replaced by other terms such as packets.

< 3. constitution of computer

The series of processes described above may be executed by hardware or software. When a series of processes is executed by software, a program constituting the software is installed on a computer. Fig. 18 is a diagram showing an example of the configuration of computer hardware for executing the series of processing described above by a program.

In the computer 1000, a cpu (central Processing unit)1001, a rom (read Only memory)1002, and a ram (random Access memory)1003 are connected to each other via a bus 1004. An input/output interface 1005 is also connected to the bus 1004. The input/output interface 1005 is connected to an input unit 1006, an output unit 1007, a recording unit 1008, a communication unit 1009, and a driver 1010.

The input unit 1006 includes a keyboard, a mouse, a microphone, and the like. The output unit 1007 includes a display, a speaker, and the like. The recording unit 1008 includes a hard disk, a nonvolatile memory, and the like. The communication section 1009 includes a network interface and the like. The drive 1010 drives a removable recording medium 1011 such as a magnetic disk, an optical magnetic disk, or a semiconductor memory.

In the computer 1000 configured as described above, the CPU1001 loads and executes the programs recorded in the ROM1002 or the recording unit 1008 to the RAM1003 via the input/output interface 1005 and the bus 1004, thereby performing the series of processing described above.

The program executed by the computer 1000(CPU1001) can be provided by being recorded in a removable recording medium 1011 such as a package medium. Further, the program may be provided through a wired or wireless transmission medium such as a local area network, the internet, digital satellite broadcasting, or the like.

In the computer 1000, the program can be installed in the recording unit 1008 via the input/output interface 1005 by installing the removable recording medium 1011 in the drive 1010. Further, the program may be received by the communication section 1009 via a wired or wireless transmission medium, and installed to the recording section 1008. The program may be installed in the ROM1002 or the recording unit 1008 in advance.

Here, in this specification, the processing executed by the computer in accordance with the program is not necessarily executed in time in the order described in the flowcharts. That is, the processing executed by the computer according to the program also includes processing executed in parallel or individually (for example, parallel processing or processing determined by an object). The program may be processed by one computer (processor) or may be distributed by a plurality of computers.

The embodiments of the present technology are not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the present technology.

The present technology can be configured as follows.

(1)

A receiving apparatus includes a control unit configured to control a clock for reading data written in a memory based on an amount of data written in a section of a predetermined frame and a time of the section of the predetermined frame when data in a payload section among header sections and payload sections constituting divided variable-length packets is sequentially written in the memory when the divided variable-length packets are included in a transmission data stream transmitted by each of a plurality of carriers and the divided variable-length packets are divided.

(2)

The reception device according to the above (1), further comprising:

a plurality of conversion units provided corresponding to the number of carriers; and

a plurality of the memories are provided corresponding to the plurality of the conversion parts;

the conversion unit removes the header portion from each of the input divided variable-length packets, and writes the data of the payload portion into the corresponding memory.

(3)

The reception apparatus according to the (2), wherein,

the control section calculates all data amounts written in the plurality of memories within a section of the predetermined frame based on the write data amounts notified from the conversion sections, respectively,

calculating the time of the interval of the predetermined frame based on the header information of the multi-frame header contained in the predetermined frame,

and controls the clocks for reading out the data written in the plurality of memories, respectively, based on the results of these calculations.

(4)

The reception apparatus according to any one of the above (1) to (3), wherein the clock corresponds to a certain rate obtained from a relationship between all data amounts written within a section of the predetermined frame and a time of the section of the predetermined frame.

(5)

The reception apparatus according to the above (3) or (4), wherein the control unit controls an order of reading the data from the plurality of memories based on an order of arrangement of time slots allocated in predetermined units to the respective carriers.

(6)

The reception apparatus according to the above (3), wherein the control unit controls, when the carrier is delayed, such that: and a controller configured to start reading the data written in each of the plurality of memories at a timing of a reading start time Ts, where Ts < 1/2 × Tsf, when the reading start time Ts is a reading start time based on a header of a reference carrier among the plurality of carriers, and a time Tsf is a time corresponding to the length of the predetermined frame.

(7)

The reception apparatus according to the (6), wherein the delay is less than 1/2 of a time corresponding to a length of the predetermined frame between each of the plurality of the carriers,

when the earliest carrier among the plurality of carriers is used as a reference carrier, the read start time Ts is a timing later than the head of the latest carrier in terms of time.

(8)

The reception apparatus according to the above (6) or (7), wherein the control unit identifies the headers of the plurality of carriers based on frame position information of the carriers included in header information of the multi-frame header.

(9)

The reception apparatus according to any one of the above (1) to (8), wherein the predetermined frame includes a frame composed of a plurality of multiframes.

(10)

The reception apparatus according to (2) or (3), wherein, in a case where the payload portion of the divided variable-length packet includes a header of the variable-length packet and does not include a header of the variable-length packet, amounts of data written to the payload portions of the corresponding memories by the respective conversion portions are different.

(11)

The reception device according to any one of the above (1) to (10), wherein the reception device is configured as a demodulation device.

(12)

A method of receiving a signal having a first frequency,

the receiving apparatus performs the following control:

when a divided variable-length packet formed by dividing a variable-length packet is included in a transport stream transmitted by each of a plurality of carriers, and when data of a payload section among a header section and a payload section constituting the divided variable-length packet is sequentially written into a memory, a clock for reading the data written into the memory is controlled based on the amount of data written in a section of a predetermined frame and the time of the section of the predetermined frame.

Description of the reference numerals

1 … transmission system; 10 … sending means; 20 … receiving means; 30 … CATV transmission lines; 201. 201-1 to 201-4 … tuners; 202. 202-1 to 202-4 … demodulation ICs; 203 … system on a chip (SoC); 210 … control section; 211 … demodulation unit; 212. 212-1 to 212-4 … TSMF processing units; 213. 213-1 to 213-4 … TLV conversion part; 214. 214-1 to 214-4 …; a 215 … selector; 1000 … computer; 1001 … CPU.

Claims

1. A kind of receiving device is disclosed, which comprises a receiving unit,

the apparatus includes a control unit configured to control a clock for reading data written in a memory based on an amount of data written in a section of a predetermined frame and a time of the section of the predetermined frame when data in a payload section among a header section and a payload section constituting a divided variable-length packet is sequentially written in the memory when the divided variable-length packet is included in a transport stream transmitted by each of a plurality of carriers and the data in the payload section is written in the memory.

2. The receiving device of claim 1,

the receiving apparatus further includes:

a plurality of the memories provided corresponding to the plurality of the conversion portions,

3. The receiving device of claim 2,

4. The receiving device of claim 3,

the clock corresponds to a certain rate obtained from a relationship between all data amounts written within the interval of the predetermined frame and the time of the interval of the predetermined frame.

5. The receiving device of claim 3,

the control unit controls an order of reading the data from the plurality of memories based on an order of arrangement of time slots allocated in predetermined units to the carriers.

6. The receiving device of claim 3,

the control unit controls, when the carrier is delayed, the carrier to: and a controller configured to start reading the data written in each of the plurality of memories at a timing of a reading start time Ts, where Ts < 1/2 × Tsf, when the reading start time Ts is a reading start time based on a header of a reference carrier among the plurality of carriers, and a time Tsf is a time corresponding to the length of the predetermined frame.

7. The receiving device of claim 6,

the delay is less than 1/2 of a time corresponding to the length of the predetermined frame between each of the plurality of the carriers,

8. The receiving device of claim 7,

the control unit identifies the headers of the plurality of carriers based on frame position information of the carriers included in header information of the multi-frame header.

9. The receiving device of claim 1,

the predetermined frame includes a frame composed of a plurality of multiframes.

10. The receiving device of claim 2,

in a case where the payload section of the divided variable-length packet includes a header of the variable-length packet and a header of the variable-length packet is not included, the amount of data written into the payload section of the corresponding memory by each of the conversion sections is different.

11. The receiving device of claim 1,

the receiving device is configured as a demodulating device.

12. A method of receiving a signal having a first frequency,

the receiving apparatus performs the following control: