CN112241375A - Memory allocation method and device and terminal equipment - Google Patents
Memory allocation method and device and terminal equipment Download PDFInfo
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Abstract
The embodiment of the invention discloses a memory allocation method, a memory allocation device and terminal equipment, which are applied to the technical field of communication and can solve the problem of waste of storage space caused by the fact that the storage space in a memory is not reasonably utilized in the prior art. The method comprises the following steps: dividing R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers, and determining to divide a memory into K storage areas corresponding to the K carrier groups; according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas; wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
Description
Technical Field
The embodiment of the invention relates to the technical field of communication, in particular to a memory allocation method, a memory allocation device and terminal equipment.
Background
A hybrid automatic repeat request (HARQ) retransmission mechanism with soft combining in a modem chip of a terminal device is a key technology for improving the demodulation performance of the terminal. By using the HARQ retransmission with soft combining, the terminal equipment stores the data which is received from the base station and can not be decoded correctly in the HARQ buffer memory, and performs soft combining and decoding with the data received by retransmission, and the combined data has more reliable decoding performance compared with the data transmitted once. The amount of data to be stored for implementing the HARQ retransmission and soft combining mechanism is associated with the number of carriers, the number of HARQ processes, the size of a transport block, and the size of each soft bit, which are allocated to the terminal device by the base station. At present, a HARQ memory on a terminal device chip allocates a buffer memory area for each carrier, the HARQ memory is divided into different areas according to the size of the maximum transmission block supported by each carrier, and then sub-partition blocks are allocated to each area according to the maximum HARQ process number supported by each carrier, where the number of the sub-partition blocks is the maximum HARQ process number or the maximum transmission block number supported by the corresponding carrier.
However, at present, the HARQ storage area is allocated according to the maximum number of HARQ processes supported by each carrier, on one hand, under the condition that the storage space of the HARQ storage is limited, the storage area cannot be allocated to each carrier; on the other hand, most of the HARQ memories are in an idle state for most of the time, so that the memory space of the memory is not reasonably utilized by the existing memory partitioning method, and the memory space is wasted.
Disclosure of Invention
The embodiment of the invention provides a memory allocation method, a memory allocation device and terminal equipment, which are used for solving the problem that the memory space in a memory is not reasonably utilized in the prior art, so that the memory space is wasted.
In order to solve the above technical problem, the embodiment of the present invention is implemented as follows:
in a first aspect, a method for allocating memory is provided, the method including: dividing R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers, and determining to divide a memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
In a second aspect, an apparatus for allocating memory is provided, the apparatus comprising: the processing module is used for dividing the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers, and determining to divide the memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
In a third aspect, a terminal device is provided, the processor, the memory and a computer program stored on the memory and operable on the processor, the computer program, when executed by the processor, implementing the memory allocation method according to the first aspect.
In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when executed by a processor, implements the method of allocating transmission memory according to the first aspect.
In the embodiment of the invention, R carriers are divided into K carrier groups according to the soft bit number corresponding to the maximum transmission block of the distributed R carriers, and a memory is determined to be divided into K storage areas corresponding to the K carrier groups; according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas; wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1. Through the scheme, K storage areas can be divided for K carrier groups in R carriers according to the soft bit number corresponding to the maximum transmission block of the carriers, and each storage area in the K storage areas is divided into M appointed sub-storage areas based on the total available space of the storage.
Drawings
Fig. 1 is a schematic diagram illustrating a possible allocation of a HARQ buffer according to an embodiment of the present invention;
fig. 2 is a schematic diagram of performance curves of different compression ratios under initial transmission and retransmission conditions according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a probability curve that when the BLER is 10% and the number of HARQ processes supported by each carrier is 16, the number of HARQ processes occupying the HARQ buffer area is greater than N;
FIG. 4 is a first diagram illustrating a method for allocating memory according to an embodiment of the present invention;
FIG. 5 is a second schematic diagram illustrating a memory allocation method according to an embodiment of the present invention;
fig. 6 is a schematic diagram illustrating a possible allocation of a HARQ buffer according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of an apparatus for allocating memory according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a hardware structure of a terminal device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, in the embodiments of the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "e.g.," an embodiment of the present invention is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.
First, the related technical content of the embodiment of the invention is introduced:
the memory in the embodiment of the present invention may be a buffer memory, and optionally, the buffer memory may be a HARQ buffer memory.
For a terminal device in a New Radio (NR) system and a terminal device in a Long Term Evolution (LTE) system, an HARQ retransmission mechanism with soft combining in a modem chip of the terminal device is a key technology for improving demodulation performance of the terminal device. By using the HARQ retransmission with soft combining, the terminal device can store the data which is received from the base station in the multi-carrier mobile communication network and cannot be decoded correctly in the HARQ buffer memory, and perform soft combining and decoding with the data received by retransmission, so that the combined data has more reliable decoding performance compared with the data transmitted once.
When implementing the HARQ retransmission and soft combining mechanism, the amount of data stored in the HARQ buffer memory is related to the number of carriers allocated to the terminal device by the network, the number of HARQ processes allocated to the terminal device, the size of the transport block allocated to the terminal device (i.e., the number of soft bits supported by the transport block), and the size of each soft bit (i.e., the number of bits supported by the soft bits).
One possible HARQ buffer memory allocation method is to semi-statically allocate a buffer memory area to each carrier. When the number of carriers allocated to the terminal device by the network and the configuration of the carriers change, the partitioning can be performed by the following steps:
step 1: the memory is divided into different regions according to the maximum transport block size supported by each carrier.
Step 2: and allocating a sub-storage area for each area according to the maximum HARQ process number supported by each carrier and the maximum transmission block number.
The number of the sub-memory areas is the maximum HARQ process number or the maximum transmission block number supported by the corresponding carrier, and the size of the sub-memory area is the maximum transmission block size supported by each process of the corresponding carrier.
In the embodiment of the invention, the memory allocation method can be applied to various systems. Optionally, the method can be applied to an LTE system, an NR system, or an LTE-NR dual connectivity system.
For the scenario applied in LTE-NR dual connectivity system, the HARQ buffer memory will be partitioned as follows:
1. because the maximum transport block sizes supported by all carriers of the LTE are the same, all LTE carriers will be divided into one storage area;
2. because of the difference in carrier bandwidths of NRs, the maximum transport block sizes supported by the carriers will also be different, and NR carriers with the same maximum transport block size will be divided into one region and NR carriers with different maximum transport block sizes will be divided into different regions.
Illustratively, assuming there are N NR carriers with different maximum transport block sizes, the NR carriers will correspond to N bins Di, where i is 0,1, …, N-1.
Table 1 shows HARQ partition parameters obtained according to one possible allocation method of the HARQ buffer memory described above.
TABLE 1
Fig. 1 is a schematic diagram of the allocation of the allocated HARQ buffer according to the above possible allocation method of the HARQ buffer.
The problem with the above HARQ memory allocation method is:
1) allocating HARQ buffers according to the maximum number of HARQ processes supported by each carrier may occupy a very large memory space. Under the condition that the on-chip HARQ storage space is limited, the maximum HARQ process number cannot be allocated to each carrier, and most HARQ buffer storage areas cannot be occupied in most of time, so that the waste of the storage space is caused.
For example, fig. 2 is a probability curve that when the Block error rate (BLER) is 10% (i.e., PRE ═ 1 in fig. 2), and the number of HARQ processes supported by each carrier is 16 (i.e., nHARQ ═ 16 in fig. 2), the number of HARQ processes occupying the HARQ buffer storage area at the same time is greater than N (prob (# buffered proc > N), it can be seen from fig. 2 that when the number of carriers is 8, the total number of HARQ processes is 128, but the probability that the number of HARQ processes occupying the HARQ buffer storage area at the same time is greater than 24 does not exceed one per thousand, so it is not necessary to allocate HARQ storage space for each carrier according to the maximum number of HARQ processes, for example, in the case of 8 carriers, if a buffer storage area of 24 HARQ processes is allocated in total, and all the processes of 8 carriers share the buffer storage area of 24 HARQ processes, the performance requirement can be satisfied, where nCC in fig. 2 represents the number of carriers, for example, nCC-8 represents 8 carriers.
2) The soft bits of all the transmission blocks have the same bit number, that is, all the soft bits adopt the same compression ratio, so that the LTE main carrier and the NR main carrier transmit signaling information, which has higher requirements on the reliability of data than the auxiliary carrier, and if the main carrier adopts the same compression ratio, the data transmission reliability of the main carrier is affected to a certain extent.
Fig. 3 is a performance curve for different compression ratios in the case of initial transmission and retransmission. In fig. 3, the abscissa represents the signal-to-noise ratio (SNR), and the ordinate represents the block error rate (BLER), it can be seen that the SNR is close to that of 3-bit vector compression (i.e., compression ratio of 3, which is represented as 3-bit SQ in fig. 3) and no bit compression (which is represented as no comp in fig. 3) during the first retransmission and the second retransmission, the performance degradation of about 0.5dB is caused by 2-bit vector compression (i.e., compression ratio of 2, which is represented as 2-bit SQ in fig. 3), and the performance loss of more than 1dB is caused by 1.1-bit vector compression (i.e., compression ratio of 1.1, which is represented as 1.1-bit SQ in fig. 3). Wherein initTX in fig. 3 represents initial transmission, 1st reTx represents primary transmission, and 2nd reTx represents secondary retransmission.
As shown in fig. 4, an embodiment of the present invention provides a method for allocating a memory, where the method includes:
401. and dividing the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers.
In the embodiment of the present invention, carriers with the same soft bit number corresponding to the maximum transport block may be divided into the same carrier group, and carriers with different soft bit numbers corresponding to the maximum transport block may be divided into different carrier groups.
For example, taking application in an LTE-NR dual connectivity system as an example, it is assumed that carriers allocated by a base station for a terminal device include 1 LTE primary carrier, 3 LTE secondary carriers, 1 NR primary carrier, and 2 NR secondary carriers, and soft bit numbers supported by the 1 LTE primary carrier and the 3 LTE secondary carriers are all E, soft bit numbers supported by the 1 NR primary carrier are a, and soft bit numbers supported by the 2 NR secondary carriers are B, C, D, respectively. If the carriers are divided according to the soft bit number corresponding to the maximum transport block, it may be determined that 1 LTE primary carrier and 3 LTE secondary carriers are divided into a carrier group 1, 1 NR primary carrier is divided into a carrier group 2, 1 NR primary carrier is divided into a carrier group 3, and a first secondary carrier of the 2 NR secondary carriers is divided into a carrier group 4 and a second secondary carrier of the 2 NR secondary carriers is divided into a carrier group 5. So that 7 carriers can be divided into 5 carrier groups.
Optionally, the R carriers may be divided into K carrier groups according to the soft bit number corresponding to the allocated maximum transport block of the R carriers and the carrier types of the R carriers.
Optionally, the dividing, according to the soft bit number corresponding to the maximum transport block in the allocated R carriers and the carrier types of the R carriers, the R carriers into K carrier groups includes:
determining the soft bit number corresponding to the maximum transmission block of each carrier;
and dividing carriers which have the same soft bit number and belong to the same carrier type into the same carrier group to obtain K carrier groups.
Optionally, for the LTE-NR dual connectivity system, the carrier types may include: an LTE main carrier, an LTE auxiliary carrier, an NR main carrier and an NR auxiliary carrier.
Optionally, for the LTE system, the carrier types may include: LTE primary carrier and LTE secondary carrier.
Optionally, for the LTE system, the carrier types may include: NR primary carrier and NR secondary carrier.
For example, taking application in an LTE-NR dual connectivity system as an example, it is assumed that carriers allocated by a base station to a terminal device include 1 LTE primary carrier, 3 LTE secondary carriers, 1 NR primary carrier, and 2 NR secondary carriers, and soft bit numbers supported by the 1 LTE primary carrier and the 3 LTE secondary carriers are all E, soft bit numbers supported by the 1 NR primary carrier are a, and soft bit numbers supported by the 2 NR secondary carriers are B, C, D, respectively. If the carriers are divided according to the number of soft bits corresponding to the maximum transport block and the carrier type, it may be determined that 1 LTE primary carrier is divided into a carrier group 1, 3 LTE secondary carriers are divided into a carrier group 2, 1 NR primary carrier is divided into a carrier group 3, 1 NR primary carrier is divided into a carrier group 4, and a first one of the 2 NR secondary carriers is divided into a carrier group 5 and a second one of the 2 NR secondary carriers is divided into a carrier group 6. So that 7 carriers can be divided into 6 carrier groups.
402. It is determined to divide the memory into K memory regions corresponding to the K carrier groups.
In the embodiment of the present invention, each of the K carrier groups may be allocated with a corresponding storage area.
403. And determining to divide each storage area in the K storage areas into M sub-storage areas according to the total available space of the storage.
Wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
Optionally, the method for determining to divide each of the K storage areas into M sub-storage areas according to the total available space of the memory includes:
403a, determining the total available space of the memory.
And 403b, calculating the bit number of the sub-storage area in each storage area according to the soft bit number supported by the maximum transmission block of the carrier wave corresponding to each storage area and the bit number corresponding to each soft bit.
And 403c, calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the bit number of the sub-storage areas in each storage area.
Optionally, calculating, according to the total available space of the memory, the number M of the sub-memory regions in each memory region by combining the number of bits of the sub-memory regions in each memory region, and including:
calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the following formula I;
the first formula is as follows:
m represents the number of sub-memory areas of each memory area, K represents the number of memory areas, T represents the total available space of the memory, SiIndicating the number of bits included in the ith sub-storage area.
403d, determining to divide each of the K memory areas into M sub-memory areas.
Optionally, after determining the number M of the sub-storage areas in each storage area, it may be determined to divide the storage area into M sub-storage areas.
In the embodiment of the present invention, the total available space of the storage area may be divided into N storage areas, and each storage area includes M sub-storage areas.
In the embodiment of the invention, R carriers are divided into K carrier groups according to the soft bit number corresponding to the maximum transmission block of the distributed R carriers, and a memory is determined to be divided into K storage areas corresponding to the K carrier groups; according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas; wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1. Through the scheme, K storage areas can be divided for K carrier groups in R carriers according to the soft bit number corresponding to the maximum transmission block of the carriers, and each storage area in the K storage areas is divided into M appointed sub-storage areas based on the total available space of the storage.
Generally, since the total available space of the memory is relatively limited, generally, when allocating memory areas for carriers according to the maximum number of HARQ processes, there is no way to allocate memory areas for each carrier, a memory area cannot be allocated for each carrier, and for the carriers allocated to the memory areas, all the allocated memory areas may not be occupied. In order to solve the problem of memory partitioning in the prior art, in the embodiment of the present invention, a certain memory area is allocated to each carrier, and when the total available space of the memory is partitioned by the maximum number of HARQ processes, it is not sufficient to allocate a memory space to each carrier, and it can be preferentially ensured that each carrier is allocated to a memory area. Furthermore, in the embodiment of the present invention, after the storage area is allocated to each carrier, the remaining storage space is allocated to the carrier with the higher priority, so that the storage space of the carrier with the higher priority can be further ensured to be more sufficient, and the effect of reasonably allocating the storage space of the memory is achieved.
As shown in fig. 5, an embodiment of the present invention further provides a method for allocating a memory, where the method includes:
501. and determining the soft bit number corresponding to the maximum transmission block in the allocated R carriers.
Optionally, R carriers allocated by the base station to the terminal device may be determined first, and the soft bit number corresponding to the maximum transport block of each carrier in the R carriers is determined, that is, the size of the maximum transport block of each carrier in the R carriers is determined.
502. And dividing carriers which have the same soft bit number and belong to the same carrier type into the same carrier group to obtain K carrier groups.
For example, taking application in an LTE-NR dual connectivity system as an example, it is assumed that carriers allocated by a base station to a terminal device include 1 LTE primary carrier, 3 LTE secondary carriers, 1 NR primary carrier, and 2 NR secondary carriers, and soft bit numbers supported by the 1 LTE primary carrier and the 3 LTE secondary carriers are all E, soft bit numbers supported by the 1 NR primary carrier are a, and soft bit numbers supported by the 2 NR secondary carriers are B, C, D, respectively. If the carriers are divided according to the number of soft bits corresponding to the maximum transport block and the carrier type, it may be determined that 1 LTE primary carrier is divided into carrier group 1, 3 LTE secondary carriers are divided into carrier group 2, 1 NR primary carrier is divided into carrier group 3, 1 NR primary carrier is divided into carrier group 4, a first one of the 2 NR secondary carriers is divided into carrier group 5, and a second one of the 2 NR secondary carriers is divided into carrier group 6, so that 7 carriers may be divided into 6 carrier groups.
503. It is determined to divide the memory into K memory regions corresponding to the K carrier groups.
For example, in the above example, by dividing 7 carriers into 6 carrier groups, one storage area may be divided in the memory for each of the 6 carrier groups, that is, the memory may be divided into 6 storage areas.
504. Each of the K storage areas is divided into M sub-storage areas according to the total available space of the memory.
The memory allocation method in the embodiment of the invention allocates a certain number of sub-memory areas according to the total available size (i.e. total available space) of the HARQ buffer memory on the available chip, i.e. allocates a certain number of HARQ processes, so that the number of HARQ processes of each carrier can be reduced to reduce the HARQ memory space.
According to the above steps, for the scenario of LTE-NR dual connectivity, the HARQ buffer memory will be divided into the following areas:
dividing a storage area corresponding to a carrier group of an LTE main carrier;
dividing a storage area corresponding to the carrier group of the LTE auxiliary carrier;
dividing a storage area corresponding to a carrier group of the NR main carrier;
the NR secondary carriers are divided into N storage areas Di of different maximum transport block sizes corresponding to the carrier group of the NR primary carrier, i being 0,1, …, N-1.
Illustratively, table 2 shows a possible HARQ memory partition parameter provided by an embodiment of the present invention.
TABLE 2
As shown in fig. 6, an embodiment of the present invention provides an allocation diagram for allocating HARQ buffer memory according to the partition parameters of the HARQ memory shown in table 2.
Optionally, in the embodiment of the present invention, after each of the K storage areas is divided into M sub-storage areas according to the total available space of the memory, the target data may be stored in the target storage area when the target data is received by the target carrier. And the target storage area is a storage area corresponding to the carrier group where the target carrier is located in the K storage areas.
In the embodiment of the invention, R carriers are divided into K carrier groups according to the soft bit number corresponding to the maximum transmission block of the distributed R carriers, and a memory is determined to be divided into K storage areas corresponding to the K carrier groups; according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas; wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1. Through the scheme, K storage areas can be divided for K carrier groups in R carriers according to the soft bit number corresponding to the maximum transmission block of the carriers, and each storage area in the K storage areas is divided into M appointed sub-storage areas based on the total available space of the storage.
505. A priority is determined for each of the K carrier groups.
506. If the memory has remaining available space, the remaining available space is allocated according to the priority of each of the K carrier groups.
After allocating the total available space of the memory according to the methods 505 to 504 described above, there may be remaining available space, which may be allocated to a carrier group having a higher priority at this time.
Optionally, the remaining available space may be used as at least one sub-storage area, and is allocated to a target carrier group with a priority higher than a preset priority in the K carrier groups.
For example, for a LTE-NR dual connectivity scenario, based on the requirement of different carriers for reliability performance, the priority of the LTE carrier may be set higher than that of the NR carrier, and the priority of the primary carrier may be set higher than that of the secondary carrier.
Illustratively, the LTE primary carrier priority is 3, the LTE secondary carrier priority is 2, the NR primary carrier priority is 1, and the NR secondary carrier priority is 0.
If there is remaining available space in the memory, the remaining available space may be allocated to the carrier group (i.e., the target carrier group) where the LTE host carrier with priority 3 is located, so as to ensure that the LTE host carrier has sufficient storage space.
In the embodiment of the invention, as for the existence of the residual available space in the memory, the residual available space can be allocated to the target carrier group with the priority higher than the preset priority, so that the enough storage space of the carrier with higher priority can be preferentially ensured.
507. And configuring a corresponding bit compression ratio for each carrier group according to the priority of each carrier group in the K carrier groups.
Optionally, in an LTE-NR dual connectivity scenario, the embodiment of the present invention may distinguish a LTE primary carrier and an NR secondary carrier, and different compression ratios may be adopted for the LTE primary carrier, the NR primary carrier, and the LTE and NR secondary carriers.
In the embodiment of the present invention, the higher the priority of the carrier group, the higher the reliability required, and therefore, the smaller the compression ratio can be adopted.
Optionally, in an LTE-NR dual connectivity scenario, the reliability required for the LTE primary carrier is the highest, and a relatively low compression ratio may be used for the LTE primary carrier to ensure the LTE primary carrier performance. The NR primary carrier is less reliable than the LTE primary carrier, and may employ a moderate compression ratio to ensure NR primary carrier performance. The LTE secondary carrier and the NR secondary carrier are typically data transmission, and the highest compression ratio may be adopted to reduce the HARQ storage space.
In the embodiment of the invention, different compression ratios can be allocated to the carrier groups with different priorities, so that a smaller compression ratio can be adopted for the carrier group with a higher priority, and the reliability of the carrier group with a higher priority is ensured.
As shown in fig. 7, an embodiment of the present invention provides an apparatus for allocating memory, including:
a processing module 701, configured to divide the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the allocated R carriers, and determine to divide the memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
Optionally, the processing module 701 is further configured to, after determining that each storage area of the K storage areas is divided into M sub-storage areas, allocate a remaining available space according to a priority of each carrier group in the K carrier groups if the remaining available space exists in the memory.
Optionally, the processing module 701 is specifically configured to allocate the remaining available space as at least one sub storage area to a target carrier group of the K carrier groups, where the priority is higher than a preset priority.
Optionally, the processing module 701 is specifically configured to divide the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block of the allocated R carriers and the carrier types of the R carriers.
Optionally, the processing module 701 is specifically configured to determine a soft bit number corresponding to a maximum transport block of each carrier;
and dividing carriers which have the same soft bit number and belong to the same carrier type into the same carrier group to obtain K carrier groups.
Optionally, the processing module 701 is specifically configured to determine a total available space of the memory;
calculating the bit number of the sub-storage area of each storage area according to the soft bit number supported by the maximum transmission block of the carrier wave corresponding to each storage area and the bit number corresponding to each soft bit;
calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the bit number of the sub-storage areas in each storage area;
it is determined to divide each of the K memory areas into M sub memory areas.
Optionally, the processing module 701 is specifically configured to calculate, according to the total available space of the memory, the number M of sub-memory areas of each memory area by combining the following formula one;
the first formula is as follows:
m denotes the number of sub-memory areas per memory area, K denotes the number of memory areas, T denotes the total available space of the memory, SiIndicating the number of bits included in the ith sub-storage area.
Optionally, the processing module 701 is further configured to determine a priority of each carrier group in the K carrier groups after determining that the memory is divided into K storage areas corresponding to the K carrier groups; and configuring a corresponding bit compression ratio for each carrier group according to the priority of each carrier group in the K carrier groups.
Optionally, the processing module 701 is further configured to, after dividing each storage area of the K storage areas into M sub-storage areas according to the total available space of the memory, store the target data in the target storage area when the target data is received through the target carrier; and the target storage area is a storage area corresponding to the carrier group where the target carrier is located in the K storage areas.
Optionally, in this embodiment of the present invention, the allocation apparatus of the memory may be a functional module or a functional entity (e.g., a processor) in the terminal device, or may be the terminal device.
Optionally, an embodiment of the present invention further provides a terminal device, where the terminal device includes the foregoing memory allocation apparatus, and the memory allocation apparatus may be a processor.
The embodiment of the present invention further provides a terminal device, where the terminal device may include a processor, a memory, and a computer program stored in the memory and capable of running on the processor, and when the computer program is executed by the processor, each process executed by the terminal device in the foregoing method embodiments may be implemented, and the same technical effect may be achieved, and details are not repeated here to avoid repetition.
Fig. 8 is a schematic diagram of a hardware structure of a terminal device according to an embodiment of the present invention. The terminal device may include: radio Frequency (RF) circuitry 810, memory 820, input unit 830, display unit 840, sensor 850, audio circuitry 860, wireless fidelity (WiFi) module 870, processor 880, and power supply 890. Radio frequency circuit 810 includes, among other things, a receiver 811 and a transmitter 812. Those skilled in the art will appreciate that the handset configuration shown in fig. 8 is not intended to be limiting and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
The RF circuit 810 may be used for receiving and transmitting signals during information transmission and reception or during a call, and in particular, for processing downlink information of a base station after receiving the downlink information to the processor 880; in addition, the data for designing uplink is transmitted to the base station. In general, RF circuit 810 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a Low Noise Amplifier (LNA), a duplexer, and the like. In addition, the RF circuit 810 may also communicate with networks and other devices via wireless communication. The wireless communication may use any communication standard or protocol, including but not limited to global system for mobile communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), email, Short Message Service (SMS), etc.
The memory 820 may be used to store software programs and modules, and the processor 880 executes various functional applications and data processing of the cellular phone by operating the software programs and modules stored in the memory 820. The memory 820 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the cellular phone, and the like. Further, the memory 820 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state storage device.
The input unit 830 may be used to receive input numeric or character information and generate key signal inputs related to user settings and function control of the cellular phone. Specifically, the input unit 830 may include a touch panel 831 and other input devices 832. The touch panel 831, also referred to as a touch screen, can collect touch operations performed by a user on or near the touch panel 831 (e.g., operations performed by the user on the touch panel 831 or near the touch panel 831 using any suitable object or accessory such as a finger, a stylus, etc.) and drive the corresponding connection device according to a preset program. Alternatively, the touch panel 831 may include two portions, i.e., a touch detection device and a touch controller. The touch detection device detects the touch direction of a user, detects a signal brought by touch operation and transmits the signal to the touch controller; the touch controller receives touch information from the touch sensing device, converts it to touch point coordinates, and sends the touch point coordinates to the processor 880, and can receive and execute commands from the processor 880. In addition, the touch panel 831 may be implemented by various types such as a resistive type, a capacitive type, an infrared ray, and a surface acoustic wave. The input unit 830 may include other input devices 832 in addition to the touch panel 831. In particular, other input devices 832 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, and the like.
The display unit 840 may be used to display information input by the user or information provided to the user and various menus of the cellular phone. The display unit 840 may include a display panel 841, and the display panel 841 may be configured in the form of a Liquid Crystal Display (LCD), an organic light-Emitting diode (OLED), or the like, as an option. Further, touch panel 831 can overlay display panel 841, and when touch panel 831 detects a touch operation thereon or nearby, communicate to processor 880 to determine the type of touch event, and processor 880 can then provide a corresponding visual output on display panel 841 based on the type of touch event. Although in fig. 8, the touch panel 831 and the display panel 841 are two separate components to implement the input and output functions of the mobile phone, in some embodiments, the touch panel 831 and the display panel 841 may be integrated to implement the input and output functions of the mobile phone.
The handset may also include at least one sensor 850, such as light sensors, motion sensors, and other sensors. Specifically, the light sensor may include an ambient light sensor that adjusts the brightness of the display panel 841 according to the brightness of ambient light, and a proximity sensor that turns off the display panel 841 and/or the backlight when the mobile phone is moved to the ear. As one of the motion sensors, the accelerometer sensor can detect the magnitude of acceleration in each direction (generally, three axes), can detect the magnitude and direction of gravity when stationary, and can be used for applications of recognizing the posture of a mobile phone (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer and tapping), and the like; as for other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, and an infrared sensor, which can be configured on the mobile phone, further description is omitted here.
WiFi belongs to short-distance wireless transmission technology, and the mobile phone can help a user to send and receive e-mails, browse webpages, access streaming media and the like through the WiFi module 870, and provides wireless broadband Internet access for the user. Although fig. 8 shows WiFi module 870, it is understood that it does not belong to the essential constitution of the handset, and may be omitted entirely as needed within the scope not changing the essence of the invention.
The processor 880 is a control center of the mobile phone, connects various parts of the entire mobile phone using various interfaces and lines, and performs various functions of the mobile phone and processes data by operating or executing software programs and/or modules stored in the memory 820 and calling data stored in the memory 820, thereby integrally monitoring the mobile phone. Optionally, processor 880 may include one or more processing units; preferably, the processor 880 may integrate an application processor, which mainly handles operating systems, user interfaces, applications, etc., and a modem processor, which mainly handles wireless communications. It will be appreciated that the modem processor described above may not be integrated into processor 880.
The handset also includes a power supply 890 (e.g., a battery) for powering the various components, which may preferably be logically coupled to the processor 880 via a power management system to manage charging, discharging, and power consumption. Although not shown, the mobile phone may further include a camera, a bluetooth module, etc., which are not described herein.
In this embodiment of the present invention, the processor 880 is configured to divide R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the allocated R carriers, and determine to divide the memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
Optionally, the processor 880 is further configured to, after determining that each of the K storage areas is divided into M sub-storage areas, allocate a remaining available space according to a priority of each of the K carrier groups if the remaining available space exists in the memory.
Optionally, the processor 880 is specifically configured to allocate the remaining available space as at least one sub storage area to a target carrier group of the K carrier groups, where the priority is higher than a preset priority.
Optionally, the processor 880 is specifically configured to divide the R carriers into K carrier groups according to the soft bit number corresponding to the allocated maximum transport block of the R carriers and the carrier types of the R carriers.
Optionally, the processor 880 is specifically configured to determine a soft bit number corresponding to a maximum transport block of each carrier;
and dividing carriers which have the same soft bit number and belong to the same carrier type into the same carrier group to obtain K carrier groups.
Optionally, the processor 880 is specifically configured to determine a total available space of the memory;
calculating the bit number of the sub-storage area of each storage area according to the soft bit number supported by the maximum transmission block of the carrier wave corresponding to each storage area and the bit number corresponding to each soft bit;
calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the bit number of the sub-storage areas in each storage area;
it is determined to divide each of the K memory areas into M sub memory areas.
Optionally, the processor 880 is specifically configured to calculate, according to the total available space of the memory, the number M of sub-memory areas of each memory area by combining the following formula one;
the first formula is as follows:
m denotes the number of sub-memory areas per memory area, K denotes the number of memory areas, T denotes the total available space of the memory, SiIndicating the number of bits included in the ith sub-storage area.
Optionally, the processor 880 is further configured to determine a priority of each carrier group in the K carrier groups after determining that the memory is divided into K storage areas corresponding to the K carrier groups; and configuring a corresponding bit compression ratio for each carrier group according to the priority of each carrier group in the K carrier groups.
Optionally, the processor 880 is further configured to, after dividing each of the K storage areas into M sub-storage areas according to the total available space of the memory, store the target data in the target storage area when the target data is received via the target carrier, where the target storage area is a storage area corresponding to a carrier group in which the target carrier is located in the K storage areas.
An embodiment of the present invention provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements each process executed by a terminal device in the foregoing method embodiments, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.
The computer-readable storage medium may be a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (such as a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (13)
1. A method for allocating memory, comprising:
dividing R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers, and determining to divide a memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area of the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
2. The method of claim 1, wherein after determining to divide each of the K memory blocks into M sub-memory blocks, further comprising:
and if the memory has the residual available space, distributing the residual available space according to the priority of each carrier group in the K carrier groups.
3. The method of claim 2, wherein the allocating the remaining available space according to the priorities of the K carrier groups comprises:
and taking the residual available space as at least one sub-storage area, and allocating the residual available space to a target carrier group with the priority higher than a preset priority in the K carrier groups.
4. The method according to claim 1, wherein the dividing the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transport block in the allocated R carriers comprises:
and dividing the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block of the R carriers and the carrier types of the R carriers.
5. The method according to claim 4, wherein the dividing the R carriers into K carrier groups according to the number of soft bits corresponding to the maximum transport block in the allocated R carriers and the carrier types of the R carriers comprises:
determining the soft bit number corresponding to the maximum transmission block of each carrier;
and dividing the carriers with the same soft bit number and the same carrier type into the same carrier group to obtain the K carrier groups.
6. The method of claim 4, wherein the carrier type comprises at least one of:
NR main carrier, NR auxiliary carrier, LTE main carrier and LTE auxiliary carrier.
7. The method of claim 1, wherein determining to divide each of the K memory areas into M sub-memory areas according to a total available space of the memory comprises:
determining a total available space of the memory;
calculating the bit number of the sub-storage area of each storage area according to the soft bit number supported by the maximum transmission block of the carrier wave corresponding to each storage area and the bit number corresponding to each soft bit;
calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the bit number of the sub-storage areas of each storage area;
it is determined to divide each of the K memory areas into M sub-memory areas.
8. The method according to claim 7, wherein the calculating the number M of the sub-storage areas in each storage area according to the total available space of the storage area and the number of bits of the sub-storage areas in each storage area comprises:
calculating the number M of the sub-storage areas of each storage area according to the total available space of the storage and by combining the following formula I;
the first formula is as follows:
m represents the number of sub-memory areas of each memory area, K represents the number of memory areas, T represents the total available space of the memory, SiIndicating the number of bits included in the ith sub-storage area.
9. The method according to any of claims 1 to 8, wherein after determining to divide the memory into K memory regions corresponding to the K carrier groups, further comprising:
determining a priority for each of the K carrier groups;
and configuring a corresponding bit compression ratio for each carrier group according to the priority of each carrier group in the K carrier groups.
10. The method according to any one of claims 1 to 8, wherein after dividing each of the K storage areas into M sub-storage areas according to a total available space of the memory, the method further comprises:
storing target data in a target storage area when the target data is received through a target carrier;
and the target storage area is a storage area corresponding to the carrier group where the target carrier is located in the K storage areas.
11. An apparatus for allocating memory, comprising:
the processing module is used for dividing the R carriers into K carrier groups according to the soft bit number corresponding to the maximum transmission block in the distributed R carriers, and determining to divide the memory into K storage areas corresponding to the K carrier groups;
according to the total available space of the memory, each memory area in the K memory areas is determined to be divided into M sub memory areas;
wherein R and K are integers greater than or equal to 2, and M is an integer greater than or equal to 1.
12. A terminal device, comprising: processor, memory and computer program stored on and executable on said processor, said computer program, when executed by said processor, implementing a method of allocating memory as claimed in any one of claims 1 to 10.
13. A computer-readable storage medium, comprising: the computer-readable storage medium has stored thereon a computer program which, when executed by a processor, implements the method of memory allocation of any of claims 1 to 10.
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