CN112115676B - Static voltage drop repairing method, device, equipment and storage medium - Google Patents

Static voltage drop repairing method, device, equipment and storage medium Download PDF

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Publication number
CN112115676B
CN112115676B CN202011055691.7A CN202011055691A CN112115676B CN 112115676 B CN112115676 B CN 112115676B CN 202011055691 A CN202011055691 A CN 202011055691A CN 112115676 B CN112115676 B CN 112115676B
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voltage drop
unit
violation
integrated circuit
preset
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CN112115676A (en
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彭书涛
邓宇
李天丽
邹和风
曹灿
曾朵朵
邹京
黄薇
贾勤
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Phytium Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/3312—Timing analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/02—Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]

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  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The application provides a method, a device, equipment and a storage medium for repairing static voltage drop, and relates to the technical field of integrated circuits. The method comprises the following steps: obtaining a static voltage drop analysis result of the integrated circuit, wherein the voltage drop analysis result comprises a static voltage drop parameter of each circuit unit in the integrated circuit; obtaining a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signoff of the integrated circuit; determining a voltage drop violation cause of the voltage drop violation unit based on layout information of the voltage drop violation unit in the integrated circuit; and according to the voltage drop violation reason, adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit. The method and the device can realize the consideration of the static voltage drop and the circuit time sequence problem and improve the development and design progress of the integrated circuit.

Description

Static voltage drop repairing method, device, equipment and storage medium
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a static voltage drop repairing method, a device, equipment and a storage medium.
Background
The voltage Drop (IR) -Drop of each Circuit unit in an Integrated Circuit (IC) is too large, which is critical to the Circuit performance and function, and stability of the whole IC.
Voltage drop repair in integrated circuits is particularly important during the development and design of integrated circuits. However, in the current technology, only the circuit cells with voltage drop violations are roughly moved directly to the area with lower cell density. Such a rough movement of the circuit units may cause timing violations in the timing check of the timing path of the circuit units in the integrated circuit.
Therefore, the existing scheme cannot take into account the voltage drop and the timing problem of the circuit, thereby seriously affecting the development and design progress of the integrated circuit.
Disclosure of Invention
In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a method, an apparatus, a device and a storage medium for repairing a static voltage drop, so as to achieve a balance between voltage drop and circuit timing problem.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical solutions:
in a first aspect, an embodiment of the present invention provides a method for repairing a static voltage drop, including:
obtaining a static voltage drop analysis result of an integrated circuit, wherein the static voltage drop analysis result comprises: a quiescent voltage drop parameter for each circuit element in the integrated circuit;
judging a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signoff of the integrated circuit;
determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit;
and according to the voltage drop violation reason, adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit.
Optionally, the layout information includes: at least one layout information; the determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit includes:
determining, from each layout information, whether the voltage drop violation cause comprises: and each kind of layout information does not meet the preset condition.
Optionally, the at least one type of layout information includes: the voltage drop violates the cell density in a preset area where the cell is located;
the determining, from each layout information, whether the voltage drop violation cause is: each kind of layout information does not meet the preset condition, and the method comprises the following steps:
judging whether the unit density is greater than or equal to a preset density threshold value;
if the cell density is greater than or equal to the density threshold, determining the voltage drop violation cause comprises: the cell density is greater than or equal to the density threshold.
Optionally, the performing, according to the voltage drop violation reason, a preset voltage drop repair policy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit includes:
calculating the establishment time sequence allowance of the time sequence path of each circuit unit in the preset region;
and moving the circuit unit with the time sequence margin value of positive value established on the time sequence path in the preset area to an area of the integrated circuit, wherein the unit density is less than the density threshold value.
Optionally, the at least one type of layout information further includes: the voltage drop violates a load capacitance driven by the cell;
the determining, from each layout information, whether the voltage drop violation cause is: each kind of layout information does not meet the preset condition, and the method comprises the following steps:
judging whether the load capacitance is greater than or equal to a preset capacitance threshold value;
if the load capacitance is greater than or equal to the capacitance threshold, determining the voltage drop violation cause comprises: the load capacitance is greater than or equal to the capacitance threshold.
Optionally, the performing, according to the voltage drop violation reason, a preset voltage drop repair policy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit includes:
determining a load cause for the load capacitance being greater than or equal to the capacitance threshold;
and according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value, adopting an adjusting mode corresponding to the load reason to carry out layout and wiring adjustment on the integrated circuit.
Optionally, if the load reason is: the number of loads driven by the voltage drop violation unit is greater than or equal to a preset number threshold; the performing layout and wiring adjustment on the integrated circuit by adopting an adjustment mode corresponding to the load reason according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value comprises the following steps:
the voltage drop violating unit is duplicated in the integrated circuit, so that the duplicated circuit unit and the original voltage drop violating unit equally share the number of driving loads.
Optionally, if the load reason is: a length of a driving line between the voltage drop violating unit and a load is greater than or equal to a preset length threshold; the performing layout and wiring adjustment on the integrated circuit by adopting an adjustment mode corresponding to the load reason according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value comprises the following steps:
and inserting a buffer on the driving line with the length greater than or equal to the preset length threshold value.
Optionally, the method further includes:
and according to the static voltage drop parameters of the voltage drop violation unit, identifying and displaying the voltage drop violation unit in an interface of the integrated circuit in a preset layout and wiring tool, wherein different static voltage drop parameters can correspond to different display modes.
Optionally, the displaying, by the identifier, the voltage drop violating unit in a preset interface of the integrated circuit in a placement and routing tool according to the static voltage drop parameter of the voltage drop violating unit includes:
and according to the static voltage drop parameters of the voltage drop violation units, displaying the circuit units with different static voltage drop parameters in the voltage drop violation units in different colors or different brightnesses of the same color in the interface of the integrated circuit in the layout and routing tool.
In a second aspect, an embodiment of the present application further provides a device for repairing a static voltage drop, including:
the acquisition module is used for acquiring a static voltage drop analysis result of the integrated circuit; wherein the static voltage drop analysis result comprises: a quiescent voltage drop parameter for each circuit element in the integrated circuit;
the judging module is used for judging a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signature of the integrated circuit;
a determining module for determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit;
and the adjusting module is used for adopting a preset voltage drop repairing strategy corresponding to the voltage drop violation reason according to the voltage drop violation reason to carry out layout wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit.
In a third aspect, an embodiment of the present application further provides a computer device, including: a memory and a processor, wherein the memory stores a computer program executable by the processor, and the processor implements any one of the static voltage drop repairing methods provided by the first aspect when executing the computer program.
In a fourth aspect, an embodiment of the present application further provides a storage medium, where a computer program is stored on the storage medium, and when the computer program is read and executed, the method for repairing a static voltage drop provided in the first aspect is implemented.
The beneficial effect of this application is:
in the method, the apparatus, the device, and the storage medium for repairing a static voltage drop provided by the present application, a static voltage drop analysis result of an integrated circuit may be obtained, where the static voltage drop analysis result includes: the static voltage drop parameter of each circuit unit in the integrated circuit judges a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signature of the integrated circuit, determines the voltage drop violation reason of the voltage drop violation unit according to the layout information of the voltage drop violation unit in the integrated circuit, and then performs layout and wiring adjustment on the integrated circuit by adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason according to the voltage drop violation reason so as to repair the static voltage drop of the voltage drop violation unit. In the method for repairing a static voltage drop provided in this embodiment, the reason for violating the voltage drop is analyzed, and the integrated circuit is subjected to layout and wiring adjustment according to the reason for violating the voltage drop obtained through the analysis, so that the layout and wiring adjustment of the integrated circuit is more reasonable, the effect of repairing the static voltage drop of the circuit unit after the layout and wiring adjustment is ensured, the influence of the layout and wiring adjustment on the circuit timing sequence can be ensured, the static voltage drop and the circuit timing sequence problem can be considered, and the development and design progress of the integrated circuit can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a first schematic flow chart illustrating a static voltage drop repairing method according to an embodiment of the present disclosure;
fig. 2 is a schematic flow chart illustrating a second method for repairing a static voltage drop according to an embodiment of the present disclosure;
fig. 3 is a third schematic flowchart of a method for repairing a static voltage drop according to an embodiment of the present disclosure;
fig. 4 is a fourth schematic flowchart of a method for repairing a static voltage drop according to an embodiment of the present disclosure;
fig. 5 is a fifth flowchart illustrating a method for repairing a static voltage drop according to an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a device for repairing a static voltage drop according to an embodiment of the present disclosure;
fig. 7 is a schematic diagram of a computer device provided in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention.
The method for repairing the static voltage drop provided by the embodiment of the application can be applied to the development and design process of an integrated circuit, and can be realized by operating a voltage drop repairing program through computer equipment which is provided with and operates the voltage drop repairing program. It should be noted that the voltage drop repairing program may be executed as a plug-in of the place and route tool, or may be executed as a program other than the place and route tool. The computer device may be any terminal device with a computing processing function, such as a notebook computer, a desktop computer, a tablet computer, or the like, or may be a server, such as a local server or a cloud server, or other product forms.
In the process of executing the method for repairing the static voltage drop provided by the embodiment of the application, the reason for violating the voltage drop of the voltage drop violating unit can be analyzed, then according to the reason for violating the voltage drop obtained through analysis, a preset voltage drop repairing strategy corresponding to the reason for violating the voltage drop can be adopted, and the integrated circuit is subjected to layout and wiring adjustment, so that the layout and wiring adjustment of the integrated circuit can be more reasonable, the repairing effect of the static voltage drop of the circuit unit after the layout and wiring adjustment is ensured, meanwhile, the influence of the layout and wiring adjustment on the circuit timing sequence can be ensured, the consideration of the static voltage drop and the circuit timing sequence problem is realized, and the development and design progress of the integrated circuit is improved.
The following provides an example explanation of various implementations of the static voltage drop repairing method provided by the embodiments of the present application with reference to the drawings.
Fig. 1 is a first schematic flow chart of a static voltage drop repairing method according to an embodiment of the present disclosure. As shown in fig. 1, the method for repairing a static voltage drop may include:
s101, obtaining a static voltage drop analysis result of the integrated circuit, wherein the static voltage drop analysis result comprises the following steps: a quiescent voltage drop parameter for each circuit element in the integrated circuit.
In a possible implementation, the static voltage drop analysis result of the integrated circuit may be obtained from a preset voltage drop analysis tool. That is, before performing S101, a predetermined voltage drop analysis tool may be used to perform a static voltage drop analysis on the integrated circuit, so as to obtain a static voltage drop analysis result. For example, in a specific implementation, a layout of the integrated circuit may be imported into a voltage drop analysis tool, which may then perform a static voltage drop analysis on the integrated circuit based on the layout of the integrated circuit. The voltage drop analysis tool mentioned above may be a voltage drop analysis tool previously integrated in a predetermined place and route tool, or may be another analysis tool independent of the place and route tool.
In other possible implementations, the static voltage drop analysis result may also be obtained in other manners, for example, a preset voltage drop analysis tool is integrated in the voltage drop repairing application, and the static voltage drop analysis is performed on the integrated circuit by the integrated voltage drop analysis tool, so as to obtain the static voltage drop analysis result.
It should be noted that the above implementation manner for obtaining the static voltage drop analysis result is only some possible implementation manners, and other implementation manners may also be used for obtaining the static voltage drop analysis result, which is not limited in the embodiment of the present application.
Optionally, the static voltage drop analysis result may include: voltage drop parameters of each circuit unit, power network name of each circuit unit, ideal power supply voltage of each circuit unit, coordinates of each circuit unit in a layout area of the integrated circuit, name of each circuit unit and the like. The ideal supply voltage of each circuit unit may be a preset standard voltage of each circuit unit.
And S102, judging a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signature of the integrated circuit.
In a possible implementation process, the voltage drop violation unit in the integrated circuit can be obtained according to the static voltage drop analysis result and the static voltage drop violation standard of the integrated circuit signoff. The number of the voltage drop violation units may be one or more. The preset violation threshold may be a violation threshold specified in the static voltage drop violation standard, for example, in an integrated circuit with a 16nm technology, the preset violation threshold may be 3%. Of course, for other integrated circuits, the static voltage drop violating the predetermined violation threshold specified by the standard may be other values, and the application is not limited thereto.
After the voltage drop violation unit is determined, information such as the name of each circuit unit in the voltage drop violation unit may be stored in a list form, and a voltage drop violation unit list may be obtained.
The static voltage drop violation value of each circuit unit can be used to characterize the violation degree of the static voltage drop of each circuit unit relative to the corresponding preset standard voltage. The larger the static voltage drop violation value of the circuit unit is, the higher the violation degree of the static voltage drop for representing the circuit unit is; conversely, the smaller the static voltage drop violation value of a circuit unit, the lower the violation degree of the static voltage drop for characterizing the circuit unit.
For example, taking the violation standard of the static voltage drop of the ic signoff in the 16nm process as an example, if the static voltage drop value of the circuit unit is greater than the preset standard voltage by 3%, that is, the violation value of the static voltage drop of the circuit unit is greater than 3%, it is determined that the circuit unit has a violation of the static voltage drop, and the circuit unit is determined to be a voltage drop violation unit; conversely, if the static voltage drop violation value of the circuit cell is less than or equal to 3%, it may be determined that the circuit cell does not have a static voltage drop violation. Where 3% is a violation specified in the static voltage drop violation criteria for the integrated circuit signoff.
S103, according to the layout information of the voltage drop violation unit in the integrated circuit, the voltage drop violation reason of the voltage drop violation unit is determined.
In the case where the voltage drop violation unit is found, the layout information of the voltage drop violation unit can be obtained from the layout diagram of the integrated circuit or the layout information of the integrated circuit. The layout information of the voltage drop violation unit may be the layout information of the integrated circuit associated with the voltage drop violation unit.
In a possible implementation example, the analysis may be performed according to the layout information and a voltage drop violation reason analysis method corresponding to preset layout information to determine whether the voltage drop violation reason of the voltage drop violation unit is: the layout information does not satisfy a preset condition.
In practical applications, the layout information may include: at least one layout information, each layout information may be a layout information of a dimension of the voltage drop violating cell in the integrated circuit, for example, a cell density in a predetermined area where the cell is located, or a load capacitance driven by the cell. Of course, layout information of other dimensions associated with the voltage drop violation unit may be considered, and the application is not limited thereto.
If the layout information includes: at least one kind of layout information, correspondingly, determining the voltage drop violation cause of the voltage drop violation unit according to the layout information of the voltage drop violation unit in the integrated circuit in S103 as shown above, may include:
determining whether the voltage drop violation cause includes, based on each of the layout information: the layout information does not satisfy a preset condition.
Different layout information may correspond to different cause analysis methods. In an implementation example, whether each kind of layout information satisfies a corresponding preset condition may be determined according to each kind of layout information by using a reason analysis method corresponding to each kind of layout information. If the layout information does not satisfy the corresponding preset condition, determining that the voltage drop violation reason comprises: the layout information does not satisfy a preset condition.
And S104, according to the voltage drop violation reason, adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit.
Different voltage drop violation causes may correspond to different voltage drop repair strategies. In a possible implementation manner, according to the voltage drop violation reason, the voltage drop repair policy corresponding to the voltage drop violation reason may be determined from a preset correspondence table between the violation reason and the repair policy. The voltage drop repair policy corresponding to the cause of the voltage drop violation may include: the voltage drop violates the corresponding layout/wiring adjustment method. If the voltage drop repair strategy corresponding to the voltage drop violation reason is determined, the corresponding layout and wiring adjustment can be performed on the integrated circuit according to the layout and wiring adjustment mode indicated in the voltage drop repair strategy corresponding to the voltage drop violation reason.
The method for repairing a static voltage drop provided by the embodiment of the application can obtain a static voltage drop analysis result of an integrated circuit, wherein the static voltage drop analysis result comprises the following steps: the static voltage drop parameter of each circuit unit in the integrated circuit judges a voltage drop violation unit in the circuit units according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the integrated circuit signoff, determines the voltage drop violation reason of the voltage drop violation unit according to the layout information of the voltage drop violation unit in the integrated circuit, and then performs layout and wiring adjustment on the integrated circuit by adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason according to the voltage drop violation reason so as to repair the static voltage drop of the voltage drop violation unit. In the method for repairing a static voltage drop provided in this embodiment, the reason for violating the voltage drop is analyzed, and the integrated circuit is subjected to layout and wiring adjustment according to the reason for violating the voltage drop obtained through the analysis, so that the layout and wiring adjustment of the integrated circuit is more reasonable, the effect of repairing the static voltage drop of the circuit unit after the layout and wiring adjustment is ensured, the influence of the layout and wiring adjustment on the circuit timing sequence can be ensured, the static voltage drop and the circuit timing sequence can be considered, and the development and design progress of the integrated circuit can be improved.
On the basis of the static voltage drop repairing method provided in fig. 1, the embodiment of the present application further provides an implementation method for analyzing the cause of voltage drop violation based on the cell density as layout information. Fig. 2 is a schematic flow chart illustrating a second method for repairing a static voltage drop according to an embodiment of the present disclosure. As shown in fig. 2, if the at least one type of layout information includes: if the voltage drop violating unit is located in the preset area, determining whether the voltage drop violating reason includes, according to each layout information: the each type of layout information not satisfying the preset condition may include:
s201, judging whether the unit density is larger than or equal to a preset density threshold value.
In a possible implementation, the cell density of the preset area where the voltage drop violating cell is located may be calculated as follows:
calculating the area of a maximum region surrounded by a pair of power lines and ground lines of the voltage drop violation unit, and calculating to obtain the area of a region without circuit units in the maximum region as the unused area in the maximum region by filling a filler (filling unit) in the maximum region;
calculating the area of the maximum area minus the area of the unused area to obtain the area of the used area in the maximum area; and calculating the ratio of the area of the utilization region to the area of the maximum region, namely the unit density.
It should be noted that the maximum area surrounded by only one pair of power line and ground line is the predetermined area where the voltage drop violating unit is located.
In some other implementations, the predetermined area in which the voltage drop violation unit is located may be an area within a layout range in which the integrated circuit is located, and the predetermined area is centered around the voltage violation unit. The cell density may be, for example, a ratio of the number of circuit cells in a predetermined area where the voltage drop violating cell is located to the area size of the predetermined area, or may be in other expression forms, which is not limited in this application. The size of the preset range may be preset by a user, or may be determined based on a selection operation of the user in the layout area of the integrated circuit.
Of course, other calculation methods may also be adopted to obtain the cell density, the above is only an example of a possible implementation method, and the embodiment of the present application does not limit this to other calculation methods.
S202, if the cell density is greater than or equal to the density threshold, determining the voltage drop violation reason includes: the cell density is greater than or equal to the density threshold.
If the cell density is determined to be greater than or equal to the density threshold according to the determination result in S201, it may be determined that the power density in the preset region where the voltage drop violation cell is located is too large, and it is determined that the cell density is greater than or equal to the density threshold, which is a type of cause affecting the voltage drop violation, that is, the voltage drop violation cause includes that the cell density is greater than or equal to the density threshold.
On the other hand, if it is determined that the cell density is smaller than the density threshold value based on the determination result in S201, it is determined that the cell density is not a cause of the voltage drop violation which affects the voltage drop violation cell. Therefore, it is also determined whether the voltage drop violation factor includes other reasons and does not satisfy the preset condition according to other layout information. Of course, the judgment of each layout information may be performed simultaneously or sequentially, and the present application is not limited.
The embodiment analyzes the voltage drop violation reason according to the cell density in the layout information, so that the analysis of the voltage drop violation reason is more accurate, the subsequent layout and wiring adjustment is performed by adopting a corresponding voltage drop repair strategy, the rationality of the layout and wiring adjustment is ensured, and the consideration of the static voltage drop and the circuit time sequence is realized.
On the basis of the analysis of the cause of the voltage drop violation provided in fig. 2, the embodiment of the present application further provides that the cause of the voltage drop violation includes: possible implementations of the layout and routing adjustment are performed when the cell density is greater than or equal to the density threshold. Fig. 3 is a third schematic flowchart of a static voltage drop repairing method according to an embodiment of the present application. As shown in fig. 3, performing the layout and routing adjustment on the integrated circuit according to the voltage drop violation reason and using the preset voltage drop repair policy corresponding to the voltage drop violation reason in S104 as shown above may include:
s301, calculating the time sequence allowance of the establishment time of the time sequence path of each circuit unit in the preset area.
In a possible implementation manner, a preset establishing time sequence margin analysis tool may be adopted to perform establishing time sequence margin analysis on the time sequence path where each circuit unit in the preset region is located, so as to obtain the establishing time sequence margin of the time sequence path where each circuit unit in the preset region is located. The build-up time timing margin analysis tool may be, for example, an analysis tool integrated in a place-and-route tool, an analysis tool other than a route tool, or an analysis tool integrated in a static voltage drop repair program for executing the static voltage drop repair method, which is not limited in this embodiment of the present application.
S302, the circuit unit with the time sequence margin value being positive is established on the time sequence path in the preset area, and the circuit unit is moved to the area of the integrated circuit, wherein the unit density is smaller than the density threshold value.
In a possible implementation manner, in the case of obtaining the setup time timing margin of the timing path where each circuit unit is located in the preset region, it may be determined whether the setup time timing margin of the timing path where the voltage drop violating unit is located in the preset region is a positive value or a negative value.
If the setup time timing margin of the timing path where the voltage drop violation unit is located is a positive value, the voltage drop violation unit can be moved to a region of the integrated circuit where the cell density is lower, i.e., a region where the cell density is less than the density threshold.
If the voltage drop violation unit is located in the time sequence path with the establishment time sequence margin being a negative value, determining whether the time sequence margin of the time sequence path with the other circuit units in the preset area is a positive value or a negative value, if the circuit units with the establishment time margin being a positive value exist in the time sequence path in the preset area, moving the circuit units with the establishment time margin being the positive value on the time sequence path in the preset area to an area of the integrated circuit, wherein the unit density of the circuit units is smaller than the density threshold value.
In the implementation mode, the time sequence margin of the time sequence path where the voltage drop violation unit is located is determined to be a positive value or a negative value, so that the calculation amount can be reduced, the voltage drop violation unit can be moved to an area with low unit density as fast as possible, and the judgment and analysis on the time sequence margin of all circuit units are not needed.
In another possible implementation manner, under the condition that the establishment time and timing allowance of the timing path where each circuit unit is located is obtained, whether the establishment time and timing allowance of the timing path where each circuit unit is located is a positive value or a negative value can be determined; if a circuit unit with a positive time sequence margin is established on the time sequence path in the preset area, the circuit unit with the positive time sequence margin is moved to an area, in which the unit density in the integrated circuit is smaller than the density threshold value, of the integrated circuit.
However, by determining whether the setup time timing allowance of the timing path where each circuit unit is located is a positive value or a negative value, it is ensured that the circuit units in the preset region are covered more comprehensively, and the moved circuit units are effectively ensured to be more accurate, thereby ensuring the effect of performing static voltage drop repair by moving the circuit units.
Of course, other ways may also be adopted to determine the circuit unit with the positive time sequence margin established on the time sequence path in the preset region, which is only one possible implementation manner, and the embodiment of the present application is not limited thereto.
Note that the above-described close movement refers to a region where the distance to the target circuit cell is closest and the cell density is less than the density threshold. The target circuit unit may be a circuit unit having a positive time sequence margin established on the time sequence path in the predetermined region.
The method for repairing the static voltage drop provided by the embodiment of the application can determine the violation reason of the voltage drop, and comprises the following steps: under the condition that the cell density is greater than or equal to the density threshold, determining a circuit unit with a positive value of an establishment time sequence margin on a time sequence path in a preset region as a target circuit unit to be moved based on the positive and negative values of the establishment time sequence margin of the time sequence path of the circuit unit in the preset region where the voltage drop violation unit is located, and moving the circuit unit to a region where the cell density in the integrated circuit is smaller than the density threshold nearby, so that the dispersion of the circuit unit in the integrated circuit is realized, and the static voltage drop violation caused by the over-concentration and large density of the circuit unit is avoided; meanwhile, the target circuit unit to be moved is determined by considering the establishment time sequence allowance of the time sequence path where the circuit unit is located, so that the static voltage drop and the time sequence problem of the integrated circuit can be effectively guaranteed to be considered after the circuit unit is moved, and the static voltage drop repairing effect is improved.
On the basis of the static voltage drop repairing method provided by fig. 1, the embodiment of the present application further provides an implementation method for analyzing the cause of voltage drop violation based on the driven load capacitance as layout information. Fig. 4 is a fourth schematic flowchart of a static voltage drop repairing method according to an embodiment of the present application. As shown in fig. 4, if the at least one type of layout information includes: the voltage drop violating the load capacitance driven by the unit, then the method determines whether the voltage drop violating cause includes, according to each layout information: the step of each kind of layout information not meeting the preset condition may include:
s401, judging whether the load capacitance is larger than or equal to a preset capacitance threshold value.
If there is at least one voltage drop violating unit, in this embodiment, the load capacitance refers to the load capacitance driven by each voltage drop violating unit. The load capacitance driven by each voltage drop violation unit refers to the sum of all load capacitances driven by each voltage drop violation unit. In an implementation example of this embodiment, the load capacitance driven by each voltage drop violation unit may be obtained from a place and route tool of the integrated circuit.
S402, if the load capacitance is greater than or equal to the capacitance threshold, determining the voltage drop violation cause includes: the load capacitance is greater than or equal to the capacitance threshold.
By performing the above-mentioned S401 to obtain the judgment results of the magnitudes of the load capacitance and the capacitance threshold, if the load capacitance is greater than or equal to the capacitance threshold, it can be determined that the load capacitance driven by the voltage drop violation unit is large, and thus it can be determined that the voltage drop violation reason is: the load capacitance is greater than or equal to the capacitance threshold.
On the contrary, if the load capacitance is smaller than the capacitance threshold, it is determined that the load capacitance driven by the voltage drop violation unit is smaller, which is not a cause of the voltage drop violation by the voltage drop violation unit. Therefore, it is also determined whether the voltage drop violation factor includes other reasons and does not satisfy the preset condition according to other layout information. Of course, the judgment of each layout information may be performed simultaneously or sequentially, and the present application is not limited.
According to the embodiment, the reasons for the violation of the voltage drop are analyzed by the load capacitance in the layout information, so that the analysis of the reasons for the violation of the voltage drop is more accurate, the corresponding voltage drop repairing strategy is adopted for layout and wiring adjustment in the follow-up process, the rationality of the layout and wiring adjustment is ensured, and the static voltage drop and the circuit timing sequence are considered.
On the basis of the analysis of the cause of the voltage drop violation provided in fig. 4, the embodiment of the present application further provides that the cause of the voltage drop violation includes: possible implementations of layout adjustments are made where the load capacitance is greater than or equal to the capacitance threshold. Fig. 5 is a fifth flowchart illustrating a static voltage drop repairing method according to an embodiment of the present application. As shown in fig. 5, performing the layout and routing adjustment on the integrated circuit according to the voltage drop violation reason and using the preset voltage drop repair policy corresponding to the voltage drop violation reason in S104 as shown above may include:
and S501, determining the load reason that the load capacitance is larger than or equal to the capacitance threshold value.
The reason why the load capacitance is greater than or equal to the capacitance threshold value may be various, and therefore, in the case where the cause of the voltage drop violation is determined to include that the load capacitance is greater than or equal to the capacitance threshold value, cause analysis may be further performed according to the load information associated with the load capacitance in the layout information to determine the load cause.
For example, it may be determined whether the load number is greater than or equal to the preset number threshold according to the load number in the load information, and if so, it may be determined that the load reason is: if the load number is greater than or equal to the preset number threshold, otherwise, it is determined that the load reason is not influenced by the load number.
In other examples, it may be further determined whether the length of the driving line is greater than or equal to a preset number threshold according to the length of the driving line between the voltage drop violation unit and the load in the load information, and if so, the load reason may be determined as: the length of the driving line is larger than or equal to a preset length threshold value, otherwise, the load reason is determined not to be influenced by the load driving line.
As described above, for possible examples of the determined load reason, the load reason provided in the embodiment of the present application is not limited to the above, and may also be other load-related reasons, and the embodiment of the present application is not limited to this.
And S502, according to the load reason that the load capacitance is larger than or equal to the capacitance threshold value, adopting an adjusting mode corresponding to the load reason to carry out layout and wiring adjustment on the integrated circuit.
Different load reasons may correspond to different adjustment modes, and in the case of determining the load reason, the adjustment mode corresponding to the load reason may be determined according to the load reason, and the layout adjustment may be performed on the integrated circuit by using the adjustment mode corresponding to the load reason, so as to reduce the voltage drop violating the load capacitance driven by the unit.
In one example, if the load reason is: the number of loads driven by the voltage drop violation unit is greater than or equal to a preset number threshold; as shown in S502, performing layout and routing adjustment on the integrated circuit according to the load reason that the load capacitance is greater than or equal to the capacitance threshold value by using the adjustment method corresponding to the load reason may include:
the voltage drop violation unit is replicated in the integrated circuit such that the replicated circuit units share the number of drive loads with the original voltage drop violation unit.
Once the load reason is determined to be that the load quantity is larger than or equal to the preset quantity threshold value, the voltage drop violation unit can be copied, after the circuit unit is copied, the copied circuit unit is logically connected with the load, so that the copied circuit unit and the original voltage drop violation unit equally drive the load quantity, and the load capacitance driven by the voltage drop violation unit is reduced.
The number of the load equally driven by the duplicated circuit unit and the original voltage drop violation unit refers to that: the copied load driven by each circuit unit with the same type as the original voltage drop violation unit is the same in number.
The voltage drop violation unit can be automatically copied by a script in the static voltage drop repair program, and the copying process of the voltage drop violation unit is as follows:
calculating the multiple n of the number of the fan-out units of the copied unit relative to a preset fan-out threshold, dividing the fan-out units of the copied unit into n groups, enabling each copied unit to mount the fan-out unit with the fan-out threshold, and logically connecting each copied unit with the fan-out unit number threshold. In this way, the number of loads driven by each of the duplicated circuit cells and the original voltage drop violation cells after duplication can be made to be n times the number of original fan-out cells.
Wherein the copied cell refers to the voltage drop violation cell. The duplicated units herein refer to each voltage drop violating unit if there is at least one voltage drop violating unit.
The number of the fan-out units of the copied unit can be used for representing the number of loads driven by each voltage drop violating unit, and after the voltage drop violating unit is copied, the copied circuit units and the fan-out units of the original voltage drop violating units are made to mount fan-out units of fan-out thresholds, so that the number of the loads driven by each circuit unit is the same, and the load number averaging of driving is achieved.
In another example, if the load reason is: the length of the driving line between the voltage drop violation unit and the load is greater than or equal to a preset length threshold; as shown in S502, performing layout and routing adjustment on the integrated circuit according to the load reason that the load capacitance is greater than or equal to the capacitance threshold value by using the adjustment method corresponding to the load reason may include:
and inserting a buffer (buffer) on the drive line with the length greater than or equal to the preset length threshold.
If the load reason is that the length of the driving line is greater than or equal to the preset length threshold, a buffer of a preset type can be inserted into the driving line with the length greater than or equal to the preset length threshold, so that the line load capacitance on the driving line between the voltage drop violation unit and the load is reduced, and the load capacitance driven by the voltage drop violation unit is reduced.
For example, in a possible implementation, a buffer may be inserted at a position on a driving line having a length greater than or equal to the preset length threshold, i.e., a long line, a preset distance from the load. The predetermined distance may be, for example, a predetermined percentage of the total driving line length, such as 60% of the total driving line length, i.e., 0.6 times of the total driving line length. Of course, in other examples, the preset percentage value may be other values, which are only examples and are not limited in the embodiments of the present application.
The method for repairing a static voltage drop provided by the embodiment can determine the reason for voltage drop violation, including: under the condition that the load capacitance is larger than or equal to the capacitance threshold, the corresponding modulation modes are respectively adopted to carry out layout wiring adjustment by analyzing specific load reasons according to the load reasons obtained by analysis, such as the number of loads or the length of a load driving line, so that the load capacitance driven by the voltage drop violation unit is reduced, the circuit unit does not need to be moved, the problem of the time sequence of the establishment of the circuit unit does not exist, and the static voltage drop repairing effect is improved.
On the basis of any of the above embodiments, the method for repairing a static voltage drop provided by the embodiment of the present application may further include:
and according to the static voltage drop parameter of the voltage drop violation unit, identifying and displaying the voltage drop violation unit in an interface of the integrated circuit in a preset layout and routing tool, wherein different static voltage drop parameters can correspond to different display modes.
The interface of the integrated circuit may be a layout interface of the integrated circuit. For example, the voltage drop violation units can be respectively identified and displayed in the interface of the integrated circuit in the placement and routing tool according to the numerical value of the static voltage drop parameter of the voltage drop violation unit, so that a user can know the voltage drop condition of the voltage drop violation unit based on the interface display.
And when the user knows the voltage drop of the voltage drop violation unit through interface display, the user can select the range of the preset region where the voltage drop violation unit is located through interface operation, so that the calculation of the unit density in the preset region and the establishment time sequence margin of the time sequence path where each circuit unit is located in the preset region is conveniently executed.
In a possible implementation example, the circuit cells in the integrated circuit whose voltage drop violates the static voltage drop parameter of the cell may be displayed in different colors, or different brightnesses of the same color, in the interface of the integrated circuit in the place and route tool, for example, according to the static voltage drop parameter of the voltage drop violates the cell.
In the interface of the integrated circuit in the layout and routing tool, the circuit units with different static voltage drop parameters in the voltage drop violation unit are respectively marked and displayed, so that the static voltage drop condition of the voltage drop violation unit on the layout and routing tool can be displayed more clearly.
The following describes apparatuses, devices, and storage media for implementing the method for repairing a static voltage drop provided by the present application, and specific implementation processes and technical effects thereof are referred to above, and will not be described again below.
Fig. 6 is a schematic diagram of a device for repairing a static voltage drop according to an embodiment of the present invention, and as shown in fig. 6, the device 600 for repairing a static voltage drop may include:
an obtaining module 601, configured to obtain a static voltage drop analysis result of the integrated circuit, where the static voltage drop analysis result includes: a quiescent voltage drop parameter for a plurality of circuit cells in the integrated circuit.
The determining module 602 is configured to determine a voltage drop violation unit in the integrated circuit according to the quiescent voltage drop parameter of each circuit unit and a quiescent voltage drop violation criterion of the ic core.
A determining module 603 for determining a voltage drop violation reason for the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit.
The adjusting module 604 is configured to perform layout and routing adjustment on the integrated circuit according to the voltage drop violation reason by using a preset voltage drop repairing policy corresponding to the voltage drop violation reason, so as to repair the static voltage drop of the voltage drop violation unit.
Optionally, the layout information includes: at least one layout information; the determining module 603 is specifically configured to: determining whether the voltage drop violation cause includes, based on each of the layout information: the layout information does not satisfy a preset condition.
Optionally, the at least one type of layout information includes: the voltage drop violates the cell density in the predetermined area where the cell is located; a determining module 603, configured to determine whether the cell density is greater than or equal to a preset density threshold; if the cell density is greater than or equal to the density threshold, determining the voltage drop violation cause comprises: the cell density is greater than or equal to the density threshold.
Optionally, the adjusting module 604 is specifically configured to calculate an establishment time timing margin of a timing path in which each circuit unit in the preset region is located; and moving the circuit unit with the time timing margin value being positive value on the timing path in the preset area to an area of which the unit density in the integrated circuit is less than the density threshold value.
Optionally, the at least one kind of layout information further includes: the voltage drop violates a load capacitance driven by the cell;
a determining module 603, configured to specifically determine whether the load capacitance is greater than or equal to a preset capacitance threshold; if the load capacitance is greater than or equal to the capacitance threshold, determining the voltage drop violation cause comprises: the load capacitance is greater than or equal to the capacitance threshold.
Optionally, the adjusting module 604 is specifically configured to determine a load reason that the load capacitance is greater than or equal to the capacitance threshold; and according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value, adopting an adjusting mode corresponding to the load reason to carry out layout wiring adjustment on the integrated circuit.
Optionally, if the load reason is: the number of loads driven by the voltage drop violation unit is greater than or equal to a preset number threshold; the adjusting module 604 is specifically configured to copy the voltage drop violation unit in the integrated circuit, so that the copied circuit unit and the original voltage drop violation unit equally share the number of driving loads.
Optionally, if the load reason is: the length of the driving line between the voltage drop violation unit and the load is greater than or equal to a preset length threshold; the adjusting module 604 is specifically configured to insert a buffer into the driving line with a length greater than or equal to the preset length threshold.
Optionally, the static voltage drop repairing apparatus 600 may further include:
and the display control module is used for identifying and displaying the voltage drop violation unit in an interface of the integrated circuit in a preset layout and wiring tool according to the static voltage drop parameter of the voltage drop violation unit, and different static voltage drop parameters can correspond to different display modes.
Optionally, the display control module is specifically configured to display, in an interface of the integrated circuit in the placement and routing tool, the circuit units with different static voltage drop parameters in the voltage drop violation unit in different colors or different luminances of the same color according to the static voltage drop parameter of the voltage drop violation unit.
The above-mentioned apparatus is used for executing the method provided by the foregoing embodiment, and the implementation principle and technical effect are similar, which are not described herein again.
These above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), or one or more microprocessors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs), among others. For another example, when one of the above modules is implemented in the form of a Processing element scheduler code, the Processing element may be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
Fig. 7 is a schematic diagram of a computer device provided in an embodiment of the present application, where the computer device may be a computing device or a server with a computing processing function.
The computer device 700 includes: memory 701, processor 702. The memory 701 and the processor 702 are connected by a bus.
The memory 701 is used for storing programs, and the processor 702 calls the programs stored in the memory 701 to execute the above method embodiments. The specific implementation and technical effects are similar, and are not described herein again.
Optionally, the invention also provides a program product, for example a computer-readable storage medium, comprising a program which, when being executed by a processor, is adapted to carry out the above-mentioned method embodiments.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (12)

1. A method of static voltage drop repair, the method comprising:
obtaining a static voltage drop analysis result of an integrated circuit, wherein the static voltage drop analysis result comprises: a quiescent voltage drop parameter for each circuit element in the integrated circuit;
judging a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signoff of the integrated circuit;
determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit;
according to the voltage drop violation reason, adopting a preset voltage drop repair strategy corresponding to the voltage drop violation reason to perform layout and wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit;
wherein the layout information includes: at least one layout information; the at least one type of layout information includes: the cell density in a preset area where the voltage drop violation cell is located, and/or the load capacitance driven by the voltage drop violation cell; the determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit includes:
determining, from each layout information, whether the voltage drop violation cause comprises: and each kind of layout information does not meet the preset condition.
2. The method of claim 1, wherein if the at least one layout information comprises: the voltage drop violates the cell density in a preset area where the cell is located;
the determining, from each layout information, whether the voltage drop violation cause is: each kind of layout information does not meet the preset condition, and the method comprises the following steps:
judging whether the unit density is greater than or equal to a preset density threshold value;
if the cell density is greater than or equal to the density threshold, determining the voltage drop violation cause comprises: the cell density is greater than or equal to the density threshold.
3. The method of claim 2, wherein performing layout and routing adjustment on the integrated circuit according to the voltage drop violation reason by using a preset voltage drop repair policy corresponding to the voltage drop violation reason comprises:
calculating the establishment time sequence allowance of the time sequence path of each circuit unit in the preset region;
and moving the circuit unit with the time sequence margin value of positive value established on the time sequence path in the preset area to an area of the integrated circuit, wherein the unit density is less than the density threshold value.
4. The method of claim 1, wherein if the at least one layout information comprises: the voltage drop violates a load capacitance driven by the cell;
the determining, from each layout information, whether the voltage drop violation cause is: each kind of layout information does not meet the preset condition, and the method comprises the following steps:
judging whether the load capacitance is greater than or equal to a preset capacitance threshold value;
if the load capacitance is greater than or equal to the capacitance threshold, determining the voltage drop violation cause comprises: the load capacitance is greater than or equal to the capacitance threshold.
5. The method of claim 4, wherein performing layout and routing adjustment on the integrated circuit according to the voltage drop violation reason by using a preset voltage drop repair policy corresponding to the voltage drop violation reason comprises:
determining a load cause for the load capacitance being greater than or equal to the capacitance threshold;
and according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value, adopting an adjusting mode corresponding to the load reason to carry out layout and wiring adjustment on the integrated circuit.
6. The method of claim 5, wherein if the loading factor is: the number of loads driven by the voltage drop violation unit is greater than or equal to a preset number threshold; the performing layout and wiring adjustment on the integrated circuit by adopting an adjustment mode corresponding to the load reason according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value comprises the following steps:
the voltage drop violating unit is duplicated in the integrated circuit, so that the duplicated circuit unit and the original voltage drop violating unit share the number of driving loads.
7. The method of claim 5, wherein if the loading factor is: a length of a driving line between the voltage drop violating unit and a load is greater than or equal to a preset length threshold; the performing layout and wiring adjustment on the integrated circuit by adopting an adjustment mode corresponding to the load reason according to the load reason of which the load capacitance is greater than or equal to the capacitance threshold value comprises the following steps:
and inserting a buffer on the driving line with the length greater than or equal to the preset length threshold value.
8. The method according to any one of claims 1-7, further comprising:
and according to the static voltage drop parameters of the voltage drop violation unit, identifying and displaying the voltage drop violation unit in an interface of the integrated circuit in a preset layout and wiring tool, wherein different static voltage drop parameters can correspond to different display modes.
9. The method of claim 8, wherein said identifying and displaying the voltage drop violating unit in a predetermined place and route tool interface of the integrated circuit according to the quiescent voltage drop parameter of the voltage drop violating unit comprises:
and according to the static voltage drop parameter of the voltage drop violation unit, displaying the circuit units with different static voltage drop parameters in the voltage drop violation unit in different colors or different brightnesses of the same color in the interface of the integrated circuit in the layout and routing tool.
10. A static voltage drop remediation device comprising:
an obtaining module, configured to obtain a static voltage drop analysis result of an integrated circuit, where the static voltage drop analysis result includes: a quiescent voltage drop parameter for each circuit element in the integrated circuit;
the judging module is used for judging a voltage drop violation unit in the integrated circuit according to the static voltage drop parameter of each circuit unit and the static voltage drop violation standard of the signature of the integrated circuit;
a determining module for determining a voltage drop violation cause of the voltage drop violation unit according to layout information of the voltage drop violation unit in the integrated circuit;
the adjusting module is used for adopting a preset voltage drop repairing strategy corresponding to the voltage drop violation reason according to the voltage drop violation reason to carry out layout wiring adjustment on the integrated circuit so as to repair the static voltage drop of the voltage drop violation unit;
wherein the layout information includes: at least one layout information; the at least one type of layout information includes: the cell density in a preset area where the voltage drop violation cell is located, and/or the load capacitance driven by the voltage drop violation cell; the determining module is specifically configured to determine, according to each type of layout information, whether the voltage drop violation cause includes: and each kind of layout information does not meet the preset condition.
11. A computer device, comprising: a memory storing a computer program executable by the processor, and a processor implementing the static voltage drop repair method of any of claims 1-9 when the computer program is executed by the processor.
12. A storage medium having stored thereon a computer program which, when read and executed, implements the static voltage drop repair method of any of claims 1-9.
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