CN112068047B - Device structure for improving EMC performance of superconducting quantum device and preparation method - Google Patents
Device structure for improving EMC performance of superconducting quantum device and preparation method Download PDFInfo
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Abstract
The invention provides a device structure for improving EMC performance of a superconducting quantum device and a preparation method thereof, the device structure comprises a substrate, a first metal layer and an insulating structure layer, wherein a structure area of the superconducting quantum interference device is arranged between the first metal layer and a metal shielding shell cover, and the structure area mainly comprises a Josephson junction area, a barrier layer, a self-inductance loop, a lead structure, a wiring layer, an input coil, a feedback coil, a lead electrode and the like. The invention can improve the anti-interference capability of the superconducting quantum interference device, reduce the packaging volume of the superconducting quantum interference device and improve the integration level of a using system. The shielding shell is only hundreds of microns in magnitude, and the intrinsic resonance frequency and the low-frequency cut-off frequency of the shielding shell are far higher than the working point of the superconducting quantum interference device, so that the influence on the device is avoided. In addition, the integrated shielding shell adopts a metal layer, so that high-frequency radiation of the Josephson junction can be lost, isolation between adjacent devices is increased in the device array, and mutual crosstalk is avoided.
Description
Technical Field
The invention belongs to the field of semiconductor device design and manufacture, and particularly relates to a device structure for improving the EMC performance of a superconducting quantum device and a preparation method thereof.
Background
Superconducting quantum interference devices (SQUIDs) are extremely sensitive magnetic flux sensors that can detect any weak signal that can be converted into magnetic flux. Since the 1960 s, the development of half a century has been widely applied to various application and research fields such as biomagnetic measurement, geophysical exploration, nondestructive testing, astronomical observation, amplifying circuit systems and the like.
The SQUID device has extremely sensitive detection capability, and is more easily influenced by an external environment electromagnetic field and cannot normally work compared with a common semiconductor detector. The main reason is that the SQUID device is composed of a josephson junction, and the josephson junction exhibits more complicated high-frequency characteristics than a PN junction of a semiconductor. Firstly, the josephson junction has high-frequency oscillation characteristic, and self high-frequency signals at the working point (V-20 uV @10GHz) are coupled with external electromagnetic signals, so that IV and IV at the working point of the SQUID device are coupled with the external electromagnetic signals
The curve is deformed, the working performance is deteriorated, and even the normal work cannot be realized; secondly, the josephson junction has strong nonlinear inductance characteristics, forms a high-frequency resonant cavity together with the capacitance and the circuit inductance of the josephson junction, and shows a parametric amplification function under different electromagnetic field signal pumping; finally, the josephson junction IV curve has strong nonlinearity that causes noise or interference signals to mix with its intrinsic high frequency oscillation signal and enter the dc and low frequency bands of the SQUID device, causing the SQUID device noise performance to deteriorate dramatically. Therefore, improving the EMC performance of SQUID devices is an important challenge for their widespread application.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention aims to provide a superconducting quantum interference device and a method for manufacturing the same, which are used for solving the problem that the EMC performance of the superconducting quantum interference device in the prior art is difficult to improve.
In order to achieve the above objects and other related objects, the present invention provides a method for fabricating a superconducting quantum interference device, the method comprising: 1) providing a substrate; 2) depositing a first metal layer on the front surface or the back surface of the substrate on the substrate; 3) depositing a first insulating layer on the metal layer; 4) preparing a metal resistance layer on the first insulating layer; 5) preparing a second insulating layer on the metal resistance layer, and preparing and forming a first via hole on the second insulating layer, wherein the first via hole is used for connecting the metal resistance layer; 6) preparing a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer on the substrate in sequence; 7) etching the second superconducting thin film layer to form a Josephson junction region; 8) etching the barrier layer to remove portions of the barrier layer, leaving the barrier layer under the Josephson junction regions; 9) etching the first superconducting thin film layer to form a self-inductance loop and a lead structure of the superconducting quantum interference device; 10) depositing a third insulating layer on the second superconducting thin film layer, and forming a second via hole on the third insulating layer, wherein the second via hole is used for connecting the metal resistance layer and a top electrode leading out the Josephson junction; 11) depositing a third superconducting thin film layer on the third insulating layer, and etching the third superconducting thin film layer to form a wiring layer, an input coil, a feedback coil and a lead electrode; 12) depositing a fourth insulating layer on the third superconducting thin film layer, and flattening the fourth insulating layer; 13) and depositing a second metal layer on the fourth insulating layer, and etching the second metal layer to form a metal shielding shell cover on the fourth insulating layer.
Optionally, step 3) further comprises: etching the first insulating layer to form a first groove, wherein the first groove is used for preparing a metal shielding shell subsequently; step 5) also comprises the following steps: preparing and forming a second groove on the second insulating layer, wherein the second groove is aligned to the groove of the first insulating layer and is used for preparing the metal shielding shell subsequently; step 10) further comprises: forming a third groove on the third insulating layer, wherein the third groove is aligned with the second groove in position and is used for preparing a metal shielding shell subsequently; step 12) further comprises: forming a fourth groove on the fourth insulating layer, wherein the fourth groove is aligned with the third groove in position and is used for preparing a metal shielding shell subsequently; step 13) further comprises: and depositing a second metal layer in the first groove, the second groove, the third groove and the fourth groove, and etching the second metal layer to form peripheral metal walls in the first groove, the second groove, the third groove and the fourth groove, wherein the peripheral metal walls, the first metal layer and the metal shielding shell cover jointly form a metal shielding shell for sealing the superconducting quantum interference device, and the size of the metal shielding shell is hundreds of microns.
Optionally, the first metal layer and the second metal layer are non-superconducting thin film layers, the non-superconducting thin film layers not only shield ambient electromagnetic field signals, but also enable high-frequency signals radiated by the environment or a josephson junction to be rapidly lost, and the phenomenon that eddy current is induced by the superconducting thin film layers to influence the normal work of the superconducting quantum interference device is avoided.
Optionally, the first metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the metal resistance layer comprises any one of a TiPd layer or a TiAuPd layer; when the superconducting quantum interference device works at 4K, the metal resistance layer comprises any one of a TiPd layer, a TiAuPd layer and a Mo layer.
Optionally, the substrate comprises Si/SiO2Substrate, MgO substrate and Al2O3Any one of substrates; the first insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the second insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the third insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the fourth insulating layer comprises SiO2Any one of a layer, an SiO layer, or an MgO layer.
Optionally, the structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer includes any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure or a NbN/AlN/NbN structure.
Optionally, the etching process includes any one of a reactive ion etching process, an ion beam etching process, a stripping process, and a chemical etching process.
Optionally, a chemical mechanical polishing process is used to planarize the fourth insulating layer to ensure deposition of the fourth superconducting thin film layer.
The present invention also provides a superconducting quantum interference device comprising: a substrate; the first metal layer is formed on the front surface or the back surface of the substrate; a first insulating layer formed on the metal layer; a metal resistance layer formed on the first insulating layer; the second insulating layer is formed on the metal resistance layer and the first insulating layer, a first through hole is formed in the second insulating layer, and the first through hole is used for being connected with the metal resistance layer; the self-inductance type superconducting quantum interference device comprises a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer which are sequentially stacked, wherein the second superconducting thin film layer is etched to form a Josephson junction area, the first superconducting thin film layer is etched to form a self-inductance loop and a lead structure of the superconducting quantum interference device, and the barrier layer is located between the Josephson junction area and the first superconducting thin film layer; a third insulating layer formed on the second superconducting thin film layer, wherein a second via hole is formed in the third insulating layer and used for connecting the metal resistance layer and a top electrode leading out the Josephson junction; a third superconducting thin film layer formed on the third insulating layer, the third superconducting thin film layer being etched to form a wiring layer, an input coil, a feedback coil, and a lead electrode; a fourth insulating layer formed on the third superconducting thin film layer; and the second metal layer is formed on the fourth insulating layer and etched to form a metal shielding shell cover on the fourth insulating layer.
Optionally, a first trench is formed in the first insulating layer, the first trench is used for subsequently preparing a metal shielding shell, a second trench is formed in the second insulating layer, the second trench is aligned with the first insulating layer trench and is used for subsequently preparing the metal shielding shell, a third trench is formed in the third insulating layer and is aligned with the second trench and is used for subsequently preparing the metal shielding shell, a fourth trench is formed in the fourth insulating layer and is aligned with the third trench and is used for subsequently preparing the metal shielding shell, the second metal layer is deposited in the first trench, the second trench, the third trench and the fourth trench to form a peripheral metal wall in the first trench, the second trench, the third trench and the fourth trench, and the first metal layer and the metal shielding shell cover together form a metal shielding shell for sealing the superconducting quantum interference device, the size of the metal shielding shell is in the order of hundreds of microns.
Optionally, the first metal layer and the second metal layer are non-superconducting thin film layers, the non-superconducting thin film layers not only shield ambient electromagnetic field signals, but also enable high-frequency signals radiated by the environment or a josephson junction to be rapidly lost, and the phenomenon that eddy current is induced by the superconducting thin film layers to influence the normal work of the superconducting quantum interference device is avoided.
Optionally, the first metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the metal resistance layer comprises any one of a TiPd layer or a TiAuPd layer; when the superconducting quantum interference device works at 4K, the metal resistance layer comprises any one of a TiPd layer, a TiAuPd layer and a Mo layer.
Optionally, the substrate comprises Si/SiO2Substrate, MgO substrate and Al2O3Any one of substrates; the first insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the second insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the third insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the fourth insulating layer comprises SiO2Any one of a layer, an SiO layer, or an MgO layer.
Optionally, the structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer includes any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure or a NbN/AlN/NbN structure.
As described above, the device structure and the manufacturing method for improving the EMC performance of the superconducting quantum device of the present invention have the following beneficial effects:
1) from the aspects of chip design and preparation, the invention can further improve the anti-interference capability of the superconducting quantum interference device, even omit an external shielding case, reduce the packaging volume of the superconducting quantum interference device and improve the integration level of a using system. In addition, the integrated shielding shell adopts a metal layer, so that high-frequency radiation of a Josephson junction can be lost, isolation between adjacent superconducting quantum interference devices is increased in the high superconducting quantum interference device array, and mutual crosstalk is avoided.
2) The intrinsic resonance frequency of the existing external large-size (cm magnitude) shielding case is lower, the existing external large-size (cm magnitude) shielding case falls near the working point of the superconducting quantum interference device and is easy to be mutually coupled with the superconducting quantum interference device to influence the normal work of the device.
3) The on-chip integrated shielding shell is compatible with the existing superconducting quantum interference device preparation process, is convenient to prepare and process, and can also be used for improving the EMC performance of other related micro-nano chips.
Drawings
Fig. 1 is a schematic flow chart showing steps of a method for manufacturing a superconducting quantum interference device according to an embodiment of the present invention.
Fig. 2 to 3 are schematic structural diagrams of a superconducting quantum interference device according to an embodiment of the present invention, wherein fig. 3 is a top view of the structure of fig. 2.
Fig. 4 to 5 are schematic structural diagrams of a superconducting quantum interference device according to another embodiment of the present invention, wherein fig. 5 is a top view of the structure of fig. 4.
Fig. 6 to 7 are schematic structural diagrams of a superconducting quantum interference device according to still another embodiment of the present invention, wherein fig. 7 is a top view of the structure of fig. 6.
Description of the element reference numerals
101 substrate
102 insulating structure layer
201 first metal layer
202 metal shield case cover
203 metal wall around
301 device structure region
S11-S18
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
In one superconducting quantum interference device design, the EMC performance of the SQUID device can be improved from two perspectives, circuit package and SQUID device design. The circuit package comprises a shielding box made of a superconducting material such as niobium (Nb), lead (Pb), aluminum (Al) and the like, or a high-permeability (u-metal) permalloy material. In addition, shielding lines, connectors and low-pass filters are adopted, so that the probability that the ambient electromagnetic field is coupled to the SQUID device through the transmission line is reduced. For improving the EMC performance of the SQUID device from the design angle, a first-order, second-order or high-order differential structure can be adopted to eliminate external common-mode electromagnetic signal interference, or an on-chip integrated low-pass filter is adopted to inhibit noise interference on a transmission line, or the size of a josephson junction and a SQUID self-inductance loop is reduced to reduce the possibility of external interference, or a series of methods such as manufacturing superconducting thin film defects to reduce the probability of magnetic flux pinning and the like are adopted. The method can improve the EMC performance of the SQUID device, can achieve certain effect, and promotes the SQUID device to gradually move to more application fields.
With the rapid development of the superconducting micro-nano preparation technology, the EMC performance of the SQUID device can be improved from the aspects of chip design and preparation. The on-chip integrated metal shielding shell is prepared by adopting a metal film, and a Josephson junction (josephson junction) and a self-inductance loop (washer) unit of which the devices are most easily interfered by an electromagnetic field are closed. According to the invention, from the aspects of chip design and preparation, the EMC performance of the SQUID device is improved by preparing the integrated metal shielding shell on the chip. The waveguide structure formed by the metal shielding shell has the size of about hundred microns, is equivalent to a high-pass filter, cannot exist or propagate electromagnetic signals below 100GHz, and effectively avoids the problem of electromagnetic interference of the SQUID device at a working point.
Based on the above, as shown in fig. 1 to 5, the present embodiment provides a method for manufacturing a superconducting quantum interference device, the method comprising:
as shown in fig. 1, step 1) S11 is first performed to provide a substrate; and depositing a first metal layer on the front surface or the back surface of the substrate on the substrate.
In one embodiment, the first metal layer is deposited on the front surface of the substrate, as shown in fig. 2 to 3.
In yet another embodiment, the first metal layer is deposited on the back side of the substrate, as shown in fig. 4-5.
For example, the substrate may be Si/SiO2Substrate, MgO substrate and Al2O3Any one of the substrates.
The first metal layer adopts a non-superconducting thin film layer, the non-superconducting thin film layer not only shields environmental electromagnetic field signals, but also enables surface induced current caused by the environmental electromagnetic field to be rapidly lost, and the phenomenon that the superconducting quantum interference device normally works because eddy current is formed by the superconducting thin film induced current is avoided. For example, the first metal layer includes any one of a gold layer, a copper layer, and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer.
As shown in fig. 1, then, step 2) S12 is performed to deposit a first insulating layer on the metal layer; and preparing a metal resistance layer on the first insulating layer.
For example, the first insulating layer can be deposited using, for example, a chemical vapor deposition process, and the like, the first insulating layer comprising SiO2Any one of a layer, an SiO layer, or an MgO layer.
The metal resistance layer includes any one of a Mo layer, a TiPd layer, and a tiaopp layer, and in this embodiment, the metal resistance layer is a TiPd layer. The metal resistance layer may be formed by a sputtering process and a metal etching process, or may be formed by a metal lift-off process (lift-off).
As shown in fig. 1, step 3) S13 is performed to prepare a second insulating layer on the metallic resistance layer, and prepare and form a first via hole on the second insulating layer, where the first via hole is used to connect to the metallic resistance layer.
For example, the second insulating layer can be deposited using, for example, a chemical vapor deposition process, and the like, the second insulating layer comprising SiO2Any one of a layer, an SiO layer, or an MgO layer.
And then, preparing and forming a first through hole on the second insulating layer through a photoetching process and an etching process. The etching process comprises any one of a reactive ion etching process, an ion beam etching process, a stripping process and a chemical etching process.
As shown in fig. 1, subsequently to step 4) S14, a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer are sequentially prepared on the substrate; etching the second superconducting thin film layer to form a Josephson junction region; etching the barrier layer to remove portions of the barrier layer, leaving the barrier layer under the Josephson junction regions; and etching the first superconducting thin film layer to form a self-inductance loop and a lead structure of the superconducting quantum interference device.
The structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer comprises any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure or a NbN/AlN/NbN structure. In this embodiment, the structure formed by the first superconducting thin film layer, the barrier layer, and the second superconducting thin film layer is a Nb/Al-AlOx/Nb structure.
For example, the etching process includes any one of a reactive ion etching process, an ion beam etching process, a stripping process, and a chemical etching process.
As shown in fig. 1, step 5) S15 follows, depositing a third insulating layer on the second superconducting thin film layer, and forming a second via hole on the third insulating layer, the second via hole being used for connecting the metal resistance layer and a top electrode leading out the josephson junction.
For example, the third insulating layer can be deposited using, for example, a chemical vapor deposition process, and the like, the third insulating layer comprising SiO2Any one of a layer, an SiO layer, or an MgO layer.
And then, preparing and forming a second through hole on the third insulating layer through a photoetching process and an etching process. The etching process comprises any one of a reactive ion etching process, an ion beam etching process, a stripping process and a chemical etching process.
As shown in fig. 1, step 6) S16 is performed next, a third superconducting thin film layer is deposited on the third insulating layer, and the third superconducting thin film layer is etched to form a wiring layer, an input coil, a feedback coil and a lead electrode.
The third insulating layer comprises SiO2Any one of a layer, an SiO layer, or an MgO layer.
For example, the etching process includes any one of a reactive ion etching process, an ion beam etching process, a stripping process, and a chemical etching process.
As shown in fig. 1, step 7) S17 is performed, a fourth insulating layer is deposited on the third superconducting thin film layer, and the fourth insulating layer is planarized.
The fourth insulating layer comprises SiO2Any one of a layer, an SiO layer, or an MgO layer.
In this embodiment, a chemical mechanical polishing process is used to planarize the fourth insulating layer to ensure deposition of the fourth superconducting thin film layer.
As shown in fig. 1, step 8) S18 is performed to deposit a second metal layer on the fourth insulating layer, and the second metal layer is etched to form a metal shield cover on the fourth insulating layer.
In this embodiment, the second metal layer is a non-superconducting thin film layer, and the non-superconducting thin film layer not only shields ambient electromagnetic field signals, but also enables high-frequency signals radiated by the environment or a josephson junction to be rapidly lost, thereby preventing eddy current induced by the superconducting thin film from influencing normal operation of the superconducting quantum interference device. The second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer.
The etching treatment process comprises any one of a reactive ion etching process, an ion beam etching process, a stripping process and a chemical etching process.
As shown in fig. 2 to 5, the present embodiment also provides a superconducting quantum interference device, including: a substrate; the first metal layer is formed on the front surface or the back surface of the substrate; a first insulating layer formed on the metal layer; a metal resistance layer formed on the first insulating layer; the second insulating layer is formed on the metal resistance layer and the first insulating layer, a first through hole is formed in the second insulating layer, and the first through hole is used for being connected with the metal resistance layer; the self-inductance type superconducting quantum interference device comprises a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer which are sequentially stacked, wherein the second superconducting thin film layer is etched to form a Josephson junction area, the first superconducting thin film layer is etched to form a self-inductance loop and a lead structure of the superconducting quantum interference device, and the barrier layer is located between the Josephson junction area and the first superconducting thin film layer; a third insulating layer formed on the second superconducting thin film layer, wherein a second via hole is formed in the third insulating layer and used for connecting the metal resistance layer and a top electrode leading out the Josephson junction; a third superconducting thin film layer formed on the third insulating layer, the third superconducting thin film layer being etched to form a wiring layer, an input coil, a feedback coil, and a lead electrode; a fourth insulating layer formed on the third superconducting thin film layer; and the second metal layer is formed on the fourth insulating layer and etched to form a metal shielding shell cover on the fourth insulating layer.
The first metal layer and the second metal layer adopt non-superconducting thin film layers, the non-superconducting thin film layers not only shield environmental electromagnetic field signals, but also enable high-frequency signals radiated by the environment or a Josephson junction to be rapidly lost, and the phenomenon that the normal work of a superconducting quantum interference device is influenced by eddy current formed by induced current of the superconducting thin films is avoided.
The first metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; when the superconducting quantum interference device works at 4K, the first metal layer comprises any one of a gold layer, a copper layer, a palladium layer, an aluminum layer and a molybdenum layer; the metal resistance layer comprises any one of a TiPd layer or a TiAuPd layer; when the superconducting quantum interference device works at 4K, the metal resistance layer comprises any one of a TiPd layer, a TiAuPd layer and a Mo layer.
The substrate comprises Si/SiO2Substrate, MgO substrate and Al2O3Any one of substrates; the first insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the second insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the third insulating layer comprises SiO2Any one of a layer, a SiO layer, or a MgO layer; the fourth insulating layer comprises SiO2Any one of a layer, an SiO layer, or an MgO layer.
The structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer comprises any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure or a NbN/AlN/NbN structure.
As shown in fig. 2 to 5, the superconducting quantum interference device includes a substrate 101 and a first metal layer 201, the first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and an insulating structure layer 102 formed together, and a device structure region 301 is formed between the first metal layer 201 and a metal shielding case cover 202, and mainly includes: the self-inductance type superconducting quantum interference device comprises a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer which are sequentially stacked, wherein the second superconducting thin film layer is etched to form a Josephson junction area, the first superconducting thin film layer is etched to form a self-inductance loop and a lead structure of the superconducting quantum interference device, and the barrier layer is located between the Josephson junction area and the first superconducting thin film layer; a third insulating layer formed on the second superconducting thin film layer, wherein a second via hole is formed in the third insulating layer and used for connecting the metal resistance layer and a top electrode leading out the Josephson junction; and the third superconducting thin film layer is formed on the third insulating layer and etched to form a wiring layer, an input coil, a feedback coil and a lead electrode.
Example 2
As shown in fig. 6 to 7, the present embodiment provides a method for manufacturing a superconducting quantum interference device, which comprises the following basic steps as in embodiment 1, wherein the method is different from embodiment 1 in that: step 2) also includes: etching the first insulating layer to form a first groove, wherein the first groove is used for preparing a metal shielding shell subsequently; step 3) also includes: preparing and forming a second groove on the second insulating layer, wherein the second groove is aligned to the groove of the first insulating layer and is used for preparing the metal shielding shell subsequently; step 5) also comprises the following steps: forming a third groove on the third insulating layer, wherein the third groove is aligned with the second groove in position and is used for preparing a metal shielding shell subsequently; step 7) also includes: forming a fourth groove on the fourth insulating layer, wherein the fourth groove is aligned with the third groove in position and is used for preparing a metal shielding shell subsequently; step 8) also includes: depositing a second metal layer in the first trench, the second trench, the third trench and the fourth trench, and etching the second metal layer to form a peripheral metal wall 203 in the first trench, the second trench, the third trench and the fourth trench, and forming a metal shielding shell together with the first metal layer 201 and the metal shielding shell cover 202 to form a closed metal shielding shell of the superconducting quantum interference device, wherein the size of the metal shielding shell is hundreds of microns. The size of the metal shielding shell should be kept as small as possible, such as hundred microns, so as to improve the low-frequency cut-off frequency and the self-resonant frequency of the shielding shell, and avoid the radio frequency radiation coupling with the SQUID device from influencing the performance of the device.
As shown in fig. 6 to 7, the present embodiment provides a superconducting quantum interference device whose basic structure is as in embodiment 1, wherein the difference from embodiment 1 is that: the first insulating layer is provided with a first groove, the first groove is used for preparing a metal shielding shell subsequently, the second insulating layer is provided with a second groove, the second groove is aligned with the groove of the first insulating layer and used for preparing the metal shielding shell subsequently, the third insulating layer is provided with a third groove, the third groove is aligned with the second groove and used for preparing the metal shielding shell subsequently, the fourth insulating layer is provided with a fourth groove, the fourth groove is aligned with the third groove and used for preparing the metal shielding shell subsequently, the second metal layer is deposited in the first groove, the second groove, the third groove and the fourth groove so as to form a metal wall on the periphery in the first groove, the second groove, the third groove and the fourth groove and form a metal shielding shell closed by the superconducting quantum interference device together with the first metal layer and the metal shielding shell cover, the size of the metal shielding shell is in the order of hundreds of microns. The embodiment can form a totally-enclosed metal shielding shell, and can further improve the anti-interference capability of the superconducting quantum interference device.
As described above, the device structure and the manufacturing method for improving the EMC performance of the superconducting quantum device of the present invention have the following beneficial effects:
1) from the aspects of chip design and preparation, the invention can further improve the anti-interference capability of the superconducting quantum interference device, even omit an external shielding case, reduce the packaging volume of the superconducting quantum interference device and improve the integration level of a using system. In addition, the integrated shielding shell adopts a metal layer, so that high-frequency radiation of the Josephson junction can be lost, isolation between adjacent superconducting quantum interference devices is increased in the high superconducting quantum interference device array, and mutual crosstalk is avoided.
2) The intrinsic resonance frequency of the existing external large-size (cm magnitude) shielding case is lower, the existing external large-size (cm magnitude) shielding case falls near the working point of the superconducting quantum interference device and is easy to be mutually coupled with the superconducting quantum interference device to influence the normal work of the device.
3) The on-chip integrated shielding shell is compatible with the existing superconducting quantum interference device preparation process, is convenient to prepare and process, and can also be used for improving the EMC performance of other related micro-nano chips. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (12)
1. A preparation method of a superconducting quantum interference device is characterized by comprising the following steps:
1) providing a substrate;
2) depositing a first metal layer on the front surface or the back surface of the substrate on the substrate;
3) depositing a first insulating layer on the metal layer, and etching the first insulating layer to form a first groove, wherein the first groove is used for preparing a metal shielding shell subsequently;
4) preparing a metal resistance layer on the first insulating layer;
5) preparing a second insulating layer on the metal resistance layer, preparing and forming a first via hole on the second insulating layer, wherein the first via hole is used for connecting the metal resistance layer, preparing and forming a second groove on the second insulating layer, and the second groove is aligned to the groove of the first insulating layer and used for preparing the metal shielding shell subsequently;
6) preparing a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer on the substrate in sequence;
7) etching the second superconducting thin film layer to form a Josephson junction region;
8) etching the barrier layer to remove portions of the barrier layer, leaving the barrier layer under the Josephson junction regions;
9) etching the first superconducting thin film layer to form a self-inductance loop and a lead structure of the superconducting quantum interference device;
10) depositing a third insulating layer on the second superconducting thin film layer, forming a second via hole on the third insulating layer, wherein the second via hole is used for connecting the metal resistance layer and a top electrode leading out the Josephson junction, and forming a third groove on the third insulating layer, and the third groove is aligned with the second groove in position and used for preparing a metal shielding shell subsequently;
11) depositing a third superconducting thin film layer on the third insulating layer, and etching the third superconducting thin film layer to form a wiring layer, an input coil, a feedback coil and a lead electrode;
12) depositing a fourth insulating layer on the third superconducting thin film layer, and carrying out planarization treatment on the fourth insulating layer to form a fourth groove on the fourth insulating layer, wherein the fourth groove is aligned with the third groove in position and is used for preparing a metal shielding shell subsequently;
13) depositing a second metal layer on the fourth insulating layer, performing etching treatment on the second metal layer to form a metal shielding shell cover on the fourth insulating layer, depositing the second metal layer in the first groove, the second groove, the third groove and the fourth groove, performing etching treatment on the second metal layer to form peripheral metal walls in the first groove, the second groove, the third groove and the fourth groove, and forming a metal shielding shell enclosed by the superconducting quantum interference device together with the first metal layer and the metal shielding shell cover, wherein the size of the metal shielding shell is hundreds of microns.
2. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: the first metal layer and the second metal layer adopt non-superconducting thin film layers, the non-superconducting thin film layers not only shield environmental electromagnetic field signals, but also enable high-frequency signals radiated by the environment or a Josephson junction to be rapidly lost, and the phenomenon that the normal work of a superconducting quantum interference device is influenced by eddy current formed by induced current of the superconducting thin films is avoided.
3. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: the first metal layer comprises any one of a gold layer, a copper layer and a palladium layer; the second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; the metal resistance layer includes any one of a TiPd layer and a TiAuPd layer.
4. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: the substrate comprises Si/SiO2Substrate, MgO substrate and Al2O3Any one of substrates; the first insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the second insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the third insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the fourth insulating layer comprises SiO2Any one of a layer, an SiO layer and an MgO layer.
5. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: the structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer comprises any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure and a NbN/AlN/NbN structure.
6. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: the etching treatment process comprises any one of a reactive ion etching process, an ion beam etching process, a stripping process and a chemical etching process.
7. The method of manufacturing a superconducting quantum interference device according to claim 1, wherein: and carrying out planarization treatment on the fourth insulating layer by adopting a chemical mechanical polishing process so as to ensure the deposition of the second metal layer.
8. A superconducting quantum interference device, comprising:
a substrate;
the first metal layer is formed on the front surface or the back surface of the substrate;
a first insulating layer formed on the metal layer;
a metal resistance layer formed on the first insulating layer;
the second insulating layer is formed on the metal resistance layer and the first insulating layer, a first through hole is formed in the second insulating layer, and the first through hole is used for being connected with the metal resistance layer;
the self-inductance type superconducting quantum interference device comprises a first superconducting thin film layer, a barrier layer and a second superconducting thin film layer which are sequentially stacked, wherein the second superconducting thin film layer is etched to form a Josephson junction area, the first superconducting thin film layer is etched to form a self-inductance loop and a lead structure of the superconducting quantum interference device, and the barrier layer is located between the Josephson junction area and the first superconducting thin film layer;
a third insulating layer formed on the second superconducting thin film layer, wherein a second via hole is formed in the third insulating layer and used for connecting the metal resistance layer and a top electrode leading out the Josephson junction;
a third superconducting thin film layer formed on the third insulating layer, the third superconducting thin film layer being etched to form a wiring layer, an input coil, a feedback coil, and a lead electrode;
a fourth insulating layer formed on the third superconducting thin film layer;
a second metal layer formed on the fourth insulating layer, the second metal layer being etched to form a metal shielding case cover on the fourth insulating layer;
the first insulating layer is provided with a first groove, the first groove is used for preparing a metal shielding shell subsequently, the second insulating layer is provided with a second groove, the second groove is aligned with the groove of the first insulating layer and used for preparing the metal shielding shell subsequently, the third insulating layer is provided with a third groove, the third groove is aligned with the second groove and used for preparing the metal shielding shell subsequently, the fourth insulating layer is provided with a fourth groove, the fourth groove is aligned with the third groove and used for preparing the metal shielding shell subsequently, the second metal layer is deposited in the first groove, the second groove, the third groove and the fourth groove so as to form a metal wall on the periphery in the first groove, the second groove, the third groove and the fourth groove and form a metal shielding shell closed by the superconducting quantum interference device together with the first metal layer and the metal shielding shell cover, the size of the metal shielding shell is in the order of hundreds of microns.
9. The superconducting quantum interference device of claim 8, wherein: the first metal layer and the second metal layer adopt non-superconducting thin film layers, the non-superconducting thin film layers not only shield environmental electromagnetic field signals, but also enable high-frequency signals radiated by the environment or a Josephson junction to be rapidly lost, and the phenomenon that the normal work of a superconducting quantum interference device is influenced by eddy current formed by induced current of the superconducting thin films is avoided.
10. The superconducting quantum interference device of claim 8, wherein: the first metal layer comprises any one of a gold layer, a copper layer and a palladium layer; the second metal layer comprises any one of a gold layer, a copper layer and a palladium layer; the metal resistance layer includes any one of a TiPd layer and a TiAuPd layer.
11. The superconducting quantum interference device of claim 8, wherein: the substrate comprises Si/SiO2Substrate, MgO substrate and Al2O3Any one of substrates; the first insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the second insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the third insulating layer comprises SiO2Any one of a layer, a SiO layer and a MgO layer; the fourth insulating layer comprises SiO2Any one of a layer, an SiO layer and an MgO layer.
12. The superconducting quantum interference device of claim 8, wherein: the structure formed by the first superconducting thin film layer, the barrier layer and the second superconducting thin film layer comprises any one of a Nb/Al-AlOx/Nb structure, a NbN/Al-AlOx/NbN structure and a NbN/AlN/NbN structure.
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