CN111969004A - Micro semiconductor structure and manufacturing method thereof - Google Patents

Micro semiconductor structure and manufacturing method thereof Download PDF

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Publication number
CN111969004A
CN111969004A CN202010894052.3A CN202010894052A CN111969004A CN 111969004 A CN111969004 A CN 111969004A CN 202010894052 A CN202010894052 A CN 202010894052A CN 111969004 A CN111969004 A CN 111969004A
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layer
substrate
dissociation
micro semiconductor
micro
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吴柏威
杨翔甯
罗玉云
史诒君
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Chuangchuang Display Technology Co ltd
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Chuangchuang Display Technology Co ltd
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Priority to CN202010894052.3A priority Critical patent/CN111969004A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/80—Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates

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  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Thin Film Transistor (AREA)

Abstract

A micro semiconductor structure and a manufacturing method thereof are provided, wherein the micro semiconductor structure comprises a substrate, a dissociation layer, a protection layer and a micro semiconductor. The dissociation layer is arranged on one side of the substrate, the protective layer is arranged on at least one of the two sides of the substrate, and the miniature semiconductor is arranged on the same side of the two sides of the substrate as the dissociation layer. The penetration rate of the protective layer to the light source with the wavelength less than 360nm is less than 20 percent. Therefore, the protective layer can prevent the miniature semiconductor from being irradiated by a laser light source to generate abnormity or damage in the laser dissociation process.

Description

Micro semiconductor structure and manufacturing method thereof
Technical Field
The present disclosure relates to a micro semiconductor structure and a method for fabricating the same, and more particularly, to a micro semiconductor structure applied to a laser dissociation process and a method for fabricating the same.
Background
In recent years, various types of electronic devices have been widely used for various types of miniature semiconductors, such as: organic Light-Emitting diodes (OLEDs) or Micro Light-Emitting diodes (Micro LEDs). In the process of manufacturing the micro semiconductor, the micro semiconductor is usually processed on different substrates, and the micro semiconductor is usually separated from the substrate by a Laser Lift-Off (LLO) process, so that the micro semiconductor is transferred between different substrates and processed. However, after the micro semiconductor is scaled down to the micrometer scale, the micro semiconductor is often abnormal or damaged by the laser light source irradiation in the laser dissociation process. Therefore, the development of a micro semiconductor structure suitable for laser dissociation and a method for fabricating the same is an important and urgent problem in industry.
Disclosure of Invention
The present disclosure provides a micro semiconductor structure and a method for fabricating the same, which reduces the damage rate of the micro semiconductor structure in a laser dissociation process by configuring a protection layer having a low transmittance to laser light.
According to an embodiment of the present disclosure, a micro semiconductor structure includes a substrate, a release layer, a protection layer, and a micro semiconductor. The dissociation layer is arranged on one side of the substrate, the protective layer is arranged on at least one of the two sides of the substrate, and the miniature semiconductor is arranged on the same side of the two sides of the substrate as the dissociation layer. The penetration rate of the protective layer to the light source with the wavelength less than 360nm is less than 20 percent.
The micro-semiconductor structure according to the embodiment described in the previous paragraph, wherein the protective layer has a young's modulus greater than that of the release layer.
The semiconductor device according to the embodiment of the present disclosure, wherein the dissociation layer, the protection layer and the micro semiconductor are disposed on the same side of the substrate, the dissociation layer is disposed on the substrate, the protection layer is disposed on the dissociation layer, and the micro semiconductor is disposed on the protection layer.
The micro semiconductor structure according to the embodiment of the present invention may further include an easily removable layer disposed between the passivation layer and the micro semiconductor.
In the micro semiconductor structure according to the embodiment of the present invention, the easily removable layer and the dissociation layer are both made of organic materials, and the protection layer is made of inorganic materials.
The micro semiconductor structure according to the embodiment of the previous paragraph, wherein the passivation layer is a patterned structure.
According to the micro semiconductor structure of the embodiment described in the previous paragraph, a ratio of a total area of the protection layer projected onto the substrate to an area of the dissociation layer projected onto the substrate may be between 0.5 and 1.
In the micro semiconductor structure according to the embodiment of the present invention, the dissociation layer may be disposed under the protection layer, and a projected area of the protection layer on the substrate is greater than or equal to a projected area of the dissociation layer on the substrate.
The micro-semiconductor structure according to the embodiment of the previous paragraph, wherein the protection layer comprises a metal material.
The micro semiconductor structure according to the embodiment of the present invention, wherein the passivation layer comprises a first passivation layer and a second passivation layer, and the second passivation layer and the first passivation layer can be disposed alternately.
The micro semiconductor structure according to the embodiment of the present invention, wherein the projection of the micro semiconductor on the substrate is overlapped with the projection of the first passivation layer or the second passivation layer on the substrate at any position.
In the micro semiconductor structure according to the embodiment of the present invention, a cross-sectional area of the dissociation layer perpendicular to the substrate is gradually reduced toward the substrate.
The micro semiconductor structure according to the embodiment of the present invention, wherein the micro semiconductor further includes an insulating layer, and the insulating layer is located between the micro semiconductor and the protection layer.
The micro semiconductor structure according to the embodiment of the previous paragraph, wherein a projected area of the micro semiconductor or the protection layer on the substrate is larger than a projected area of the dissociation layer on the substrate.
According to an embodiment of the present disclosure, a method for fabricating a micro semiconductor structure includes a substrate providing step, a dissociation layer disposing step, a protection layer disposing step, and a micro semiconductor disposing step. The substrate providing step is to provide a substrate. The step of arranging the dissociation layer is to arrange the dissociation layer on one side of the substrate. The protective layer setting step is to set a protective layer on at least one side of the substrate. The micro semiconductor setting step is to set a micro semiconductor on the same side of the two sides of the substrate as the dissociation layer. The penetration rate of the protective layer to the light source with the wavelength less than 360nm is less than 20 percent.
The method for fabricating a micro semiconductor structure according to the embodiment of the present invention may further include a step of disposing an easily removable layer. The step of disposing the easy-to-remove layer is to dispose an easy-to-remove layer between the micro semiconductor and the protection layer.
In the method for manufacturing a micro semiconductor structure according to the embodiment of the present invention, when the dissociation layer is dissociated by the light source, the light source and the protection layer are correspondingly disposed on two sides of the dissociation layer.
Drawings
FIG. 1 shows a schematic structural diagram of a micro semiconductor structure according to a first embodiment of the present disclosure;
FIG. 2 shows a schematic structural diagram of a micro semiconductor structure according to a second embodiment of the present disclosure;
FIG. 3 shows a schematic structural diagram of a micro semiconductor structure according to a third embodiment of the present disclosure;
FIG. 4 is a schematic diagram illustrating a structure of a micro semiconductor structure according to a fourth embodiment of the present disclosure;
FIG. 5 shows a schematic structural diagram of a micro semiconductor structure in a fifth embodiment according to the present disclosure;
FIG. 6 shows a schematic structural diagram of a micro semiconductor structure according to a sixth embodiment of the present disclosure;
FIG. 7 is a schematic diagram illustrating a structure of a micro semiconductor structure according to a seventh embodiment of the present disclosure;
FIG. 8 is a schematic structural diagram illustrating a micro semiconductor structure according to an eighth embodiment of the present disclosure;
FIG. 9 is a schematic diagram illustrating a structure of a micro semiconductor structure according to a ninth embodiment of the present disclosure;
FIG. 10 is a schematic structural diagram illustrating a micro semiconductor structure according to a tenth embodiment of the present disclosure;
FIG. 11 is a flow chart illustrating steps in a method of fabricating a micro semiconductor structure according to an eleventh embodiment of the present disclosure; and
FIG. 12 is a flowchart illustrating steps in a method for fabricating a micro semiconductor structure according to a twelfth embodiment of the present disclosure.
Description of reference numerals:
100,200,300,400,500,600,700,800,900,1000: micro semiconductor structure
110,210,310,410,510,610,710,810,910,1010: substrate
120,220,320,420,520,620,720,820,920,1020: release layer
130,230,330,430,530,630,730,830,930,1030: protective layer
331,431,931,1031: first protective layer
332,432,932,1032: second protective layer
140,240,340,440,540,640,740,840,940,1040: micro semiconductor
532: first protective layer
542: insulating layer
250,350: easily removable layer
S100, S200: method for manufacturing micro semiconductor structure
S110, S210: substrate providing step
S120, S220: setting a dissociation layer
S130, S230: step of disposing protective layer
S240: step of disposing easily removable layer
S150, S250: micro semiconductor setting step
Dd, Dc, Dp: thickness of
L: light source
Detailed Description
Fig. 1 shows a schematic view of a micro-semiconductor structure 100 in a first embodiment in accordance with the present disclosure. As shown in fig. 1, the micro semiconductor structure 100 includes a substrate 110, a passivation layer 120, a passivation layer 130, and a micro semiconductor 140, wherein the passivation layer 120, the passivation layer 130, and the micro semiconductor 140 are sequentially disposed on the substrate 110.
In detail, in the first embodiment, the dissociation layer 120 is disposed on one side of the substrate 110 and above the substrate 110. The dissociation layer 120 is made of a photo-dissociation material, and can be dissociated by irradiation of a light source L (with a wavelength of about 240nm to 360nm) during the fabrication process of the micro semiconductor structure 100, so that the passivation layer 130 and the micro semiconductor 140 thereon can be separated from the substrate 110 and transferred to another target substrate (e.g., a wired substrate) for subsequent processes. The material of the release layer 120 may be an organic material, and includes an organic polymer material such as Polyimide (Polyimide), benzocyclobutene (benzocyclobutene), phenol resin (phenol formaldehyde resin), epoxy resin (epoxy resin), polyisoprene rubber (polyisoprene rubber), or a combination thereof, but the disclosure is not limited thereto.
Furthermore, the protection layer 130 is disposed on the dissociation layer 120, and the protection layer 130 and the dissociation layer 120 are located on the same side of the substrate 110, but the disclosure is not limited thereto. The transmittance of the protection layer 130 to the light source with a wavelength less than 360nm is less than 20% (i.e. between 0% and 20%), so that the protection layer 130 can prevent the micro-semiconductor 140 from being abnormal or damaged by the light source L during the photo-dissociation process. Here, the light source L is a laser light source.
Further, the young's modulus of the protective layer 130 may be greater than the young's modulus of the release layer 120. Therefore, the protection layer 130 can serve as a protection buffer layer, and can reduce the impact on the micro semiconductor 140 structure and the influence of the light source L on the micro semiconductor 140 during transfer.
In detail, the material of the protection layer 130 may be an inorganic material or a metal material, and may be a nitride, an oxide, a metal or an alloy. Further, the material of the passivation layer 130 may be silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof, and may also be aluminum, silver, gold, an alloy thereof, or an oxide thereof, but not limited thereto. Specifically, the protection layer 130 may be removed in a subsequent process according to requirements, and the removal process may be an etching process.
The micro semiconductor 140 is disposed on the protection layer 130, and the micro semiconductor 140 and the dissociation layer 120 are located on the same side of the substrate 110. In the first embodiment, the dissociation layer 120, the protection layer 130 and the micro-semiconductor 140 are all located on the same side of the substrate 110, but the disclosure is not limited thereto. In detail, the micro semiconductor 140 has a size of 100 μm or less, and may be a micro light emitting diode (micro light emitting diode), a micro laser diode (micro laser diode), or a micro photodiode (micro photodiode), however, the disclosure is not limited thereto. In another embodiment, the micro semiconductor 140 may also be a micro semiconductor 140 capable of controlling and executing a predetermined electronic function, such as a micro diode (micro diode), a micro transistor (micro transistor), a micro integrated circuit (micro integrated circuit), a micro sensor (micro sensor), but not limited thereto.
The thickness of the dissociation layer 120 is Dd, the thickness of the protection layer 130 is Dp, the thickness of the vertical substrate 110 is Dp, and the thickness of the vertical substrate 110 of the micro-semiconductor 140 is Dc, which satisfy the following conditions: 0.1< Dp/Dd, thereby preventing the protection layer 130 from being too small to cause insufficient protection. In addition, it can satisfy the following conditions: Dp/Dc <1, thereby avoiding the protective layer 130 from being too large to be removed later. Further, Dd may be between 500nm and 6000nm, Dp may be between 50nm and 500nm, and Dc may be between 4 microns and 10 microns. Therefore, the protection layer 130 can also protect the micro semiconductor 140 from being abnormal or damaged by the irradiation of the light source L during the laser dissociation process.
The wavelength absorptivity of the dissociation layer 120 to the light source L may be greater than that of the protection layer 130, and the material degradation rate of the dissociation layer 120 to the light source L may be greater than that of the protection layer 130 to the light source L. Therefore, the dissociation layer 120 may be removed before the protection layer 130 in the laser dissociation process, and the unabsorbed light may be blocked due to the small penetration rate of the protection layer 130, so that the protection layer 130 may better protect the micro semiconductor 140 from the abnormal or damaged light caused by the laser irradiation.
Fig. 2 shows a schematic view of a micro-semiconductor structure 200 in a second embodiment in accordance with the present disclosure. As shown in fig. 2, the micro semiconductor structure 200 includes a substrate 210, a release layer 220, a passivation layer 230, a micro semiconductor 240, and an easy-to-remove layer 250. The dissociation layer 220, the protection layer 230, the easy-to-remove layer 250, and the micro semiconductor 240 are sequentially disposed on the substrate 210.
In detail, in the second embodiment, the dissociation layer 220 is located on one side of the substrate 210 and is disposed above the substrate 210. The passivation layer 230 is disposed on the dissociation layer 220, and the passivation layer 230 and the dissociation layer 220 are located on the same side of the substrate 210. The micro semiconductor 240 is located on the same side of the passivation layer 230 as the dissociation layer 220, and the micro semiconductor 240 and the dissociation layer 220 are located on the same side of the substrate 210. The materials and dimensions of the dissociation layer 220, the protection layer 230 and the micro-semiconductor 240 may be the same as or similar to those of the first embodiment, and will not be described again in this and the following embodiments.
The easy-to-remove layer 250 is disposed between the passivation layer 230 and the micro semiconductor 240, and the easy-to-remove layer 250 and the dissociation layer 220 are located on the same side of the substrate 210. In the subsequent process, since the protection layer 230 needs to be removed, the easy-to-remove layer 250 is provided to facilitate the separation of the protection layer 230 and the micro semiconductor 240. In detail, the easy-to-remove layer 250 may be etched by an etching solution to remove the protection layer 230, and an etching rate of the etching solution to the easy-to-remove layer 250 is greater than an etching rate to the protection layer 230, but not limited thereto. Therefore, the protection layer 230 can be removed more easily in the subsequent manufacturing process. The material of the easy-to-remove layer 250 may be an organic material, including an organic polymer material such as Polyimide (Polyimide), benzocyclobutene (benzocyclobutene), phenol resin (phenol formaldehyde), epoxy resin (epoxy resin), polyisoprene rubber (polyisoprene), or a combination thereof. Furthermore, the material of the easy-to-remove layer 250 may be the same as the dissociation layer 220, which may reduce the complexity of the process, but the disclosure is not limited thereto.
Fig. 3 shows a schematic view of a micro-semiconductor structure 300 in a third embodiment in accordance with the present disclosure. As shown in fig. 3, the micro semiconductor structure 300 includes a substrate 310, a release layer 320, a passivation layer 330, a micro semiconductor 340, and an easy-to-remove layer 350. The dissociation layer 320, the protection layer 330, the easy-to-remove layer 350, and the micro-semiconductor 340 are located on the same side of the substrate 310.
In detail, in the third embodiment, the dissociation layer 320 is disposed on one side of the substrate 310. The passivation layer 330 is a patterned structure, and includes a first passivation layer 331 disposed on the dissociation layer 320 and located on the same side of the substrate 310 as the dissociation layer 320. The first protection layer 331 is also a patterned structure, wherein the patterned structure can be a discontinuous film structure, but not limited thereto. The easy-to-remove layer 350 is disposed between the first protection layer 331 and the micro semiconductor 340. The micro semiconductor 340 is disposed on the easy-to-remove layer 350, and the micro semiconductor 340 and the dissociation layer 320 are located on the same side of the substrate 310.
In detail, the first passivation layer 331 has a total area Apt, wherein the total area Apt is a sum of areas of the first passivation layer 331 projected onto the substrate 310; the dissociation layer 320 has an area Ad, which is the area of the dissociation layer 320 projected onto the substrate 310. The ratio Apt/Ad of the total area Apt of the first protection layer 331 to the area Ad of the dissociation layer 320 is greater than 0.5 and less than 1. The protection force of the micro semiconductor is not enough when the proportion is less than or equal to 0.5. Further, Apt/Ad may be greater than 0.5 and equal to or less than 0.8. Therefore, the first protection layer 331 can also effectively protect the micro semiconductor 340 from being abnormal or damaged due to the irradiation of the light source L during the laser dissociation process.
In the third embodiment, the passivation layer 330 may further include a second passivation layer 332, wherein the second passivation layer 332 is a patterned structure. The second protection layer 332 includes a metal material, which may be a metal, a metal alloy or a metal oxide, but the disclosure is not limited to the aforementioned materials. The first protection layer 331 may also be staggered with the second protection layer 332. In the third embodiment, the first protection layer 331 and the second protection layer 332 are located on the same side of the substrate 310, and a projected area of the first protection layer 331 on the substrate 310 partially overlaps with a projected area of the second protection layer 332 on the substrate 310, but the first protection layer 331 and the second protection layer 332 may not overlap with each other, which is not limited by the disclosure of the embodiment. Preferably, any position of the projection of the micro semiconductor 340 on the substrate 310 overlaps the projection of the first passivation layer 331 on the substrate 310, the projection of the second passivation layer 332 on the substrate 310, or one of them. Since the light source L is not likely to affect the second passivation layer 332 comprising a metal material, the second passivation layer 332 and the first passivation layer 331 are disposed in a staggered manner, so as to more effectively protect the micro semiconductor 340 from being damaged by the light source L. Specifically, the second protection layer 332 may be flush with the surface of the micro semiconductor 340 (not shown) or disposed under the micro semiconductor 340, and is not limited by the disclosure. In addition, the second passivation layer 332 can serve as an electrode of the micro semiconductor 340 and also has the function of protecting and electrically connecting the micro semiconductor 340, thereby increasing the process yield.
Fig. 4 shows a schematic view of a micro-semiconductor structure 400 in a fourth embodiment in accordance with the present disclosure. As shown in fig. 4, the micro semiconductor structure 400 includes a substrate 410, a dissociation layer 420, a protection layer 430, and a micro semiconductor 440, and the substrate 410, the dissociation layer 420, and the micro semiconductor 440 are sequentially arranged.
In detail, in the fourth embodiment, the dissociation layer 420 is disposed on one side of the substrate 410. The passivation layer 430 is a patterned structure and includes a first passivation layer 431 disposed on the other side of the substrate 410; that is, the first protection layer 431 and the dissociation layer 420 are located on different sides of the substrate 410. The micro semiconductor 440 is disposed on the dissociation layer 420, and is located on the same side of the substrate 410 as the dissociation layer 420.
In detail, the first passivation layer 431 has a total area Apt, wherein the total area Apt is a sum of areas of the first passivation layer 431 projected onto the substrate 410; the dissociation layer 420 has an area Ad, which is the area of the dissociation layer 420 projected onto the substrate 410. The ratio Apt/Ad of the total area Apt of the first passivation layer 431 to the area Ad of the dissociation layer 420 is between 0.5 and 1. Further, Apt/Ad may be greater than 0.5 and equal to or less than 0.8. Therefore, the first protection layer 431 can also protect the micro semiconductor 440 from being irradiated by the light source L to cause abnormality or damage in the laser dissociation process.
In the fourth embodiment, the protection layer 430 may further include a second protection layer 432, and the second protection layer 432 is a patterned structure. The second protection layer 432 includes a metal material, which may be a metal, a metal alloy, or a metal oxide. The first protective layers 431 may be staggered with the second protective layers 432. In detail, an area of the first passivation layer 431 on the substrate 410 is partially overlapped with a projected area of the second passivation layer 432 on the substrate 410. It should be noted that the overlapping area of the first protection layer 431 and the projected area of the second protection layer 432 on the substrate 410 is less than 10% of the area of the second protection layer 432 facing the substrate 410. Therefore, in the laser dissociation step, enough dissociation layer 420 can be dissociated by irradiation of the light source L, so that the micro semiconductor 440 is smoothly separated from the substrate 410, and on the premise of not configuring the protection layer 430 with a large area, the effect of effectively protecting the micro semiconductor 440 from the light source L can be achieved, the use of excessive protection layer 430 materials is reduced, and the manufacturing cost is reduced. Preferably, any position of the projection of the micro semiconductor 440 on the substrate 410 overlaps with the projection of the first passivation layer 431 on the substrate 410, the projection of the second passivation layer 432 on the substrate 410, or one of them. The first protection layer 431 and the second protection layer 432 may be disposed on two sides of the substrate 410, respectively. Thereby, the micro semiconductor 440 itself can be more effectively protected from being damaged by the light source L. Specifically, the second protection layer 432 may be flush with the surface of the micro semiconductor 440 (not shown) or disposed under the micro semiconductor 440. In addition, the second protection layer 432 can be used as an electrode of the micro semiconductor 440, and has the functions of protecting and electrically connecting the micro semiconductor 440, thereby increasing the process yield.
Fig. 5 shows a schematic view of a micro semiconductor structure 500 in a fifth embodiment in accordance with the present disclosure. As shown in fig. 5, the micro semiconductor structure 500 includes a substrate 510, a passivation layer 520, a passivation layer 530 and a micro semiconductor 540, wherein the passivation layer 520, the passivation layer 530 and the micro semiconductor 540 are sequentially disposed on the substrate 510.
In detail, the dissociation layer 520 is disposed on one side of the substrate 510. The passivation layer 530 is disposed on the dissociation layer 520 and is located on the same side of the substrate 510 as the dissociation layer 520. The micro semiconductor 540 is disposed on the protection layer 530 and located on the same side of the substrate 510 as the dissociation layer 520. The passivation layer 530 is a patterned structure and includes a first passivation layer 532.
In the fifth embodiment, the micro semiconductor 540 may further include an insulating layer 542, wherein the insulating layer 542 is disposed on the surface of the micro semiconductor 540 facing the substrate 510 and disposed between the first protection layers 532; specifically, the insulating layer 542 is located between the protective layer 530 and the micro semiconductor 540. Since the passivation layer may be a discontinuous structure, there is still a chance that the micro-semiconductor 540 will be affected by part of the laser light. By providing the insulating layer 542, the micro-semiconductor 540 can be more fully protected from being irradiated by the light source L to cause an abnormality or damage. Preferably, any position of the projection of the micro semiconductor 540 on the substrate 510 overlaps the projection of the insulating layer 542 or the first protection layer 532 on the substrate 510. In detail, the transmittance of the insulating layer 542 for the light source with a wavelength less than 360nm is less than 20%, which can further prevent the micro-semiconductor 540 from being affected by the light source L in the laser dissociation process. The first protection layer 532 may be flush with the surface of the micro semiconductor 540 (not shown) or disposed under the micro semiconductor 540. In addition, the first protection layer 532 can be used as an electrode of the micro semiconductor 540, and has the functions of protecting and electrically connecting the micro semiconductor 540, thereby increasing the process yield.
Fig. 6 shows a schematic view of a micro semiconductor structure 600 in a sixth embodiment according to the present disclosure. As shown in fig. 6, the micro semiconductor structure 600 includes a substrate 610, a passivation layer 620, a protection layer 630 and a micro semiconductor 640, wherein the passivation layer 620, the protection layer 630 and the micro semiconductor 640 are sequentially disposed on the substrate 610.
In detail, the dissociation layer 620 is disposed on one side of the substrate 610. The protection layer 630 is disposed on the dissociation layer 620, and is located on the same side of the substrate 610 as the dissociation layer 620. The micro semiconductor 640 is disposed on the protection layer 630 and located on the same side of the substrate 610 as the dissociation layer 620.
In fig. 6, the micro-semiconductor 640 has a projected area Ac on the substrate 610; the passivation layer 630 has a projected area Ap on the substrate 610; the dissociation layer 620 has a projected area Ad 'on the substrate 610, wherein the projected area Ac of the micro semiconductor 640 on the substrate 610 and the projected area Ap of the protection layer 630 on the substrate 610 are larger than the projected area Ad' of the dissociation layer 620 on the substrate 610. In addition, it can satisfy the following conditions: 0.5< Ad'/Ac <0.8, too small a ratio may reduce yield when transferring the micro semiconductor structure 600. Therefore, the usage amount of the dissociation layer 620 can be reduced to reduce the production cost on the premise of not affecting the process and the quality of the micro semiconductor structure 600.
Fig. 7 shows a schematic view of a micro semiconductor structure 700 in a seventh embodiment according to the present disclosure. As shown in fig. 7, the micro semiconductor structure 700 includes a substrate 710, a dissociation layer 720, a protection layer 730, and a micro semiconductor 740, wherein the dissociation layer 720, the protection layer 730, and the micro semiconductor 740 are sequentially disposed on the substrate 710.
In detail, the passivation layer 730 and the dissociation layer 720 are patterned, the dissociation layer 720 is correspondingly disposed under the passivation layer 730, and a projected area of the passivation layer 730 on the substrate 710 is larger than a projected area of the dissociation layer 720 parallel to the substrate 710. Since the light source L only needs to irradiate the dissociation layer 720 in the laser dissociation process, and the irradiation range of the light source L can be controlled within the area range of the protection layer 730 projected on the substrate 710 in cooperation with the above features, the micro semiconductor 740 can be effectively protected without affecting the dissociation effect of the dissociation layer 720. Specifically, the protection layer 730 may be flush with the surface of the micro semiconductor 740 (not shown) or disposed below the micro semiconductor 740. In addition, the passivation layer 730 may comprise a metal material and may serve as an electrode of the micro semiconductor 740; that is, the electrode of the micro semiconductor 740 may have the characteristics of the protective layer 730. Thus, the complexity of the micro semiconductor structure 700 can be simplified, thereby reducing the number of manufacturing processes and cost.
Fig. 8 shows a schematic view of a micro semiconductor structure 800 in an eighth embodiment in accordance with the present disclosure. As shown in fig. 8, the micro semiconductor structure 800 includes a substrate 810, a dissociation layer 820, a protection layer 830, and a micro semiconductor 840, wherein the substrate 810, the dissociation layer 820, the protection layer 830, and the micro semiconductor 840 are sequentially arranged. In addition, the protection layer 830 may be flush with the surface of the micro semiconductor 840 (not shown) or disposed below the micro semiconductor 840.
In detail, the cross-sectional area of the dissociation layer 820 perpendicular to the substrate 810 is gradually reduced from the micro semiconductor 840 toward the substrate 810. In other words, the width of the dissociation layer 820 in the direction parallel to the substrate 810 gradually decreases from the connection point of the dissociation layer 820 and the micro-semiconductor 840 to the substrate 810. The center of illumination of the light source L may be focused on where the dissociation layer 820 is connected to the substrate 810. Taking laser light as an example, the laser light has a characteristic of strong irradiation center energy, and can perform laser dissociation on the dissociation layer 820 at the connection portion between the dissociation layer 820 and the substrate 810. Therefore, in the dissociation process, only a small amount of dissociation layers 820 at the connection positions of the dissociation layers 820 and the substrate 810 can be dissociated, and the production time and the cost can be further reduced. However, the dissociation layer 820 is only used for illustrating the eighth embodiment, and the invention is not limited to the above example for the kind of the light source L or the specific configuration of the dissociation layer 820.
Fig. 9 shows a schematic diagram of a micro semiconductor structure 900 in a ninth embodiment according to the present disclosure. As shown in fig. 9, the micro semiconductor structure 900 includes a substrate 910, a passivation layer 920, a protection layer 930, and a micro semiconductor 940, wherein the passivation layer 920, the protection layer 930, and the micro semiconductor 940 are located on the same side of the substrate 910.
The passivation layer 930 includes a first passivation layer 931 and a second passivation layer 932. The first passivation layer 931 and the second passivation layer 932 are patterned and located on the same side of the substrate 910, and the second passivation layer 932 and the first passivation layer 931 are disposed in an interlaced manner. That is, the projected area of the first passivation layer 931 on the substrate 910 partially overlaps the projected area of the second passivation layer 932 on the substrate 910. Furthermore, the dissociation layer 920 is correspondingly disposed under the first protection layer 931, and the dissociation layer 920 is disposed between the substrate 910 and the micro semiconductor 940. Therefore, the first protective layer 931 and the second protective layer 932 are disposed, so as to completely protect the micro semiconductor 940 from being irradiated by the light source L to cause abnormality or damage. The first protection layer 931 may be flush with the surface of the micro semiconductor 940 (not shown) or disposed under the micro semiconductor 940. Furthermore, the first protection layer 931 may be a plurality of electrodes of the micro semiconductor 940.
In addition, the projected area of the first passivation layer 931 onto the substrate 910 is larger than the projected area of the dissociation layer 920 onto the substrate 910. Therefore, in the laser dissociation process, the first protection layer 931 can effectively protect the micro semiconductor 940 from the light source L, and the light source L can be more completely blocked from entering the micro semiconductor 940 by the arrangement of the second protection layer 932.
Fig. 10 shows a schematic view of a micro-semiconductor structure 1000 in a tenth embodiment in accordance with the present disclosure. As shown in fig. 10, the micro semiconductor structure 1000 includes a substrate 1010, a dissociation layer 1020, a protection layer 1030, and a micro semiconductor 1040, wherein the dissociation layer 1020 and the micro semiconductor 1040 are located on the same side of the substrate 1010.
The protective layer 1030 includes a patterned first protective layer 1031 and a patterned second protective layer 1032. The first protection layer 1031, the dissociation layer 1020 and the micro semiconductor 1040 are located on the same side of the substrate 1010. The second protective layer 1032 is located on the other side of the substrate 1010, and the second protective layer 1032 is disposed in a staggered manner with the first protective layer 1031. Therefore, the coverage of the protection layer 1030 is increased, and the micro semiconductor 1040 can be effectively protected from being abnormal or damaged due to the irradiation of the light source L. The first protection layer 1031 may be flush with the surface of the micro semiconductor 1040 (not shown) or disposed below the micro semiconductor 1040. Further, the first protection layer 1031 may be a plurality of electrodes of the micro semiconductor 1040.
In addition, a projected area of the first protection layer 1031 on the substrate 1010 is larger than a projected area of the dissociation layer 1020 on the substrate 1010. Therefore, in the laser dissociation process, the first protection layer 1031 can effectively protect the micro semiconductor 1040 from the light source L, and the light source L can be more completely blocked from entering the micro semiconductor 1040 by the arrangement of the second protection layer 1032.
Fig. 11 shows a flow chart of steps of a method S100 for fabricating a micro-semiconductor structure according to an eleventh embodiment of the present disclosure. As shown in fig. 11, the method S100 for fabricating a micro semiconductor structure includes a substrate providing step S110, a dissociation layer disposing step S120, a protection layer disposing step S130, and a micro semiconductor disposing step S150. For clarity and complete description, the eleventh embodiment will be discussed with reference to the structure, elements and symbols of the micro semiconductor structure 700 of the seventh embodiment in fig. 7, but the micro semiconductor structure manufactured by the eleventh embodiment is not limited thereto. The substrate providing step S110 provides a substrate 710; the delamination layer disposing step S120 disposes a delamination layer 720 on one side of the substrate 710; the protective layer disposing step S130 disposes a protective layer 730 on at least one side of the substrate 710; the micro semiconductor disposing step S150 disposes a micro semiconductor 740 on the same side of the substrate 710 as the dissociation layer 720, wherein the protective layer 730 has a transmittance of less than 20% for light with a wavelength of less than 360 nm. Therefore, the micro semiconductor structure 700 provided by the method S100 for manufacturing a micro semiconductor structure includes the protection layer 730, which can protect the micro semiconductor 740 from being irradiated by the light source L to cause abnormality or damage in the laser dissociation process.
It should be noted that, in the eleventh embodiment, the material, material characteristics, and dimensions of the elements provided in each step may be any one of the foregoing embodiments, and are adjusted according to the process requirements, which are not described herein again.
In addition, as can be seen from fig. 7 and 11, the protection layer 730 is disposed corresponding to the dissociation layer 720, and a projected area of the protection layer 730 on the substrate 710 is larger than a projected area of the dissociation layer 720 on the substrate 710. When the dissociation layer 720 is dissociated by the light source L, the light source L and the protection layer 730 are disposed on two sides of the dissociation layer 720, wherein the wavelength of the laser light source is 240nm to 360 nm. Therefore, the micro semiconductor 740 can be effectively protected without affecting the dissociation effect of the dissociation layer 720.
Fig. 12 shows a flow chart of steps of a method S200 for fabricating a micro-semiconductor structure according to a twelfth embodiment of the disclosure. As shown in fig. 12, the method S200 for fabricating a micro semiconductor structure includes a substrate providing step S210, a dissociation layer disposing step S220, a protection layer disposing step S230, an easy-removal layer disposing step S240, and a micro semiconductor disposing step S250. For clarity and complete description, the twelfth embodiment will be discussed with reference to the structure, elements and symbols of the micro semiconductor structure 200 of the second embodiment in fig. 2, but the micro semiconductor structure manufactured by the twelfth embodiment is not limited thereto. A substrate providing step S210 of providing a substrate 210; the delamination layer disposing step S220 disposes a delamination layer 220 on one side of the substrate 210; the passivation layer setting step S230 sets a passivation layer 230 on at least one side of the substrate 210; the easy-to-remove layer disposing step S240 disposes an easy-to-remove layer 250 on the protection layer 230; the micro semiconductor disposing step S250 disposes a micro semiconductor 240 on the same one of the two sides of the substrate 210 as the dissociation layer 220, wherein the easy-removal layer 250 is disposed between the micro semiconductor 240 and the protection layer 230. Therefore, the protection layer 230 can be removed more easily in the subsequent manufacturing process. Specifically, the passivation layer 230 may be patterned by photolithography and other processes, and may include a plurality of passivation layers, such as the first passivation layer 331 and the second passivation layer 332 of the micro semiconductor structure 300 in the third embodiment of fig. 3, which may be adjusted according to process requirements and are not described herein.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (17)

1. A micro semiconductor structure, comprising:
a substrate;
a release layer located on one side of the substrate;
a protective layer located on at least one side of the substrate; and
a micro semiconductor on the side of the substrate;
wherein, the penetration rate of the protective layer to a light source with the wavelength less than 360nm is less than 20%.
2. The structure of claim 1, wherein the protective layer has a Young's modulus greater than a Young's modulus of the release layer.
3. The structure of claim 1, wherein the dissociation layer, the protection layer and the micro semiconductor are disposed on the side of the substrate, the dissociation layer is disposed on the substrate, the protection layer is disposed on the dissociation layer, and the micro semiconductor is disposed on the protection layer.
4. The micro-semiconductor structure of claim 3, further comprising:
an easy-to-remove layer disposed between the protection layer and the micro semiconductor.
5. The structure of claim 4, wherein the easy-removal layer and the dissociation layer are both organic and the passivation layer is inorganic.
6. The structure of claim 1, wherein the passivation layer is a patterned structure.
7. The structure of claim 6, wherein a ratio of an area of the passivation layer projected onto the substrate to an area of the dissociation layer projected onto the substrate is between 0.5 and 1.
8. The structure of claim 6, wherein the dissociation layer is disposed under the protection layer, and a projected area of the protection layer on the substrate is greater than or equal to a projected area of the dissociation layer on the substrate.
9. The microelectronic structure of claim 8, wherein said protective layer comprises a metallic material.
10. The structure of claim 1, wherein the passivation layer comprises a first passivation layer and a second passivation layer, and the second passivation layer is disposed in an alternating manner with respect to the first passivation layer.
11. The structure of claim 10, wherein any position of the projection of the micro-semiconductor on the substrate overlaps with the projection of the first passivation layer or the second passivation layer on the substrate.
12. The structure of claim 1, wherein a cross-sectional area of the dissociation layer perpendicular to the substrate tapers toward the substrate.
13. The microelectronic structure of claim 1, wherein said microelectronic further comprises an insulating layer between said microelectronic and said passivation layer.
14. The structure of claim 1, wherein a projected area of the micro semiconductor or the passivation layer on the substrate is larger than a projected area of the dissociation layer on the substrate.
15. A method of fabricating a micro semiconductor structure, comprising:
a substrate providing step of providing a substrate;
a dissociation layer setting step of setting a dissociation layer on one side of the substrate;
a protective layer setting step of setting a protective layer on at least one side of the substrate; and
a micro semiconductor setting step of setting a micro semiconductor on the side of the substrate;
wherein, the penetration rate of the protective layer to a light source with the wavelength less than 360nm is less than 20%.
16. The method of fabricating a microelectronic structure according to claim 15, further comprising:
an easy-to-remove layer setting step of setting an easy-to-remove layer between the micro semiconductor and the protection layer.
17. The method as claimed in claim 15, wherein the light source and the passivation layer are disposed on two sides of the dissociation layer respectively when the dissociation layer is dissociated by the light source.
CN202010894052.3A 2020-08-31 2020-08-31 Micro semiconductor structure and manufacturing method thereof Pending CN111969004A (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794848A (en) * 2009-01-29 2010-08-04 索尼公司 The method of the method for transfer device and manufacturing display device
US20140038392A1 (en) * 2012-02-26 2014-02-06 Solexel, Inc. Systems and methods for laser splitting and device layer transfer
CN106410027A (en) * 2013-09-24 2017-02-15 京东方科技集团股份有限公司 Flexible display substrate, fabrication method thereof and flexible display device
CN106486569A (en) * 2015-08-27 2017-03-08 美科米尚技术有限公司 Transitional light emitting diode and the method for manufacture light emitting diode
US20180204973A1 (en) * 2016-03-23 2018-07-19 Korea Photonics Technology Institute Light-emitting diode structure, transfer assembly, and transfer method using the same
US20190013297A1 (en) * 2017-07-05 2019-01-10 PlayNitride Inc. Display panel
CN109244111A (en) * 2018-08-31 2019-01-18 武汉华星光电半导体显示技术有限公司 OLED display panel and preparation method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794848A (en) * 2009-01-29 2010-08-04 索尼公司 The method of the method for transfer device and manufacturing display device
US20140038392A1 (en) * 2012-02-26 2014-02-06 Solexel, Inc. Systems and methods for laser splitting and device layer transfer
CN106410027A (en) * 2013-09-24 2017-02-15 京东方科技集团股份有限公司 Flexible display substrate, fabrication method thereof and flexible display device
CN106486569A (en) * 2015-08-27 2017-03-08 美科米尚技术有限公司 Transitional light emitting diode and the method for manufacture light emitting diode
US20180204973A1 (en) * 2016-03-23 2018-07-19 Korea Photonics Technology Institute Light-emitting diode structure, transfer assembly, and transfer method using the same
US20190013297A1 (en) * 2017-07-05 2019-01-10 PlayNitride Inc. Display panel
CN109244111A (en) * 2018-08-31 2019-01-18 武汉华星光电半导体显示技术有限公司 OLED display panel and preparation method thereof

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