CN111949600A - Method and device for applying thousand-gear market quotation based on programmable device - Google Patents
Method and device for applying thousand-gear market quotation based on programmable device Download PDFInfo
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Abstract
The invention discloses a method and a device suitable for thousand-gear quotation based on a programmable device.A FPGA implementation framework is designed in an FPGA acceleration board F37X, the FPGA implementation framework comprises a read-write control unit, a cache structure and a DDR/HBM, the read-write control unit carries out read-write one-by-one entrusting, the DDR/HBM is used for storing all the entrusting information one by one, two paths of parallel readable-write caches with configurable depth are adopted in the cache structure, the two paths of parallel read-write caches respectively deal with random one-by-one entrusting reading inside and outside a read-write window, and when one-by-one transaction information arrives, the two paths of parallel read-write caches inquire an entrusting price according. By the method, the message record number query hit rate can be improved, entrusted price reading delay is reduced, and the processing performance of the whole system is improved.
Description
Technical Field
The invention relates to the field of financial markets, in particular to a method and a device suitable for thousand-gear market quotations based on a programmable device.
Background
The thousand-gear market quotation of deep posts has become one of Level-2 market quotation core functions, and is realized by software traditionally, but with the vigorous development of the financial market in China at present, the traditional software technology or software and hardware acceleration technology taking software as the core is difficult to meet the current real-time response requirement, and the software and hardware cooperative acceleration technology taking FPGA as the core is an effective way for solving the problem.
The deep crossing place Level-2 market comprises two types of data of one-by-one entrusting and one-by-one bargaining, so that a receiver can automatically reconstruct the market by utilizing the one-by-one data and the trading rule. The current mainstream scheme is still software reconstruction, the main problems are that the disk port information is stored by using a data structure such as a linked list, a balance tree and a hash table, the processing capacity is far from meeting the real-time data requirement of the current market, in addition, due to the randomness of transaction by transaction, the cache hit rate is sharply reduced during the consignment search by transaction, hash search and other modes have to be used, but the problems caused by the hash collision and the huge delay of memory reading cannot meet the extremely low delay requirement in the field of financial acceleration.
Disclosure of Invention
The invention mainly solves the technical problem of providing a method and a device suitable for thousand-gear quotation based on a programmable device, which can simplify the design and greatly improve the cache hit rate of one-by-one consignment search.
In order to solve the technical problems, the invention adopts a technical scheme that: a method for adapting to thousand-gear market quotation based on a programmable device comprises the following steps: firstly, a read-write control unit carries out read-write entrustment one by one; secondly, when transaction information arrives one by one, two paths of parallel read-write caches with configurable depth respectively deal with random one by one entrusted reading inside and outside a read-write window; and thirdly, the depth-configurable two-way parallel read-write cache inquires the entrusted price according to the message record number.
Further, the two parallel read-write caches with the configurable depth comprise a read-write cache which adopts two read-write caches, the read caches are a first cache and a second cache respectively, and write data are directly written into the first cache and a memory.
Further, the first cache is used for reading and writing successive entrusts in the window, the size of the successive entrusts is configurable, the first cache is covered circularly after being fully written, the first cache stores HPR/LPR two pointer information, and the pointer information comprises a maximum effective value, a minimum effective value and an initial address of the successive entrusts and is used as a basis for whether cache hit exists or not.
Further, the criterion for determining whether the cache is hit includes that if all the pieces of successive delegation information stored in the memory include the pointer information, the first cache is considered to have cache hit.
Further, the second cache is used as a read cache, the second cache reads discrete random message record numbers outside a read-write window, the depth of the second cache is configurable, and effective signals are stored in the second cache and used as a basis for judging whether cache hit occurs or not.
Further, the step of determining whether the cache is hit includes determining that the second cache is hit if the discrete random message record number includes an effective signal.
Further, if neither the first cache nor the second cache has cache hit, the data is directly fetched from the memory, and then the data is written into the second cache and is simultaneously output.
Further, the cache hit is that the central processing unit searches data in the first cache and the second cache, and if the requested data is found in the first cache and the second cache, the cache hit is regarded as the cache hit.
An apparatus for thousand-gear market conditions based on programmable device, comprising: the system comprises a read-write control unit, a cache structure and a memory, wherein the read-write control unit carries out read-write entrusting one by one, the memory is used for storing all entrusting information one by one, two paths of parallel read-write caches with configurable depth are adopted in the cache structure, the two paths of parallel read-write caches respectively deal with random entrusting reading inside and outside a read-write window, and when transaction information one by one arrives, the two paths of parallel read-write caches inquire entrusting prices according to message record numbers.
Further, the cache structure comprises a first cache, a second cache and a central control unit; the first cache is realized by a static random access memory; the second cache adopts a direct-mapped cache.
The invention has the beneficial effects that: the method adopts two paths of parallel read _ caches with configurable depth to respectively deal with random one-by-one entrusted reading inside and outside a reading and writing window, greatly improves the query hit rate of ApplSeqNum, reduces the price reading delay and improves the processing performance of the whole system.
Drawings
FIG. 1 is a diagram of a deep-sea entrusted market quotation format for a method for thousand-gear market quotation based on a programmable device according to the present invention;
FIG. 2 is a diagram of a data format of a successive delegation of a method for a thousand-gear market situation based on a programmable device according to the present invention;
FIG. 3 is a flow chart of a preferred embodiment of a method for adapting to a thousand-gear market condition based on a programmable device according to the present invention;
FIG. 4 is a schematic diagram of a method cache1 for thousand-gear market conditions based on a programmable device according to the present invention;
FIG. 5 is a cache0 mapping diagram of a method applicable to thousand-gear market conditions based on a programmable device according to the present invention;
FIG. 6 is a mapping chart of ApplSeqNum as an address cache0 for a method for applying thousand-gear quotation based on a programmable device
Fig. 7 is a diagram of a device architecture based on a programmable device suitable for thousand-gear market conditions.
Detailed Description
The following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings, will make the advantages and features of the invention easier to understand by those skilled in the art, and thus will clearly and clearly define the scope of the invention.
Referring to fig. 1 to 7, an embodiment of the present invention includes:
a method for adapting to thousand-gear market quotation based on a programmable device comprises the following steps: an FPGA implementation architecture is designed in an FPGA acceleration board F37X, the FPGA implementation architecture comprises a read-write control unit, a cache structure and a DDR/HBM, the read-write control unit carries out read-write one-by-one delegation, the DDR/HBM is used for storing all one-by-one delegation information, two paths of parallel read-write caches with configurable depth are adopted in the cache structure, the two paths of parallel read-write caches respectively deal with random one-by-one delegation reading inside and outside a read-write window, and when one-by-one transaction information arrives, the two paths of parallel read-write caches inquire a delegation price according to ApplSeqNum.
The FPGA acceleration board F37X is based on the latest VU37P series of Xilinx, and has the characteristics of high performance, high density and high bandwidth. The method adopts onboard memory particles, maximally supports three-channel 24G memory, supports 2 100Gb optical ports, supports 460GB/s ultrahigh data bandwidth, is suitable for various application scenes such as financial acceleration and the like, and realizes calculation acceleration of high performance, high bandwidth, low delay and low power consumption.
Referring to fig. 1 and fig. 2, the deep traffic place-by-place consignation quotation format is that for each piece of consignation information, we only need to store the consignation price and use ApplSeqNum as the address. When the transaction information comes one by one, the entrusting price needs to be inquired according to ApplSeqNum so as to update the thousand-file quotation.
Referring to fig. 3, the depth can be configured with two parallel read _ cache mechanisms, the read cache is respectively cache0 and cache1, and the write data is directly written into cache1 and DDR. The cache1 is used for dealing with data reading and writing in a current writing window, the size of the reading and writing window is configurable, the current default size of the reading and writing window is 16384, the reading and writing window is covered circularly after being fully written, two pointer information of HPR/LPR are stored in the cache1, and the pointer information comprises an ApplSeqNum maximum effective value, a minimum effective value and a start address and is used as a criterion for judging whether hit exists.
Referring to fig. 5 and 6, the cache0 is used as a read cache to cope with an ApplSeqNum which is discrete and random outside a read-write window, the depth of the cache0 is configurable, the current default depth is 8192, the ApplSeqNum adopts a low 13bit as an address and a high 22bit as a tag, and a 1bit effective signal is added to the tag, and the tag is stored in the cache0 to be used as a basis for judging whether hit occurs.
The method is implemented by the cache1, when the entrusting comes in the window, the entrusting data is written into the cache1, the cache1 uses ApplSeqNum as a query address, the cache1 stores all entrusting information on an FPGA onboard DDR/HBM for query, if the entrusting information is queried, it is judged that there is a hit in the cache1, and the cache1 outputs the entrusting information in the read-write window.
The method is characterized in that discrete successive delegation outside a read-write window is handled, the delegation is achieved through a cache0, the cache0 is used for reading the cache, when the discrete successive delegation outside the window comes, the cache0 conducts the discrete successive delegation outside the read window, the data type of the data price is int64, namely 64bit, the data bit width is designed in the cache0 according to the data price, the data bit width is also int64, the data price is also 64bit, when the discrete successive delegation outside the window is stored in the cache0, an effective signal is added, if the effective signal is inquired in the cache0, it is considered that hit exists in the cache0, the successive delegation is the discrete successive delegation, and the cache0 directly outputs the discrete successive delegation information.
If neither cache0 nor cache1 has hit, the DDR is directly taken to fetch the entrusting information one by one, and then the entrusting information one by one is written into the cache1 and simultaneously output.
The FPGA is called a Field Programmable Gate Array (FPGA); DDR is called Double Data Rate memory as Double Rate memory; the HBM is called high-bandwidth memory completely; cache is a Cache memory; ApplSeqNum is a specific message record number; sram is called Static Random-Access Memory (SRAM) completely; hit is a cache hit, meaning that when an application or software requests data, a cache hit will occur first; firstly, the central processing unit searches data in the nearest memory position, usually a main cache; if the requested data is found in the cache, it is treated as a cache hit.
Referring to fig. 7, an implementation architecture of an FPGA is designed, and is a data stream driven architecture, and mainly includes a read-write control unit, a cache structure, and a DDR, where the read-write control unit and the cache structure generally adopt a pipeline processing, that is, after processing is completed, data is packed and sent to the next stage of processing. The exchange of data needs to be implemented internally to the architecture.
Based on the same inventive concept as the method for adapting to the thousand-gear market quotation based on the programmable device in the previous embodiment, an embodiment of the present specification further provides a device for adapting to the thousand-gear market quotation based on the programmable device, including: the device comprises a read-write control unit, a cache structure and a memory, wherein the read-write control unit carries out read-write one-by-one delegation, the memory is used for storing all one-by-one delegation information, and the cache structure comprises a first cache, a second cache and a central control unit; the first cache is realized by a static random access memory; the second cache adopts a direct mapping cache; two parallel read-write caches with configurable depth are adopted in the cache structure, the two parallel read-write caches respectively deal with random one-by-one entrusted reading inside and outside a read-write window, and when one-by-one transaction information arrives, the two parallel read-write caches inquire entrusted prices according to message record numbers.
In summary, according to the characteristics of financial data, a method and a device suitable for thousand-gear quotation based on a programmable device are designed, two paths of parallel read _ caches with configurable depth are adopted, random one-by-one entrusted reading inside and outside a reading and writing window is respectively responded, the method greatly improves the query hit rate of ApplSeqNum, reduces the price reading delay and improves the processing performance of the whole system.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for adapting to thousand-gear market conditions based on a programmable device is characterized by comprising the following steps: firstly, a read-write control unit carries out read-write entrustment one by one; secondly, when transaction information arrives one by one, two paths of parallel read-write caches with configurable depth respectively deal with random one by one entrusted reading inside and outside a read-write window; and thirdly, the depth-configurable two-way parallel read-write cache inquires the entrusted price according to the message record number.
2. The method for adapting to the thousand-gear market conditions based on the programmable device as claimed in claim 1, wherein: the depth-configurable two-way parallel read-write cache comprises a read-write cache which adopts two ways of read-write caches, the read caches are a first cache and a second cache respectively, and write data are directly written into the first cache and a memory.
3. The method for adapting to the thousand-gear market conditions based on the programmable device as claimed in claim 2, wherein: the first cache is used for reading and writing a successive delegation in a window, the size of the successive delegation window is configurable, the first cache is covered circularly after being fully written, two pointer information of HPR/LPR are stored in the first cache, and the pointer information comprises a maximum effective value, a minimum effective value and an initial address of the successive delegation and is used as a basis for whether cache hit exists or not.
4. The method for adapting to thousand-gear market conditions based on the programmable device as claimed in claim 3, wherein: the basis for whether the cache is hit or not comprises that if all the successive delegation information stored in the memory contains the pointer information, the first cache is considered to have cache hit.
5. The method for adapting to the thousand-gear market conditions based on the programmable device as claimed in claim 2, wherein: the second cache is used as a read cache, the second cache reads discrete random message record numbers outside a read-write window, the depth of the second cache is configurable, and effective signals are stored in the second cache and used as a basis for judging whether cache hit occurs or not.
6. The method for adapting to thousand-gear market conditions based on the programmable device according to claim 5, wherein: the basis for judging whether the cache is hit comprises judging that the second cache is hit if the discrete random message record number contains an effective signal.
7. The method for adapting to the thousand-gear market according to the claim 3 or 5, wherein: and if the first cache and the second cache are not in cache hit, directly accessing the data from the memory, and then writing the data into the second cache and outputting the data at the same time.
8. The method for adapting to thousand-gear market conditions based on the programmable device according to claim 8, wherein: the cache hit is the data searched by the central processing unit in the first cache and the second cache, and if the requested data is found in the first cache and the second cache, the cache hit is regarded as the cache hit.
9. An apparatus for thousand-gear market conditions based on a programmable device, comprising: the system comprises a read-write control unit, a cache structure and a memory, wherein the read-write control unit carries out read-write entrusting one by one, the memory is used for storing all entrusting information one by one, two paths of parallel read-write caches with configurable depth are adopted in the cache structure, the two paths of parallel read-write caches respectively deal with random entrusting reading inside and outside a read-write window, and when transaction information one by one arrives, the two paths of parallel read-write caches inquire entrusting prices according to message record numbers.
10. The device for thousand-gear market conditions based on the programmable device as claimed in claim 9, wherein: the cache structure comprises a first cache, a second cache and a central control unit; the first cache is realized by a static random access memory; the second cache adopts a direct-mapped cache.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114328348A (en) * | 2021-12-17 | 2022-04-12 | 广东浪潮智慧计算技术有限公司 | FPGA acceleration board card and market data processing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102567256A (en) * | 2011-12-16 | 2012-07-11 | 龙芯中科技术有限公司 | Processor system, as well as multi-channel memory copying DMA accelerator and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102567256A (en) * | 2011-12-16 | 2012-07-11 | 龙芯中科技术有限公司 | Processor system, as well as multi-channel memory copying DMA accelerator and method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114328348A (en) * | 2021-12-17 | 2022-04-12 | 广东浪潮智慧计算技术有限公司 | FPGA acceleration board card and market data processing method thereof |
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