CN111949460A - Method and device for testing D3-supported characteristic of solid state disk, computer equipment and storage medium - Google Patents
Method and device for testing D3-supported characteristic of solid state disk, computer equipment and storage medium Download PDFInfo
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- CN111949460A CN111949460A CN202010807391.3A CN202010807391A CN111949460A CN 111949460 A CN111949460 A CN 111949460A CN 202010807391 A CN202010807391 A CN 202010807391A CN 111949460 A CN111949460 A CN 111949460A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3268—Power saving in hard disk drive
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2284—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]
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Abstract
The invention relates to a method, a device, computer equipment and a storage medium for testing the characteristic that a solid state disk supports D3, wherein the method comprises the following steps: disabling an automatic power supply switching function of the device to be tested so as to enable a solid state disk of the device to be tested to keep a normal power supply state; sending a power state switching command to the device to be tested, and controlling the solid state disk to enter a D3 low power consumption state; and acquiring a power state value returned by the solid state disk, and determining the current power state of the solid state disk according to the power state value. According to the invention, the test host disables the automatic power supply switching function of the device to be tested, and sends the power supply state switching command to the device to be tested, the solid state disk is controlled to enter the D3 low power consumption state, finally, the power supply state value returned by the solid state disk is obtained, and the current power supply state of the solid state disk is determined according to the power supply state value, so that the whole test process does not need to access special test equipment and instruments, the test efficiency is improved, and the test time is reduced.
Description
Technical Field
The invention relates to the field of solid state disk testing, in particular to a method and a device for testing the characteristic that a solid state disk supports D3, computer equipment and a storage medium.
Background
SSD (Solid State Disk or Solid State Drive), commonly known as Solid State Disk, is a hard Disk made of an array of Solid State electronic memory chips. Solid state disks are generally used as data storage hardware in computer devices/notebooks.
Microsoft requires that devices connected to PCIe bus support D3 low power consumption feature, aiming to improve low power consumption experience and quick response capability of notebook devices during use of solid state disk by notebook users.
The existing scheme adopts a PCIe bus analysis method in a low power consumption state, and specifically comprises the following steps: connecting the device to a bus analyzer; trace capture and analysis are carried out by using special software; the behavior trace in the D3 state is obtained. The bus analysis method requires professional instrumentation and is slow in analysis process.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method, a device, a computer device and a storage medium for testing the characteristic of D3 supported by a solid state disk.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a method for testing a solid state disk supporting D3 characteristics, including the following steps:
disabling an automatic power supply switching function of the device to be tested so as to enable a solid state disk of the device to be tested to keep a normal power supply state;
sending a power state switching command to the device to be tested, and controlling the solid state disk to enter a D3 low power consumption state;
and acquiring a power state value returned by the solid state disk, and determining the current power state of the solid state disk according to the power state value.
In a second aspect, the present invention provides an apparatus for testing a solid state disk supporting D3 characteristic, including:
the function forbidding unit is used for forbidding the automatic power supply switching function of the equipment to be tested so as to keep the solid state disk of the equipment to be tested in a normal power supply state;
the state switching unit is used for sending a power state switching command to the device to be tested and controlling the solid state disk to enter a D3 low power consumption state;
and the state judgment unit is used for acquiring the power state value returned by the solid state disk and determining the current power state of the solid state disk according to the power state value.
In a third aspect, the present invention provides a computer device, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the method for testing the solid state disk supporting D3 characteristic as described above when executing the computer program.
In a fourth aspect, the present invention provides a storage medium storing a computer program, which when executed by a processor, can implement the method for testing the D3-supported characteristics of a solid state disk as described above.
Compared with the prior art, the invention has the beneficial effects that: according to the invention, the test host disables the automatic power supply switching function of the device to be tested, and sends the power supply state switching command to the device to be tested, the solid state disk is controlled to enter the D3 low power consumption state, finally, the power supply state value returned by the solid state disk is obtained, and the current power supply state of the solid state disk is determined according to the power supply state value, so that the whole test process does not need to access special test equipment and instruments, the test efficiency is improved, and the test time is reduced.
The invention is further described below with reference to the accompanying drawings and specific embodiments.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a method for testing a solid state disk supporting D3 feature according to an embodiment of the present invention;
fig. 2 is a schematic sub-flow chart of a method for testing a solid state disk supporting D3 feature according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating a method for testing a solid state disk supporting D3 feature according to another embodiment of the present invention;
FIG. 4 is a schematic block diagram of an apparatus for testing a solid state disk supporting D3 characteristic according to an embodiment of the present invention;
fig. 5 is a schematic block diagram of a state determination unit of an apparatus for testing a solid state disk supporting D3 characteristic according to an embodiment of the present invention;
FIG. 6 is a schematic block diagram of a computer device provided by an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Fig. 1 is a schematic flowchart of a method for testing a solid state disk supporting D3 feature according to an embodiment of the present invention. As shown in fig. 1, the method includes the following steps S110 to S130.
S110, disabling an automatic power supply switching function of the device to be tested so as to enable the solid state disk of the device to be tested to keep a normal power supply state.
In this embodiment, the device to be tested, such as a notebook computer, has an automatic power switch function on its own motherboard or central chip, and disables the automatic power switch function of the device to be tested, so as to ensure that the corresponding solid state disk is maintained in a normal power supply state by default, and only switches to a D3 low power consumption state according to a subsequent test command. The method can avoid that the device to be tested controls the solid state disk to automatically enter/exit the D3 low power consumption state according to the set conditions, and the accuracy of the corresponding solid state disk test is influenced.
And S120, sending a power state switching command to the device to be tested, and controlling the solid state disk to enter a D3 low power consumption state.
In this embodiment, before testing, the device to be tested, which is equipped with the solid state disk, needs to connect the device to be tested, which is equipped with the solid state disk, to the test host that supports D3 low power consumption state switching, and the test host issues a power state switching command to the solid state disk, controls the solid state disk to enter or exit the D3 low power consumption state, and determines whether the solid state disk enters the D3 low power consumption state through debugging information output by a serial port of the solid state disk.
Specifically, the power state switching command is an NVMe command capable of switching the power state.
S130, obtaining a power state value returned by the solid state disk, and determining the current power state of the solid state disk according to the power state value.
In this embodiment, the power state value correspondingly represents the state switching of the solid state disk, for example, when the power state value is "D3-Skip normal PS 4", it represents that the solid state disk successfully enters the D3 low power consumption state; and the power state value is 'D3-Skip normal PS 4', the solid state disk is judged to be unsuccessfully in the D3 low power consumption state. The power source state switching command is generated up and down by the test host, after the solid state disk executes the power source state switching command, the solid state disk outputs corresponding debugging information or serial port logs, the power source state value of the solid state disk is recorded in the debugging information, the test result of the low power consumption mode of the solid state disk D3 can be obtained according to the power source state value in the debugging information, a specific test instrument does not need to be accessed, and the test process is more efficient.
Referring to FIG. 2, step S130 includes steps S131-S135 in one embodiment.
S131, debugging information output by the solid state disk is obtained.
S132, analyzing the debugging information to obtain the power state value of the debugging information.
And S133, judging whether the solid state disk enters a D3 low power consumption state or not according to the power state value.
And S134, if the power state value is D3-Skip normal PS4, determining that the solid state disk successfully enters the D3 low power consumption state.
And S135, after the solid state disk is controlled to keep the low power consumption state D3 for a specified time, waking up the solid state disk to enter a normal working state through a read data command.
And S136, if the power state value is Dx to D0(ISR), determining that the solid state disk does not successfully enter the D3 low power consumption state.
In this embodiment, after it is determined that the solid state disk successfully enters the D3 low power consumption state, the solid state disk is controlled to maintain the D3 low power consumption state for a specified time, and finally the solid state disk is awakened to enter a normal operating state through a read data command, so that the whole test is completed.
According to the invention, the test host disables the automatic power supply switching function of the device to be tested, and sends the power supply state switching command to the device to be tested, the solid state disk is controlled to enter the D3 low power consumption state, finally, the power supply state value returned by the solid state disk is obtained, and the current power supply state of the solid state disk is determined according to the power supply state value, so that the whole test process does not need to access special test equipment and instruments, the test efficiency is improved, and the test time is reduced.
Fig. 3 is a flowchart illustrating a method for testing a solid state disk supporting D3 feature according to another embodiment of the present invention. As shown in fig. 3, the method for testing the solid state disk supporting D3 feature of the present embodiment includes steps S210 to S240. Steps S220 to S240 are similar to steps S110 to S130 in the above embodiments, and are not described herein again. The added step S210 in the present embodiment is explained in detail below.
And S210, connecting the device to be tested with the solid state disk to a test host supporting D3 low-power-consumption state switching.
In this embodiment, before testing, the device to be tested, which is equipped with the solid state disk, needs to connect the device to be tested, which is equipped with the solid state disk, to the test host that supports D3 low power consumption state switching, and the test host issues a power state switching command to the solid state disk, controls the solid state disk to enter or exit the D3 low power consumption state, and determines whether the solid state disk enters the D3 low power consumption state through debugging information output by a serial port of the solid state disk.
Fig. 4 is a schematic block diagram of an apparatus for testing a solid state disk supporting D3 characteristic according to an embodiment of the present invention. As shown in fig. 4, the present invention also provides an apparatus for testing the solid state disk supporting D3 characteristics, corresponding to the above method for testing the solid state disk supporting D3 characteristics. The device for testing the solid state disk supporting D3 characteristic comprises a unit for executing the method for testing the solid state disk supporting D3 characteristic, and the device can be configured in a desktop computer, a tablet computer, a portable computer and other terminals. Specifically, referring to fig. 4, the apparatus for testing the solid state disk supporting the D3 feature includes a pre-connection unit 10, a function disabling unit 20, a state switching unit 30, and a state determining unit 40.
And the pre-connection unit 10 is used for connecting the device to be tested provided with the solid state disk to a test host supporting D3 low-power-consumption state switching.
In this embodiment, before testing, the device to be tested, which is equipped with the solid state disk, needs to connect the device to be tested, which is equipped with the solid state disk, to the test host that supports D3 low power consumption state switching, and the test host issues a power state switching command to the solid state disk, controls the solid state disk to enter or exit the D3 low power consumption state, and determines whether the solid state disk enters the D3 low power consumption state through debugging information output by a serial port of the solid state disk.
And the function disabling unit 20 is configured to disable an automatic power switching function of the device to be tested, so that the solid state disk of the device to be tested maintains a normal power supply state.
In this embodiment, the device to be tested, such as a notebook computer, has an automatic power switch function on its own motherboard or central chip, and disables the automatic power switch function of the device to be tested, so as to ensure that the corresponding solid state disk is maintained in a normal power supply state by default, and only switches to a D3 low power consumption state according to a subsequent test command. The method can avoid that the device to be tested controls the solid state disk to automatically enter/exit the D3 low power consumption state according to the set conditions, and the accuracy of the corresponding solid state disk test is influenced.
And the state switching unit 30 is used for sending a power state switching command to the device to be tested and controlling the solid state disk to enter a low power consumption state D3.
In this embodiment, before testing, the device to be tested, which is equipped with the solid state disk, needs to connect the device to be tested, which is equipped with the solid state disk, to the test host that supports D3 low power consumption state switching, and the test host issues a power state switching command to the solid state disk, controls the solid state disk to enter or exit the D3 low power consumption state, and determines whether the solid state disk enters the D3 low power consumption state through debugging information output by a serial port of the solid state disk.
Specifically, the power state switching command is an NVMe command capable of switching the power state.
And the state determination unit 40 is configured to acquire a power state value returned by the solid state disk, and determine a current power state of the solid state disk according to the power state value.
In this embodiment, the power state value correspondingly represents the state switching of the solid state disk, for example, when the power state value is "D3-Skip normal PS 4", it represents that the solid state disk successfully enters the D3 low power consumption state; and the power state value is 'D3-Skip normal PS 4', the solid state disk is judged to be unsuccessfully in the D3 low power consumption state. The power source state switching command is generated up and down by the test host, after the solid state disk executes the power source state switching command, the solid state disk outputs corresponding debugging information or serial port logs, the power source state value of the solid state disk is recorded in the debugging information, the test result of the low power consumption mode of the solid state disk D3 can be obtained according to the power source state value in the debugging information, a specific test instrument does not need to be accessed, and the test process is more efficient.
Referring to fig. 5, the state decision unit 40 includes an information acquisition subunit 41, an information parsing subunit 42, a state decision subunit 43, a first decision subunit 44, a second decision subunit 45, and a state wake-up subunit 46.
And the information acquisition subunit 41 is configured to acquire debugging information output by the solid state disk.
And an information parsing subunit 42, configured to parse the debugging information to obtain a power state value of the debugging information.
And the state judgment subunit 43 is configured to judge whether the solid state disk enters a D3 low power consumption state according to the power state value.
And the first judging subunit 44 is configured to judge that the solid state disk successfully enters the D3 low power consumption state when the power state value is "D3-Skip normal PS 4".
And the state wake-up subunit 46 is configured to control the solid state disk to wake up the solid state disk to enter a normal operating state through a read data command after the solid state disk is kept in the low power consumption state D3 for a specified time.
And the second judging subunit 45 is configured to, when the power state value is "Dx to D0 (ISR)", judge that the solid state disk has not successfully entered the D3 low power consumption state.
In this embodiment, after it is determined that the solid state disk successfully enters the D3 low power consumption state, the solid state disk is controlled to maintain the D3 low power consumption state for a specified time, and finally the solid state disk is awakened to enter a normal operating state through a read data command, so that the whole test is completed.
According to the invention, the test host disables the automatic power supply switching function of the device to be tested, and sends the power supply state switching command to the device to be tested, the solid state disk is controlled to enter the D3 low power consumption state, finally, the power supply state value returned by the solid state disk is obtained, and the current power supply state of the solid state disk is determined according to the power supply state value, so that the whole test process does not need to access special test equipment and instruments, the test efficiency is improved, and the test time is reduced.
It should be noted that, as can be clearly understood by those skilled in the art, for the specific implementation process of the apparatus for testing the D3 feature supported by the solid state disk and each unit, reference may be made to the corresponding description in the foregoing method embodiment, and for convenience and brevity of description, no further description is provided herein.
Referring to fig. 6, fig. 6 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.
Referring to fig. 6, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.
The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 comprise program instructions that, when executed, cause the processor 502 to perform a method of testing solid state disk support D3 characteristics.
The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.
The internal memory 504 provides an environment for running the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be caused to execute a method for testing the solid state disk support D3 characteristic.
The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 6 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
Wherein the processor 502 is adapted to run a computer program 5032 stored in the memory.
It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.
Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A method for testing the D3 supporting characteristic of a solid state disk is characterized by comprising the following steps:
disabling an automatic power supply switching function of the device to be tested so as to enable a solid state disk of the device to be tested to keep a normal power supply state;
sending a power state switching command to the device to be tested, and controlling the solid state disk to enter a D3 low power consumption state;
and acquiring a power state value returned by the solid state disk, and determining the current power state of the solid state disk according to the power state value.
2. The method for testing the D3-supporting characteristic of the solid state disk as claimed in claim 1, wherein the step of disabling the automatic power switching function of the device to be tested to keep the solid state disk of the device to be tested in a normal power supply state is preceded by the steps of;
and connecting the device to be tested provided with the solid state disk to a test host supporting D3 low-power consumption state switching.
3. The method for testing the D3 supporting characteristics of the solid state disk according to claim 1, wherein the step of obtaining the power state value returned by the solid state disk and determining the current power state of the solid state disk according to the power state value includes;
acquiring debugging information output by the solid state disk;
analyzing the debugging information to obtain a power state value of the debugging information;
judging whether the solid state disk enters a D3 low power consumption state or not according to the power state value;
if the power state value is 'D3-Skip normal PS 4', the solid state disk is judged to successfully enter a D3 low power consumption state;
if the power state value is "Dx to D0 (ISR)", it is determined that the solid state disk has not successfully entered the D3 low power consumption state.
4. The method for testing the D3 supporting characteristics of the solid state disk, according to claim 3, wherein the step of determining that the solid state disk successfully enters the D3 low power consumption state is followed by the steps of;
and after the solid state disk is controlled to be kept in the low power consumption state D3 for a specified time, waking up the solid state disk to enter a normal working state through a read data command.
5. An apparatus for testing a solid state disk supporting D3 characteristics, comprising:
the function forbidding unit is used for forbidding the automatic power supply switching function of the equipment to be tested so as to keep the solid state disk of the equipment to be tested in a normal power supply state;
the state switching unit is used for sending a power state switching command to the device to be tested and controlling the solid state disk to enter a D3 low power consumption state;
and the state judgment unit is used for acquiring the power state value returned by the solid state disk and determining the current power state of the solid state disk according to the power state value.
6. The apparatus for testing the D3-capable characteristics of the solid state disk as claimed in claim 5, further comprising a pre-connection unit for connecting the device under test with the solid state disk to a test host supporting D3 low power consumption state switching.
7. The apparatus for testing the D3 characteristic supported by the solid state disk according to claim 5, wherein the state determination unit comprises an information acquisition subunit, an information analysis subunit, a state determination subunit, a first determination subunit and a second determination subunit;
the information acquisition subunit is used for acquiring debugging information output by the solid state disk;
the information analysis subunit is used for analyzing the debugging information to obtain a power state value of the debugging information;
the state judgment subunit is configured to judge whether the solid state disk enters a D3 low power consumption state according to the power state value;
the first judging subunit is used for judging that the solid state disk successfully enters a D3 low power consumption state when the power state value is D3-Skip normal PS 4;
and the second judging subunit is used for judging that the solid state disk does not successfully enter the D3 low power consumption state when the power state value is 'Dx to D0 (ISR)'.
8. The apparatus for testing the D3 capability supported by the solid state disk according to claim 7, wherein the state determination unit further includes a state wake subunit, configured to control the solid state disk to wake up the solid state disk to enter the normal operating state through a read data command after the solid state disk maintains the D3 low power consumption state for a specified time.
9. A computer device, characterized in that the computer device comprises a memory and a processor, the memory stores a computer program, and the processor executes the computer program to realize the method for testing the D3-supported characteristic of the solid state disk according to any one of claims 1 to 4.
10. A storage medium storing a computer program which, when executed by a processor, implements a method for testing D3-supported characteristics of a solid state disk according to any one of claims 1 to 4.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112951316A (en) * | 2021-03-31 | 2021-06-11 | 东莞记忆存储科技有限公司 | Solid state disk drive-and-retract D3hotState testing method and device and computer equipment |
| CN114546516A (en) * | 2022-01-24 | 2022-05-27 | 北京得瑞领新科技有限公司 | Automatic firmware switching method, storage medium and equipment in SSD production test |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112951316A (en) * | 2021-03-31 | 2021-06-11 | 东莞记忆存储科技有限公司 | Solid state disk drive-and-retract D3hotState testing method and device and computer equipment |
| CN114546516A (en) * | 2022-01-24 | 2022-05-27 | 北京得瑞领新科技有限公司 | Automatic firmware switching method, storage medium and equipment in SSD production test |
| CN114546516B (en) * | 2022-01-24 | 2022-11-29 | 北京得瑞领新科技有限公司 | Automatic firmware switching method, storage medium and equipment in SSD production test |
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