CN111930172B - Single-operational-amplifier self-biased cascode band-gap reference circuit - Google Patents
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- CN111930172B CN111930172B CN202010915486.7A CN202010915486A CN111930172B CN 111930172 B CN111930172 B CN 111930172B CN 202010915486 A CN202010915486 A CN 202010915486A CN 111930172 B CN111930172 B CN 111930172B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Abstract
The invention provides a single-operational-amplifier self-biased cascode bandgap reference circuit, which comprises the following components: the circuit comprises a starting circuit, a self-bias current source, a single-stage operational amplifier and a band-gap reference source core circuit; the starting circuit is electrically connected with the self-bias current source; the self-bias current source is electrically connected with the single-machine operational amplifier; the single-machine operational amplifier is electrically connected with the band-gap reference source core circuit; the starting circuit is used for eliminating degeneracy points; the self-bias current source is used for providing common self-bias current for the band-gap reference source core circuit; the invention has the beneficial effects that: the design layout area is small, the manufacturing cost is low, the stability is high, and the power consumption is low.
Description
Technical Field
The invention relates to the field of electronic circuits, in particular to a single-operational-amplifier self-biased cascode bandgap reference circuit.
Background
The band-gap reference source is widely applied to various integrated circuits such as analog and digital-analog mixed signals, power management and the like, and aims to establish direct current voltage or current independent of power supply voltage, temperature and process. The design quality of the bandgap reference source directly affects the performance of the chip circuit and even the whole system, and circuits such as a data converter, a comparator, an error amplifier and the like need the bandgap reference source to provide accurate and stable bandgap reference voltage and bandgap reference current. Therefore, the design of the bandgap reference source occupies an important position in the whole circuit system, and improving the performance of the bandgap reference source helps to improve the stability and reliability of the operation of the circuit system.
Disclosure of Invention
The invention provides a single-operational-amplifier self-biased cascode band-gap reference circuit for solving the defects in the prior art, and a single-stage operational amplifier is adopted to finish the amplification function of Vx and Vy error signals; a self-bias current source circuit is designed, and the current is biased by using an output signal of an operational amplifier. In addition, a simple and effective starting circuit is designed, and degeneracy points are eliminated.
The single-operational-amplifier self-biased cascode bandgap reference circuit specifically comprises:
the circuit comprises a starting circuit, a self-bias current source, a single-stage operational amplifier and a band-gap reference source core circuit; the starting circuit is electrically connected with the self-bias current source; the self-bias current source is electrically connected with the band-gap reference source core circuit; the single-stage operational amplifier is electrically connected with the band-gap reference source core circuit; the starting circuit is used for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying an error signal; the band-gap reference source core circuit is used for generating a band-gap reference voltage weakly related to temperature; the working principle of the whole circuit is as follows: the starting circuit eliminates degeneracy points to enable the circuit to start normally; after the circuit is started, the self-bias current source provides current images for the band-gap reference source core circuit and the single-stage operational amplifier; the band-gap reference source core circuit generates Vref; the single-stage operational amplifier performs current feedback control through voltage error amplification;
the starting circuit and the Mb2 and the Mb3 form a current path for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying Vx and Vy error signals and adjusting the gate voltages of Mb1, Mr3, Mr4 and Mr5 according to the error signals, so that the current of the core circuit of the band-gap reference source is feedback-controlled; the band-gap reference source core circuit is used for generating a band-gap reference voltage Vref which is weakly related to temperature.
Further, the starting circuit comprises MOS tubes Ms1, Ms2, Ms3 and Ms 4; the gate of the Ms1 is electrically connected with the source of the Ms 2; the source of Ms1 is electrically connected with the self-bias current source; the drain of Ms1 is electrically connected with the gate of Ms 1; the gate of the Ms2 is electrically connected with the source of the Ms 3; the drain of Ms2 is electrically connected with the gate of Ms 2; the gate of the Ms3 is electrically connected with the source of the Ms 4; the drain of Ms3 is electrically connected with the gate of Ms 3; the gate of the Ms4 is electrically connected to the self-bias current source; the drain of Ms4 is electrically connected with the gate of Ms 4;
the working principle of the starting circuit is as follows: ms 1-Ms 4, Mb2 and Mb3 are all in a diode connection mode, so that 6 MOS transistors can form a current path between VDD and GND, degeneracy points are eliminated, and the circuit can be started normally.
Further, the self-bias current source comprises MOS transistors Mb1, Mb2, Mb 3; the source of Mb1 and the source of Ms1 are electrically connected; the gate of Mb1 is electrically connected with the bandgap reference source core circuit; the drain of Mb1 is electrically connected to the source of Mb 2; the source of Mb2 is also electrically connected to the gate of Ms 4; the gate of Mb2 is electrically connected with the drain of Mb 2; the drain of Mb2 is electrically connected to the gate of Mb3 and the drain of Mb 3; mb3 source ground;
the working principle of the self-bias current source is as follows: after the starting circuit forms a current path, M0 generates a mirror current, so that the single-stage operational amplifier enters an operating state, an output signal OUT of the single-stage operational amplifier is connected to a grid electrode of Mb1, and finally Mb1 and Mb2 form a new current path to generate a self-bias current.
Further, the single-stage operational amplifier comprises MOS tubes M0, M1, M2, M3 and M4; the source of the M3 is electrically connected with the source of the M4; the grid of the M3 is electrically connected with the grid of the M4; the grid of the M3 is electrically connected with the drain of the M3; the drain of the M3 is electrically connected with the drain of the M1; the grid of the M1 is electrically connected with the bandgap reference source core circuit; the source of M1 is electrically connected with the drain of M0; the source of M0 is grounded; the source of M1 is also electrically connected with the source of M2; the grid of the M2 is electrically connected with the bandgap reference source core circuit; the drain of the M2 is electrically connected with the drain of the M4; the drain electrode of the M2 is also electrically connected with the bandgap reference source core circuit;
the working principle of the single-stage operational amplifier is as follows: the self-bias current source provides a current mirror for the M0 of the single-stage operational amplifier, M1 and M2 are input differential pairs, and M3 and M4 are current mirror loads.
Further, the bandgap reference source core circuit comprises MOS transistors Mr1, Mr2, Mr3, Mr4, Mr5, Mr6, resistors R1, R2, triodes Q1, Q2 and Q3; the source of Mr3 is electrically connected with the source of Mb 1; the gate of Mr3 is electrically connected with the gate of Mr 4; the drain of Mr3 is electrically connected with the source of Mr 1; the gate of Mr1 is electrically connected with the gate of Mr 2; the drain of Mr1 is electrically connected with the gate of M2; the drain electrode of the Mr1 is also electrically connected with the emitter electrode of the triode Q1; the base of the triode Q1 is electrically connected with the base of the Q2 and is grounded; the collector of the triode Q1 is grounded; the collector of the triode Q2 is grounded; an emitter of the triode Q2 is connected with one end of the resistor R1; the other end of the resistor R1 is electrically connected with the drain of the Mr 2; the source of Mr2 is electrically connected with the drain of Mr 4; the source of Mr4 is electrically connected with the source of Mr 3; the source of Mr5 is electrically connected with the source of Mr 4; the gate of Mr5 is electrically connected with the gate of Mb 1; the drain of Mr5 is electrically connected with the source of Mr 6; the gate of Mr6 is electrically connected with the drain of Mr 6; the drain of Mr6 is electrically connected with one end of a resistor R2; the other end of the resistor R2 is electrically connected with an emitting electrode of the triode Q3; the base of the transistor Q3 is electrically connected to the collector and grounded.
The M1 and the M2 are NMOS tubes; the M3 and the M4 are PMOS tubes.
The technical scheme provided by the invention has the beneficial effects that: the design layout area is small, the manufacturing cost is low, the stability is high, and the power consumption is low.
Drawings
FIG. 1 is a flow diagram of a single-op-amp self-biased cascode bandgap reference circuit in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of a functional application of an embodiment of the present invention in voltage monitoring;
FIG. 3 is a schematic diagram of an application of the embodiment of the present invention to an AD/DA chip of an analog-to-digital converter;
fig. 4 is a schematic diagram of an application of the embodiment of the present invention to a power supply voltage stabilization chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other. The present invention will be described in further detail with reference to specific embodiments.
Referring to fig. 1, fig. 1 is a schematic diagram of a cascode bandgap reference circuit with a single operational amplifier self-biased according to an embodiment of the present invention, which specifically includes:
the circuit comprises a starting circuit, a self-bias current source, a single-stage operational amplifier and a band-gap reference source core circuit; the starting circuit is electrically connected with the self-bias current source; the self-bias current source is electrically connected with the band-gap reference source core circuit; the single-stage operational amplifier is electrically connected with the band-gap reference source core circuit; the starting circuit is used for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying an error signal; the band-gap reference source core circuit is used for generating a band-gap reference voltage weakly related to temperature; the working principle of the whole circuit is as follows: the starting circuit eliminates degeneracy points to enable the circuit to start normally; after the circuit is started, the self-bias current source provides current images for the band-gap reference source core circuit and the single-stage operational amplifier; the band-gap reference source core circuit generates Vref; the single-stage operational amplifier performs current feedback control through voltage error amplification;
the starting circuit and the Mb2 and the Mb3 form a current path for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying Vx and Vy error signals and adjusting the gate voltages of Mb1, Mr3, Mr4 and Mr5 according to the error signals, so that the current of the core circuit of the band-gap reference source is feedback-controlled; the band-gap reference source core circuit is used for generating a band-gap reference voltage Vref which is weakly related to temperature.
The starting circuit comprises MOS tubes Ms1, Ms2, Ms3 and Ms 4; the gate of the Ms1 is electrically connected with the source of the Ms 2; the source of Ms1 is electrically connected with the self-bias current source; the drain of Ms1 is electrically connected with the gate of Ms 1; the gate of the Ms2 is electrically connected with the source of the Ms 3; the drain of Ms2 is electrically connected with the gate of Ms 2; the gate of the Ms3 is electrically connected with the source of the Ms 4; the drain of Ms3 is electrically connected with the gate of Ms 3; the gate of the Ms4 is electrically connected to the self-bias current source; the drain of Ms4 is electrically connected with the gate of Ms 4;
the working principle of the starting circuit is as follows: ms 1-Ms 4, Mb2 and Mb3 are all in a diode connection mode, so that 6 MOS transistors can form a current path between VDD and GND, degeneracy points are eliminated, and the circuit can be started normally.
The self-bias current source comprises MOS tubes Mb1, Mb2, Mb 3; the source of Mb1 and the source of Ms1 are electrically connected; the gate of Mb1 is electrically connected with the bandgap reference source core circuit; the drain of Mb1 is electrically connected to the source of Mb 2; the source of Mb2 is also electrically connected to the gate of Ms 4; the gate of Mb2 is electrically connected with the drain of Mb 2; the drain of Mb2 is electrically connected to the gate of Mb3 and the drain of Mb 3; mb3 source ground;
the working principle of the self-bias current source is as follows: after the starting circuit forms a current path, M0 generates a mirror current, so that the single-stage operational amplifier enters an operating state, an output signal OUT of the single-stage operational amplifier is connected to a grid electrode of Mb1, and finally Mb1 and Mb2 form a new current path to generate a self-bias current.
The single-stage operational amplifier comprises MOS tubes M0, M1, M2, M3 and M4; the source of the M3 is electrically connected with the source of the M4; the grid of the M3 is electrically connected with the grid of the M4; the grid of the M3 is electrically connected with the drain of the M3; the drain of the M3 is electrically connected with the drain of the M1; the grid of the M1 is electrically connected with the bandgap reference source core circuit; the source of M1 is electrically connected with the drain of M0; the source of M0 is grounded; the source of M1 is also electrically connected with the source of M2; the grid of the M2 is electrically connected with the bandgap reference source core circuit; the drain of the M2 is electrically connected with the drain of the M4; the drain electrode of the M2 is also electrically connected with the bandgap reference source core circuit;
the working principle of the single-stage operational amplifier is as follows: the self-bias current source provides a current mirror for the M0 of the single-stage operational amplifier, M1 and M2 are input differential pairs, and M3 and M4 are current mirror loads.
The band-gap reference source core circuit comprises MOS tubes Mr1, Mr2, Mr3, Mr4, Mr5, Mr6, resistors R1, R2, triodes Q1, Q2 and Q3; the source of Mr3 is electrically connected with the source of Mb 1; the gate of Mr3 is electrically connected with the gate of Mr 4; the drain of Mr3 is electrically connected with the source of Mr 1; the gate of Mr1 is electrically connected with the gate of Mr 2; the drain of Mr1 is electrically connected with the gate of M2; the drain electrode of the Mr1 is also electrically connected with the emitter electrode of the triode Q1; the base of the triode Q1 is electrically connected with the base of the Q2 and is grounded; the collector of the triode Q1 is grounded; the collector of the triode Q2 is grounded; an emitter of the triode Q2 is connected with one end of the resistor R1; the other end of the resistor R1 is electrically connected with the drain of the Mr 2; the source of Mr2 is electrically connected with the drain of Mr 4; the source of Mr4 is electrically connected with the source of Mr 3; the source of Mr5 is electrically connected with the source of Mr 4; the gate of Mr5 is electrically connected with the gate of Mb 1; the drain of Mr5 is electrically connected with the source of Mr 6; the gate of Mr6 is electrically connected with the drain of Mr 6; the drain of Mr6 is electrically connected with one end of a resistor R2; the other end of the resistor R2 is electrically connected with an emitting electrode of the triode Q3; the base of the transistor Q3 is electrically connected to the collector and grounded.
The M1 and the M2 are NMOS tubes; the M3 and the M4 are PMOS tubes.
The band-gap reference circuit can generate stable voltage and hardly changes with the CMOS process, the power supply voltage and the temperature. Therefore, it is widely used in various integrated circuit designs (common knowledge in the industry). The circuit provided by the scheme can be applied to various scenes, such as a voltage monitoring chip (for example, a TPS3831 shown in fig. 2, which realizes a voltage monitoring function by comparing the voltage value of VREF with the resistance division voltage of VDD), an analog-digital converter AD/DA chip (for example, a TLV5636 shown in fig. 3, which provides a reference voltage for DA output by using a bandgap voltage reference), a power supply voltage stabilizing chip (for example, an ADP150 shown in fig. 4, which stabilizes output at a set voltage value by amplifying the error between the bandgap reference voltage and the VO resistance division voltage).
Compared with the prior art, the method has the advantages that:
1) a single-stage operational amplifier is used for replacing a two-stage operational amplifier, miller compensation is not needed, and the loop gain phase margin is large, so that the stability of the whole band gap reference circuit is higher;
2) the Miller compensation capacitor is omitted, so that the layout area is smaller, and the IC manufacturing cost is low;
3) the self-bias current source circuit for the band-gap reference source is designed, an additional current source generating circuit is not needed, and a primary amplifying circuit is omitted, so that the structure is simple, the integration level is high, and the power consumption is low;
4) the corresponding starting circuit is designed, so that the method is simple and effective, and is suitable for wide voltage range, temperature range and various processes of tt, ff and ss;
the technical scheme provided by the invention has the beneficial effects that: the design layout area is small, the manufacturing cost is low, the stability is high, and the power consumption is low.
In this patent, the terms such as front, back, upper and lower are defined with the devices in the figures and the positions of the devices relative to each other, and are used for clarity and convenience of technical solution. It is to be understood that the use of the directional terms should not be taken to limit the scope of the claims.
The features of the above-described embodiments and examples of this patent may be combined with each other without conflict.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (2)
1. A single-operational-amplifier self-biased cascode bandgap reference circuit, comprising: the method specifically comprises the following steps: the circuit comprises a starting circuit, a self-bias current source, a single-stage operational amplifier and a band-gap reference source core circuit; the starting circuit is electrically connected with the self-bias current source; the self-bias current source is electrically connected with the band-gap reference source core circuit; the single-stage operational amplifier is electrically connected with the band-gap reference source core circuit; the starting circuit is used for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying an error signal; the band-gap reference source core circuit is used for generating a band-gap reference voltage weakly related to temperature; the working principle of the whole circuit is as follows: the starting circuit eliminates degeneracy points to enable the circuit to start normally; after the circuit is started, the self-bias current source provides current images for the band-gap reference source core circuit and the single-stage operational amplifier; the band-gap reference source core circuit generates Vref; the single-stage operational amplifier performs current feedback control through voltage error amplification;
the starting circuit and the Mb2 and the Mb3 form a current path for eliminating degeneracy points; the self-bias current source is used for providing a current mirror image for the single-stage operational amplifier and the band-gap reference source core circuit; the single-stage operational amplifier is used for amplifying Vx and Vy error signals and adjusting the gate voltages of Mb1, Mr3, Mr4 and Mr5 according to the error signals, so that the current of the core circuit of the band-gap reference source is feedback-controlled; the band-gap reference source core circuit is used for generating a band-gap reference voltage Vref weakly related to temperature;
the starting circuit comprises MOS tubes Ms1, Ms2, Ms3 and Ms 4; the gate of the Ms1 is electrically connected with the source of the Ms 2; the source of Ms1 is electrically connected with the self-bias current source; the drain of Ms1 is electrically connected with the gate of Ms 1; the gate of the Ms2 is electrically connected with the source of the Ms 3; the drain of Ms2 is electrically connected with the gate of Ms 2; the gate of the Ms3 is electrically connected with the source of the Ms 4; the drain of Ms3 is electrically connected with the gate of Ms 3; the gate of the Ms4 is electrically connected to the self-bias current source; the drain of Ms4 is electrically connected with the gate of Ms 4;
the working principle of the starting circuit is as follows: ms 1-Ms 4, Mb2 and Mb3 are all in a diode connection mode, so that 6 MOS transistors can form a current path between VDD and GND, degeneracy points are eliminated, and the circuit can be normally started;
the self-bias current source comprises MOS tubes Mb1, Mb2, Mb 3; the source of Mb1 and the source of Ms1 are electrically connected; the gate of Mb1 is electrically connected with the bandgap reference source core circuit; the drain of Mb1 is electrically connected to the source of Mb 2; the source of Mb2 is also electrically connected to the gate of Ms 4; the gate of Mb2 is electrically connected with the drain of Mb 2; the drain of Mb2 is electrically connected to the gate of Mb3 and the drain of Mb 3; mb3 source ground;
the working principle of the self-bias current source is as follows: after the starting circuit forms a current path, M0 generates a mirror current, so that the single-stage operational amplifier enters an operating state, an output signal OUT of the single-stage operational amplifier is connected to the grid of Mb1, and finally Mb1 and Mb2 form a new current path to generate a self-bias current;
the single-stage operational amplifier comprises MOS tubes M0, M1, M2, M3 and M4; the source of the M3 is electrically connected with the source of the M4; the grid of the M3 is electrically connected with the grid of the M4; the grid of the M3 is electrically connected with the drain of the M3; the drain of the M3 is electrically connected with the drain of the M1; the grid of the M1 is electrically connected with the bandgap reference source core circuit; the source of M1 is electrically connected with the drain of M0; the source of M0 is grounded; the source of M1 is also electrically connected with the source of M2; the grid of the M2 is electrically connected with the bandgap reference source core circuit; the drain of the M2 is electrically connected with the drain of the M4; the drain electrode of the M2 is also electrically connected with the bandgap reference source core circuit;
the working principle of the single-stage operational amplifier is as follows: the self-bias current source provides a current mirror for M0 of the single-stage operational amplifier, M1 and M2 are input differential pairs, and M3 and M4 are current mirror loads;
the band-gap reference source core circuit comprises MOS tubes Mr1, Mr2, Mr3, Mr4, Mr5, Mr6, resistors R1, R2, triodes Q1, Q2 and Q3; the source of Mr3 is electrically connected with the source of Mb 1; the gate of Mr3 is electrically connected with the gate of Mr 4; the drain of Mr3 is electrically connected with the source of Mr 1; the gate of Mr1 is electrically connected with the gate of Mr 2; the drain of Mr1 is electrically connected with the gate of M2; the drain electrode of the Mr1 is also electrically connected with the emitter electrode of the triode Q1; the base of the triode Q1 is electrically connected with the base of the Q2 and is grounded; the collector of the triode Q1 is grounded; the collector of the triode Q2 is grounded; an emitter of the triode Q2 is connected with one end of the resistor R1; the other end of the resistor R1 is electrically connected with the drain of the Mr 2; the source of Mr2 is electrically connected with the drain of Mr 4; the source of Mr4 is electrically connected with the source of Mr 3; the source of Mr5 is electrically connected with the source of Mr 4; the gate of Mr5 is electrically connected with the gate of Mb 1; the drain of Mr5 is electrically connected with the source of Mr 6; the gate of Mr6 is electrically connected with the drain of Mr 6; the drain of Mr6 is electrically connected with one end of a resistor R2; the other end of the resistor R2 is electrically connected with an emitting electrode of the triode Q3; the base of the transistor Q3 is electrically connected to the collector and grounded.
2. The self-biased cascode bandgap reference circuit of claim 1, wherein: the M1 and the M2 are NMOS tubes; the M3 and the M4 are PMOS tubes.
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| CN115079767A (en) * | 2022-06-28 | 2022-09-20 | 汇春科技(成都)有限公司 | Band-gap reference voltage source |
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