CN111782271A - Software and hardware interaction method and device and storage medium - Google Patents
Software and hardware interaction method and device and storage medium Download PDFInfo
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Abstract
The embodiment of the application discloses a software and hardware interaction method and device and a storage medium, wherein the software and hardware interaction device comprises: a management module, a software module, a hardware module, and a plurality of registers, the method comprising: determining a register hierarchical configuration strategy by using a management module; the software module is utilized to carry out hierarchical division on a plurality of registers according to a register hierarchical configuration strategy and carry out information configuration layer by layer; and reading the configuration information of the registers by using the hardware module, and completing hardware configuration according to the configuration information.
Description
Technical Field
The embodiment of the application relates to the technical field of communication, in particular to a software and hardware interaction method and device and a storage medium.
Background
In the design of an asic, in order to meet the design flexibility, software is usually used to configure hardware, and parameters and scene configuration are adjusted by software, so that a plurality of operating modes can be provided. Due to the re-designability of software, the chip overall design identification caused by the local design defect of hardware can be effectively avoided.
At present, the general method for configuring hardware by software is to directly configure through registers, and the interaction between software and hardware is realized through configuration registers, as shown in fig. 1. The software configures the scene parameters needed by the hardware through the register, and the hardware reports the real-time calculation information to the software through the register.
However, the direct configuration method is complex to manage when a plurality of persons collaborate with a large-scale development, and errors are easily generated in the maintenance process, so that hardware is failed.
Disclosure of Invention
The embodiment of the application provides a software and hardware interaction method and device and a storage medium, and a register is configured in a hierarchical mode, so that the software and hardware interaction effect is improved, and the problem of hardware failure is avoided.
The technical scheme of the embodiment of the application is realized as follows:
the embodiment of the application provides a software and hardware interaction method, which is applied to a software and hardware interaction device, wherein the software and hardware interaction device comprises: a management module, a software module, a hardware module, and a plurality of registers, the method comprising:
determining a register hierarchical configuration strategy by utilizing the management module;
the software module is utilized to carry out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carry out information configuration layer by layer;
and reading the configuration information of the registers by using the hardware module, and completing hardware configuration according to the configuration information.
In the above method, before performing hierarchical division on the plurality of registers according to the register hierarchical configuration policy and performing information configuration layer by layer, the method further includes:
generating an information management list corresponding to the plurality of registers by using the management module;
and periodically updating the information management list by using the management module according to a preset interval time.
In the above method, the generating, by the management module, an information management list corresponding to the plurality of registers includes:
utilizing the management module to map registers corresponding to different sub-modules in the hardware module in the plurality of registers to different physical addresses respectively;
acquiring a register parameter of each register in the plurality of registers by using the management module; wherein the register parameters include at least one of: priority, update speed and function;
and generating the information management list by using the management module according to the physical address and the register parameter.
In the above method, after mapping the registers corresponding to different sub-modules in the hardware module to different physical addresses, the method further includes:
under the condition that a first register is newly added to the software and hardware device, acquiring a second register, with the function similarity greater than a preset similarity, of the plurality of registers by using the management module;
mapping, with the management module, the first register to a physical address associated with a physical address of the second register.
In the above method, the performing, by the software module, hierarchical division on the plurality of registers according to the register hierarchical configuration policy, and performing information configuration layer by layer includes:
and calling a direct memory access channel to complete the information configuration of at least two registers at one time by using the software module in the process of configuring at least two registers with continuous physical addresses in the plurality of registers.
In the above method, the method further comprises:
and in the process that the software module carries out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carries out information configuration layer by layer, the management module is utilized to control the configuration sequence of the corresponding registers in the plurality of registers according to the configuration sequence of different sub-modules in the hardware module.
In the above method, the reading, by the hardware module, the configuration information of the plurality of registers includes:
determining, with the hardware module, a read speed that matches a configuration speed at which the software module configures the plurality of registers;
and reading the configuration information of the plurality of registers by utilizing the hardware module according to the reading speed.
In the above method, the method further comprises:
under the condition that the hardware module obtains the reporting information, the management module is utilized to indicate the reporting time and a target register to the hardware module; the target register is a register of the plurality of registers;
reporting the reporting information to the target register by using the hardware module according to the reporting time;
and reading the reported information from the target register by using the software module.
The embodiment of the application provides a software and hardware interaction device, the device includes: a management module, a software module, a hardware module, and a plurality of registers,
the management module is used for determining a register hierarchical configuration strategy;
the software module is used for carrying out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carrying out information configuration layer by layer;
and the hardware module is used for reading the configuration information of the registers and completing hardware configuration according to the configuration information.
In the above apparatus, the management module is further configured to generate an information management list corresponding to the plurality of registers; and periodically updating the information management list by using the management module according to a preset interval time.
In the above apparatus, the management module is further configured to map registers, corresponding to different sub-modules in the hardware module, in the plurality of registers to different physical addresses respectively; acquiring register parameters of each register in the plurality of registers; wherein the register parameters include at least one of: priority, update speed and function; and generating the information management list according to the physical address and the register parameter.
In the above apparatus, the management module is further configured to, when a first register is newly added to the software and hardware apparatus, obtain a second register, of the plurality of registers, whose functional similarity to the first register is greater than a preset similarity; mapping the first register to a physical address associated with a physical address of the second register.
In the above apparatus, the software module is specifically configured to invoke a direct memory access channel to complete information configuration of at least two registers at a time in a process of configuring at least two registers with consecutive physical addresses in the plurality of registers.
In the above apparatus, the management module is further configured to, in a process that the software module performs hierarchical division on the plurality of registers according to the register hierarchical configuration policy and performs information configuration layer by layer, control, by using the management module, a configuration order of a corresponding register in the plurality of registers according to a configuration order of different sub-modules in the hardware module.
In the above apparatus, the hardware module is specifically configured to determine a reading speed that matches a configuration speed at which the software module configures the plurality of registers; and reading out the configuration information of the plurality of registers according to the reading speed.
In the above apparatus, the management module is further configured to indicate, to the hardware module, a reporting time and a target register when the hardware module obtains the reporting information; the target register is a register of the plurality of registers;
the hardware module is further configured to report the report information to the target register according to the report time;
the software module is further configured to read the reporting information from the target register.
In the above apparatus, the software module is a general-purpose integrated circuit.
In the above apparatus, the hardware module is an application specific integrated circuit.
The present application provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described software and hardware interaction method.
The embodiment of the application provides a software and hardware interaction method, which is applied to a software and hardware interaction device, wherein the software and hardware interaction device comprises: a management module, a software module, a hardware module, and a plurality of registers, the method comprising: determining a register hierarchical configuration strategy by using a management module; the software module is utilized to carry out hierarchical division on a plurality of registers according to a register hierarchical configuration strategy and carry out information configuration layer by layer; and reading the configuration information of the registers by using the hardware module, and completing hardware configuration according to the configuration information. According to the technical scheme provided by the embodiment of the application, the register is configured in a layering mode, so that the interaction effect of software and hardware is improved, and the problem of hardware failure is avoided.
Drawings
FIG. 1 is a diagram illustrating software and hardware interaction provided in the prior art;
fig. 2 is a schematic diagram of software and hardware interaction provided in an embodiment of the present application;
fig. 3 is a schematic flowchart of a software and hardware interaction method according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a software and hardware interaction apparatus according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The embodiment of the application provides a software and hardware interaction method which is realized through a software and hardware interaction device.
It should be noted that, in the embodiment of the present application, the software and hardware interaction device includes: a management module, a software module, a hardware module, and a plurality of registers. Fig. 2 is a schematic diagram of software and hardware interaction provided in an embodiment of the present application. The following detailed description of the software and hardware interaction method is based on fig. 2.
Fig. 3 is a schematic flowchart of a software and hardware interaction method according to an embodiment of the present disclosure. As shown in fig. 3, the method mainly comprises the following steps:
s301, determining a register hierarchical configuration strategy by using a management module.
In the embodiment of the application, the software and hardware interaction device can determine the register hierarchical configuration strategy by using the management module.
It should be noted that, in the embodiment of the present application, compared to an existing software and hardware interaction device, a management module is introduced to complete the management work of the configuration register, and the management module may be maintained by a software module and a hardware module together. The management module comprises a certain storage field in an initial state, so that the expandability of register management can be ensured.
It should be noted that, in the embodiment of the present application, for the management module, it may be configured with a separate virtual model, decoupled from the software module and the hardware module, and downward compatible. The management module can be configured with simple external interfaces and version numbers, and developers with different schedules can realize corresponding local development only by setting the version numbers.
It should be noted that, in the embodiment of the present application, interaction between the software module and the hardware module is implemented by configuring a plurality of registers, specifically, the software module configures information such as scene parameters and the like required by the hardware module through the registers, and the hardware module reports information such as real-time computation information and the like to the software module through the registers. The number of the specific registers may be set according to actual requirements, and the embodiment of the present application is not limited.
It should be noted that, in the embodiment of the present application, the register hierarchical configuration policy may be a rule formulated based on an application scenario, based on an uplink and a downlink, based on a primary card and a secondary primary card, and the like. The specific register hierarchical configuration strategy can be determined according to actual requirements, and the embodiment of the application is not limited.
And S302, carrying out hierarchical division on the plurality of registers according to a register hierarchical configuration strategy by using a software module, and carrying out information configuration layer by layer.
In the embodiment of the application, the software and hardware interaction device may utilize a software module to perform hierarchical division on the plurality of registers according to a register hierarchical configuration strategy, and perform information configuration layer by layer.
It should be noted that, in the embodiment of the present application, as shown in fig. 2, a software module may configure registers in one layer according to a register hierarchical configuration policy, that is, for a plurality of registers, a register to be configured in a first layer may be selected according to the register hierarchical configuration policy to complete information configuration, and then a register to be configured in a next layer may be selected to perform information configuration until all the configuration is completed.
It can be understood that, in the embodiment of the present application, the software module configures registers hierarchically according to a register hierarchical configuration policy, and different registers have different priorities, so that hardware configuration errors and joint debugging failures can be effectively avoided.
It should be noted that, in the embodiment of the present application, a software module is used to perform hierarchical division on a plurality of registers according to a register hierarchical configuration policy, and perform information configuration layer by layer, where the hierarchical division includes: and calling a direct memory access channel to complete the information configuration of at least two registers at one time in the process of configuring at least two registers with continuous physical addresses in the plurality of registers.
It can be understood that, in the embodiment of the present application, in the process that the software module performs hierarchical division on the plurality of registers according to the register hierarchical configuration policy and performs information configuration layer by layer, there may be a case that functions of some registers are related, which is represented on physical addresses, that is, the physical addresses are consecutive, and therefore, when the registers are configured, Direct Memory Access (DMA) channel configuration may be invoked for one-time configuration, so as to increase the speed of the software module configuring the registers.
Specifically, in the embodiment of the present application, for the case of configuring a part of registers at one time, the software module may write the registers into the memory of the hardware module, update the fifo task, and allocate the configuration information of different registers to each hardware module by the hardware module. If the FIFO task is in a full state, the software module does not continue to write the register configuration until the FIFO task is in a non-full state, and the software module writes the register configuration again.
It should be noted that, in the embodiment of the present application, in the process that the software module performs hierarchical division on the plurality of registers according to the register hierarchical configuration policy and performs information configuration layer by layer, the management module is used to control the configuration sequence of the corresponding register in the plurality of registers according to the configuration sequence of different sub-modules in the hardware module.
It can be understood that, in the embodiment of the present application, the hardware modules include hardware modules with various functions, and the software module performs hierarchical division on the plurality of registers according to a register hierarchical configuration policy, and configures the registers corresponding to different sub-modules in the hardware module layer by layer in the process of performing information configuration layer by layer, so that the management module may perform constraint on the configuration sequence of the corresponding registers according to the configuration sequence of the different sub-modules in the hardware module, thereby preventing some hardware module configuration processes from causing backpressure operations between modules.
S303, reading the configuration information of the registers by using the hardware module, and completing the hardware configuration according to the configuration information.
In the embodiment of the application, the software and hardware interaction device can read the configuration information of a plurality of registers by using the hardware module, so as to configure different sub-modules.
Specifically, in the embodiment of the present application, the reading configuration information of the plurality of registers by using the hardware module includes: determining, with a hardware module, a read speed that matches a configuration speed at which a software module configures a plurality of registers; and reading the configuration information of the plurality of registers by using a hardware module according to the reading speed.
It can be understood that, in the embodiment of the present application, the interaction between the hardware module and the plurality of registers should adapt to the interaction speed between the software module and the plurality of registers, that is, the reading speed of the hardware module reading the configuration information of the plurality of registers needs to be matched with the speed of the software module configuring the plurality of registers, so as to ensure the correct interaction between the hardware module and the software module, and avoid that the speed of the software module configuring is later than the speed of the hardware module reading, which causes a configuration error.
It should be noted that, in the embodiment of the present application, when the hardware module obtains the report information, the management module is used to indicate the report time and the target register to the hardware module; the target register is a register in a plurality of registers; reporting the report information to a target register by using a hardware module according to the report time; and reading the reported information from the target register by using a software module.
It can be understood that, in the embodiment of the present application, the hardware module may obtain information such as real-time calculation information as reporting information, and needs to report the information to the software module, at this time, the management module may indicate reporting time and a register for receiving the reporting information, that is, a target register, to the hardware module, and the hardware module may report the reporting information to the target register when the reporting time is reached. Then, the software module can read the reported information from the target register, and perform the relevant processing.
In the embodiment of the application, the software and hardware interaction device can also generate an information management list corresponding to a plurality of registers by using a management module; and according to the preset interval time, periodically updating the information management list by using the management module.
It should be noted that, in the embodiment of the present application, as shown in fig. 2, the management module may generate a corresponding information management list according to a plurality of registers, where relevant characteristics of each register are described in the list.
Specifically, in the embodiment of the present application, the generating, by using the management module, an information management list corresponding to a plurality of registers includes: utilizing a management module to map registers of different sub-modules in a corresponding hardware module in a plurality of registers to different physical addresses respectively; acquiring a register parameter of each register in a plurality of registers by using a management module; the register parameters at least comprise one of the following parameters: priority, update speed and function; and generating an information management list by using a management module according to the physical address and the register parameter.
It should be noted that, in the embodiment of the present application, the management module may map registers required by different sub-modules in the hardware module to different physical addresses, but from a software perspective, registers with similar functions are collectively described, that is, described in the description item in the list.
It should be noted that, in the embodiment of the present application, different registers have different parameters, such as priority, update speed, function, and the like, according to their own functions and characteristics, and therefore, the management module may acquire these information, so as to describe in the list when generating the information management list. In addition, the register parameter may also include a relationship with other registers in a specific scenario, and the embodiment of the present application is not limited.
It can be understood that, in the embodiment of the present application, a developer can know the functions of different registers by looking up the information management list, thereby avoiding that the registers with the same function are repeatedly configured by using a software module, and wasting the limited operation resources of the software module. Further, the developer can perform the related design and use according to the register update speed described in the information management list.
Specifically, in the embodiment of the present application, after the management module is used to map the registers of different sub-modules in the hardware module corresponding to the plurality of registers to different physical addresses, the following steps may be further performed: under the condition that a first register is newly added in a plurality of registers, a management module is utilized to obtain a second register, with the function similarity larger than the preset similarity, of the plurality of registers; the first register is mapped to a physical address associated with a physical address of the second register using the management module.
It can be understood that, in the embodiment of the present application, a software module configures a hardware module by using multiple registers, an increase or a decrease of the registers is inevitably introduced in the processes of a hardware module requirement increase and a version iteration, and when a new register, that is, a first register, is introduced in the multiple registers, a management module may determine, from the multiple registers, a register having a function similar to that of the first register, that is, a second register, and map the second register to a physical address associated with a physical address of the second register, for example, a physical address consecutive to the physical address of the second register, so as to solve the problem of register confusion, and thus when the software module configures register information having a function similar to that of the software module, the software module may be rapidly configured through a DMA channel, and the software configuration capability is improved.
It should be noted that, in the embodiment of the present application, the preset similarity between the first register and the first register may be preset according to an actual requirement, and the embodiment of the present application is not limited.
It should be noted that, in the embodiments of the present application, the software module may be a general-purpose integrated circuit, such as a processor, a digital signal processor, and the like. The hardware modules may be application specific integrated circuits that are manufactured for a particular user or a particular electronic system and may include hardware circuits that are capable of performing particular functions. The embodiments of the present application are not limited to specific software modules and hardware modules.
The embodiment of the application provides a software and hardware interaction method, which is applied to a software and hardware interaction device, wherein the software and hardware interaction device comprises: a management module, a software module, a hardware module, and a plurality of registers, the method comprising: determining a register hierarchical configuration strategy by using a management module; the software module is utilized to carry out hierarchical division on a plurality of registers according to a register hierarchical configuration strategy and carry out information configuration layer by layer; and reading the configuration information of the registers by using the hardware module, and completing hardware configuration according to the configuration information. According to the software and hardware interaction method provided by the embodiment of the application, the register is configured in a hierarchical mode, so that the software and hardware interaction effect is improved, and the problem of hardware failure is avoided.
The embodiment of the application provides a software and hardware interaction device. Fig. 4 is a schematic structural diagram of a software and hardware interaction apparatus according to an embodiment of the present disclosure. As shown in fig. 4, the software and hardware interaction device includes: a management module 401, a software module 402, a hardware module 403, and a plurality of registers 404;
the management module 401 is configured to determine a register hierarchical configuration policy;
the software module 402 is configured to perform hierarchical division on the plurality of registers 404 according to the register hierarchical configuration policy, and perform information configuration layer by layer;
the hardware module 403 is configured to read the configuration of the registers 404, and complete hardware configuration according to the configuration information.
In an embodiment of the present application, the management module 401 is further configured to map registers, corresponding to different sub-modules in the hardware module, in the plurality of registers to different physical addresses respectively; acquiring register parameters of each register in the plurality of registers; wherein the register parameters include at least one of: priority, update speed and function; and generating the information management list according to the physical address and the register parameter.
In an embodiment of the present application, the management module 401 is further configured to, when a first register 405 (not shown in the figure) is newly added to the software and hardware device, obtain a second register, of the plurality of registers, whose functional similarity with the first register is greater than a preset similarity; mapping the first register to a physical address associated with a physical address of the second register.
In an embodiment of the present application, the software module 402 is specifically configured to invoke a direct memory access channel to complete information configuration of at least two registers with consecutive physical addresses in the plurality of registers at one time in a process of configuring the at least two registers.
In an embodiment of the application, the management module 401 is further configured to, in the software module 402, control a configuration sequence of a corresponding register in the registers 404 according to a configuration sequence of different sub-modules in the hardware module 403 in a process of performing hierarchical division on the registers according to the register hierarchical configuration policy and performing information configuration layer by layer.
In an embodiment of the present application, the hardware module 403 is specifically configured to determine a reading speed that matches a configuration speed at which the software module 402 configures the plurality of registers 404; the configuration information of the plurality of registers 404 is read out at the read speed.
In an embodiment of the present application, the management module 401 is further configured to indicate, to the hardware module 403, reporting time and a target register when the hardware module 403 obtains reporting information; the target register is a register of the plurality of registers 404;
the hardware module 403 is further configured to report the report information to the target register according to the report time;
the software module 402 is further configured to read the reporting information from the target register.
In one embodiment of the present application, the software module 402 is a general purpose integrated circuit.
In an embodiment of the present application, the hardware module 403 is an application specific integrated circuit.
The embodiment of the application provides a software and hardware interaction device, including: the management module is used for determining a register hierarchical configuration strategy; the software module is used for carrying out hierarchical division on the registers according to a register hierarchical configuration strategy and carrying out information configuration layer by layer; and the hardware module is used for reading the configuration information of the registers and completing hardware configuration according to the configuration information. The software and hardware interaction device provided by the embodiment of the application adopts a hierarchical mode to configure the register, thereby improving the software and hardware interaction effect and avoiding the problem of hardware failure.
The embodiment of the application provides a computer readable storage medium, on which a computer program is stored, and the computer program is executed by a processor to implement the above software and hardware interaction method. The computer-readable storage medium may be a volatile Memory (volatile Memory), such as a Random-Access Memory (RAM); or a non-volatile Memory (non-volatile Memory), such as a Read-Only Memory (ROM), a flash Memory (flash Memory), a Hard Disk (Hard Disk Drive, HDD) or a Solid-State Drive (SSD); or may be a respective device, such as a mobile phone, computer, tablet device, personal digital assistant, etc., that includes one or any combination of the above-mentioned memories.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of implementations of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart block or blocks and/or flowchart block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks in the flowchart and/or block diagram block or blocks.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application are included in the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (19)
1. A software and hardware interaction method is applied to a software and hardware interaction device, and the software and hardware interaction device comprises: a management module, a software module, a hardware module, and a plurality of registers, the method comprising:
determining a register hierarchical configuration strategy by utilizing the management module;
the software module is utilized to carry out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carry out information configuration layer by layer;
and reading the configuration information of the registers by using the hardware module, and completing hardware configuration according to the configuration information.
2. The method according to claim 1, wherein before the plurality of registers are hierarchically partitioned according to the register hierarchical configuration policy and configured with information layer by layer, the method further comprises:
generating an information management list corresponding to the plurality of registers by using the management module;
and periodically updating the information management list by using the management module according to a preset interval time.
3. The method according to claim 2, wherein the generating, by the management module, an information management list corresponding to the plurality of registers comprises:
utilizing the management module to map registers corresponding to different sub-modules in the hardware module in the plurality of registers to different physical addresses respectively;
acquiring a register parameter of each register in the plurality of registers by using the management module; wherein the register parameters include at least one of: priority, update speed and function;
and generating the information management list by using the management module according to the physical address and the register parameter.
4. The method of claim 3, wherein after mapping the registers of the plurality of registers corresponding to different sub-modules of the hardware module to different physical addresses, the method further comprises:
under the condition that a first register is newly added to the software and hardware device, acquiring a second register, with the function similarity greater than a preset similarity, of the plurality of registers by using the management module;
mapping, with the management module, the first register to a physical address associated with a physical address of the second register.
5. The method according to claim 1, wherein said using the software module to perform hierarchical division and information configuration layer by layer on the plurality of registers according to the register hierarchical configuration policy includes:
and calling a direct memory access channel to complete the information configuration of at least two registers at one time by using the software module in the process of configuring at least two registers with continuous physical addresses in the plurality of registers.
6. The method of claim 1, further comprising:
and in the process that the software module carries out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carries out information configuration layer by layer, the management module is utilized to control the configuration sequence of the corresponding registers in the plurality of registers according to the configuration sequence of different sub-modules in the hardware module.
7. The method of claim 1, wherein reading out configuration information of the plurality of registers by using the hardware module comprises:
determining, with the hardware module, a read speed that matches a configuration speed at which the software module configures the plurality of registers;
and reading the configuration information of the plurality of registers by utilizing the hardware module according to the reading speed.
8. The method of claim 1, further comprising:
under the condition that the hardware module obtains the reporting information, the management module is utilized to indicate the reporting time and a target register to the hardware module; the target register is a register of the plurality of registers;
reporting the reporting information to the target register by using the hardware module according to the reporting time;
and reading the reported information from the target register by using the software module.
9. A hardware and software interaction apparatus, the apparatus comprising: a management module, a software module, a hardware module, and a plurality of registers,
the management module is used for determining a register hierarchical configuration strategy;
the software module is used for carrying out hierarchical division on the plurality of registers according to the register hierarchical configuration strategy and carrying out information configuration layer by layer;
and the hardware module is used for reading the configuration information of the registers and completing hardware configuration according to the configuration information.
10. The apparatus of claim 9,
the management module is further configured to generate an information management list corresponding to the plurality of registers; and periodically updating the information management list by using the management module according to a preset interval time.
11. The apparatus of claim 10,
the management module is further configured to map registers, corresponding to different sub-modules in the hardware module, in the plurality of registers to different physical addresses respectively; acquiring register parameters of each register in the plurality of registers; wherein the register parameters include at least one of: priority, update speed and function; and generating the information management list according to the physical address and the register parameter.
12. The apparatus of claim 11,
the management module is further configured to, when a first register is newly added to the software and hardware device, acquire a second register, of the plurality of registers, whose functional similarity to the first register is greater than a preset similarity; mapping the first register to a physical address associated with a physical address of the second register.
13. The apparatus of claim 9,
the software module is specifically configured to invoke a direct memory access channel to complete information configuration of at least two registers at one time in a process of configuring at least two registers with consecutive physical addresses in the plurality of registers.
14. The apparatus of claim 9,
the management module is further configured to, in the process that the software module performs hierarchical division on the plurality of registers according to the register hierarchical configuration policy and performs information configuration layer by layer, control a configuration sequence of a corresponding register in the plurality of registers by using the management module according to a configuration sequence of different sub-modules in the hardware module.
15. The apparatus of claim 9,
the hardware module is specifically configured to determine a reading speed that matches a configuration speed at which the software module configures the plurality of registers; and reading out the configuration information of the plurality of registers according to the reading speed.
16. The apparatus of claim 9,
the management module is further configured to indicate reporting time and a target register to the hardware module when the hardware module obtains the reporting information; the target register is a register of the plurality of registers;
the hardware module is further configured to report the report information to the target register according to the report time;
the software module is further configured to read the reporting information from the target register.
17. The apparatus of claim 9, wherein the software module is a general purpose integrated circuit.
18. The apparatus of claim 9, wherein the hardware module is an application specific integrated circuit.
19. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1 to 8.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113590344A (en) * | 2020-12-15 | 2021-11-02 | 宁波舜宇智能科技有限公司 | Interactive data processing method, device and system, electronic device and storage medium |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130167149A1 (en) * | 2011-12-26 | 2013-06-27 | International Business Machines Corporation | Register Mapping Techniques |
| CN103995687A (en) * | 2013-02-18 | 2014-08-20 | 西门子公司 | Method for transmitting register contents of a ct detector with hierarchical hardware structure and ct detector of a ct system |
| CN108062267A (en) * | 2017-11-24 | 2018-05-22 | 中国人民解放军国防科技大学 | Configurable register file self-testing method and generating device |
| CN108182303A (en) * | 2017-12-13 | 2018-06-19 | 京微齐力(北京)科技有限公司 | Programming device structure based on mixed function storage unit |
| CN108475194A (en) * | 2015-10-23 | 2018-08-31 | 弩锋股份有限公司 | Register communication in on-chip network structure |
| CN111027277A (en) * | 2019-11-12 | 2020-04-17 | 天津大学 | Software and hardware cooperation verification method |
| CN111344689A (en) * | 2017-11-14 | 2020-06-26 | 国际商业机器公司 | Bulk store and load operations for configuration status registers |
| CN111344789A (en) * | 2017-11-14 | 2020-06-26 | 国际商业机器公司 | Configuration status register based on functional affinity grouping |
-
2020
- 2020-06-29 CN CN202010607688.5A patent/CN111782271A/en not_active Withdrawn
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130167149A1 (en) * | 2011-12-26 | 2013-06-27 | International Business Machines Corporation | Register Mapping Techniques |
| CN103995687A (en) * | 2013-02-18 | 2014-08-20 | 西门子公司 | Method for transmitting register contents of a ct detector with hierarchical hardware structure and ct detector of a ct system |
| CN108475194A (en) * | 2015-10-23 | 2018-08-31 | 弩锋股份有限公司 | Register communication in on-chip network structure |
| CN111344689A (en) * | 2017-11-14 | 2020-06-26 | 国际商业机器公司 | Bulk store and load operations for configuration status registers |
| CN111344789A (en) * | 2017-11-14 | 2020-06-26 | 国际商业机器公司 | Configuration status register based on functional affinity grouping |
| CN108062267A (en) * | 2017-11-24 | 2018-05-22 | 中国人民解放军国防科技大学 | Configurable register file self-testing method and generating device |
| CN108182303A (en) * | 2017-12-13 | 2018-06-19 | 京微齐力(北京)科技有限公司 | Programming device structure based on mixed function storage unit |
| CN111027277A (en) * | 2019-11-12 | 2020-04-17 | 天津大学 | Software and hardware cooperation verification method |
Non-Patent Citations (1)
| Title |
|---|
| 杜旭;黄飞;黄建;: "基于SystemC和ISS的软硬件协同验证方法", 微计算机信息, no. 32 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113590344A (en) * | 2020-12-15 | 2021-11-02 | 宁波舜宇智能科技有限公司 | Interactive data processing method, device and system, electronic device and storage medium |
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