CN111756456A - PLC channel impulse noise detection method and system by utilizing offset - Google Patents

PLC channel impulse noise detection method and system by utilizing offset Download PDF

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Publication number
CN111756456A
CN111756456A CN202010769621.1A CN202010769621A CN111756456A CN 111756456 A CN111756456 A CN 111756456A CN 202010769621 A CN202010769621 A CN 202010769621A CN 111756456 A CN111756456 A CN 111756456A
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sequence
signal sequence
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calculation formula
signal
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翟明岳
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Guangdong University of Petrochemical Technology
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • H04B17/309Measuring or estimating channel quality parameters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/30Monitoring; Testing of propagation channels
    • H04B17/309Measuring or estimating channel quality parameters
    • H04B17/345Interference values

Abstract

The embodiment of the invention discloses a PLC channel impulse noise detection method and a system by utilizing offset, wherein the method comprises the following steps: step 101, acquiring a signal sequence S acquired according to a time sequence; step 102, obtaining N signal differential delay sequences; step 103, obtaining N DFT coefficient sequences; 104, obtaining N normalized DFT coefficient sequences; step 105, obtaining N central frequency offsets; step 106, obtaining a judgment threshold value; step 107 detects PLC impulse noise.

Description

PLC channel impulse noise detection method and system by utilizing offset
Technical Field
The invention relates to the field of communication, in particular to a method and a system for detecting pulse noise of a PLC channel.
Background
Compared with various wired communication technologies, the power line communication has the advantages of no need of rewiring, easiness in networking and the like, and has wide application prospect. The power line communication technology is divided into Narrowband over power line (NPL) and Broadband over power line (BPL); the narrow-band power line communication refers to a power line carrier communication technology with the bandwidth limited between 3k and 500 kHz; the power line communication technology includes a prescribed bandwidth (3148.5kHz) of european CENELEC, a prescribed bandwidth (9490kHz) of the Federal Communications Commission (FCC) in the united states, a prescribed bandwidth (9450kHz) of the Association of Radio Industries and Businesses (ARIB) in japan, and a prescribed bandwidth (3500kHz) in china. The narrow-band power line communication technology mainly adopts a single carrier modulation technology, such as a PSK technology, a DSSS technology, a Chirp technology and the like, and the communication speed is less than 1 Mbits/s; the broadband power line communication technology refers to a power line carrier communication technology with a bandwidth limited between 1.630MHz and a communication rate generally above 1Mbps, and adopts various spread spectrum communication technologies with OFDM as a core.
Although power line communication systems are widely used and the technology is relatively mature, a large number of branches and electrical devices in the power line communication system generate a large amount of noise in the power line channel; random impulse noise has high randomness and high noise intensity, and seriously damages a power line communication system, so that the technology for inhibiting the random impulse noise is always the key point for the research of scholars at home and abroad; and the noise model does not fit into a gaussian distribution. Therefore, the traditional communication system designed aiming at the gaussian noise is not suitable for a power line carrier communication system any more, and a corresponding noise suppression technology must be researched to improve the signal-to-noise ratio of the power line communication system, reduce the bit error rate and ensure the quality of the power line communication system. In practical applications, some simple non-linear techniques are often applied to eliminate power line channel noise, such as Clipping, Blanking and Clipping/Blanking techniques, but these research methods must work well under a certain signal-to-noise ratio, and only the elimination of impulse noise is considered, in the power line communication system, some commercial power line transmitters are characterized by low transmission power, and in some special cases, the transmission power may be even lower than 18w, so that in some special cases, the signal will be submerged in a large amount of noise, resulting in a low signal-to-noise ratio condition of the power line communication system.
Disclosure of Invention
With the application and popularization of nonlinear electrical appliances, background noise in a medium and low voltage power transmission and distribution network presents obvious non-stationarity and non-Gaussian characteristics, pulse noise becomes more common and more serious, and to filter the pulse noise, the pulse noise is detected first, and then corresponding measures can be further taken, but the existing method and system lack sufficient attention on the detection of the pulse noise.
The invention aims to provide a PLC channel impulse noise detection method and a system by utilizing offset. The method has better robustness and simpler calculation.
In order to achieve the purpose, the invention provides the following scheme:
a PLC channel impulse noise detection method using offset comprises the following steps:
step 101, acquiring a signal sequence S acquired according to a time sequence;
step 102, obtaining N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure BDA0002616098500000021
Is calculated by the formula
Figure BDA0002616098500000022
Wherein, k is a frequency delay parameter and the calculation formula is
Figure BDA0002616098500000023
Figure BDA0002616098500000024
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure BDA0002616098500000025
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
step 103, obtaining N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
step 104, obtaining N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure BDA0002616098500000026
Step 105, obtaining N center frequency offsets, specifically: k central frequency offsetThe displacement is recorded as HkThe calculation formula is
Figure BDA0002616098500000027
Wherein the content of the first and second substances,
Figure BDA0002616098500000028
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is the center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure BDA0002616098500000029
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure BDA00026160985000000210
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
step 106, obtaining a judgment threshold specifically as follows: the judgment threshold is recorded as0The calculation formula is
Figure BDA00026160985000000211
Step 107, detecting the PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
A PLC channel impulse noise detection system using an offset, comprising:
the module 201 acquires a signal sequence S acquired in time sequence;
the module 202 obtains N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure BDA00026160985000000212
Is calculated by the formula
Figure BDA00026160985000000213
Wherein, k is a frequency delay parameter and the calculation formula is
Figure BDA00026160985000000214
Figure BDA00026160985000000215
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure BDA00026160985000000216
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
the module 203 calculates N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
the module 204 calculates N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure BDA0002616098500000031
The module 205 calculates N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure BDA0002616098500000032
Wherein the content of the first and second substances,
Figure BDA0002616098500000033
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N;f0is the center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure BDA0002616098500000034
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure BDA0002616098500000035
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
the module 206 calculates a judgment threshold, specifically: the judgment threshold is recorded as0The calculation formula is
Figure BDA0002616098500000036
The module 207 detects PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
with the application and popularization of nonlinear electrical appliances, background noise in a medium and low voltage power transmission and distribution network presents obvious non-stationarity and non-Gaussian characteristics, pulse noise becomes more common and more serious, and to filter the pulse noise, the pulse noise is detected first, and then corresponding measures can be further taken, but the existing method and system lack sufficient attention on the detection of the pulse noise.
The invention aims to provide a PLC channel impulse noise detection method and a system by utilizing offset. The method has better robustness and simpler calculation.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIG. 1 is a schematic flow diagram of the process of the present invention;
FIG. 2 is a schematic flow chart of the system of the present invention;
FIG. 3 is a flow chart illustrating an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
FIG. 1 is a flow chart illustrating a PLC channel impulse noise detection method using offset
Fig. 1 is a flow chart illustrating a PLC channel impulse noise detection method using an offset according to the present invention. As shown in fig. 1, the method for detecting impulse noise of a PLC channel using an offset specifically includes the following steps:
step 101, acquiring a signal sequence S acquired according to a time sequence;
step 102, obtaining N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure BDA0002616098500000041
Is calculated by the formula
Figure BDA0002616098500000042
Wherein, k is a frequency delay parameter and the calculation formula is
Figure BDA0002616098500000043
Figure BDA0002616098500000044
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure BDA0002616098500000045
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
step 103, obtaining N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
step 104, obtaining N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure BDA0002616098500000046
Step 105, obtaining N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure BDA0002616098500000047
Wherein the content of the first and second substances,
Figure BDA0002616098500000048
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is the letterThe center frequency of the number sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure BDA0002616098500000049
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure BDA00026160985000000410
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
step 106, obtaining a judgment threshold specifically as follows: the judgment threshold is recorded as0The calculation formula is
Figure BDA00026160985000000411
Step 107, detecting the PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
FIG. 2 is a structural view of a PLC channel impulse noise detection system using an offset
Fig. 2 is a schematic structural diagram of a PLC channel impulse noise detection system using an offset according to the present invention. As shown in fig. 2, the PLC channel impulse noise detection system using an offset includes the following structures:
the module 201 acquires a signal sequence S acquired in time sequence;
the module 202 obtains N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure BDA0002616098500000051
Is calculated by the formula
Figure BDA0002616098500000052
Wherein, k is a frequency delay parameter and the calculation formula is
Figure BDA0002616098500000053
Figure BDA0002616098500000054
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure BDA0002616098500000055
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
the module 203 calculates N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
the module 204 calculates N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure BDA0002616098500000056
The module 205 calculates N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure BDA0002616098500000057
Wherein the content of the first and second substances,
Figure BDA0002616098500000058
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is the center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure BDA0002616098500000059
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure BDA00026160985000000510
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
the module 206 calculates a judgment threshold, specifically: the judgment threshold is recorded as0The calculation formula is
Figure BDA00026160985000000511
The module 207 detects PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
The following provides an embodiment for further illustrating the invention
FIG. 3 is a flow chart illustrating an embodiment of the present invention. As shown in fig. 3, the method specifically includes the following steps:
step 301, acquiring a signal sequence S acquired according to a time sequence;
step 302 is to obtain N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure BDA00026160985000000512
Is calculated by the formula
Figure BDA00026160985000000513
Wherein, k is a frequency delay parameter and the calculation formula is
Figure BDA00026160985000000514
Figure BDA00026160985000000515
Representing the modulo-rounding operation by N, snr being the semaphoreSignal-to-noise ratio of the signal sequence S, N being the length of said signal sequence S, SiIs the ith element of the signal sequence S;
Figure BDA00026160985000000516
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
step 303 finds N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
step 304, obtaining N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure BDA0002616098500000061
Step 305 finds N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure BDA0002616098500000062
Wherein the content of the first and second substances,
Figure BDA0002616098500000063
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is the center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure BDA0002616098500000064
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure BDA0002616098500000065
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, n;
Step 306, calculating a judgment threshold, specifically: the judgment threshold is recorded as0The calculation formula is
Figure BDA0002616098500000066
Step 307, detecting PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is simple because the system corresponds to the method disclosed by the embodiment, and the relevant part can be referred to the method part for description.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.

Claims (2)

1. A PLC channel impulse noise detection method using offset is characterized by comprising the following steps:
step 101, acquiring a signal sequence S acquired according to a time sequence;
step 102, obtaining N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure FDA0002616098490000014
Is calculated by the formula
Figure FDA0002616098490000011
Wherein, k is a frequency delay parameter and the calculation formula is
Figure FDA0002616098490000012
Figure FDA0002616098490000013
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure FDA00026160984900000115
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
step 103, obtaining N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
step 104, obtaining N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure FDA0002616098490000015
Step 105, obtaining N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure FDA00026160984900000113
Wherein the content of the first and second substances,
Figure FDA00026160984900000114
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is that it isThe center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure FDA0002616098490000017
Wherein Δ f is the sampling frequency of the signal sequence S;
Figure FDA0002616098490000016
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
step 106, obtaining a judgment threshold specifically as follows: the judgment threshold is recorded as0The calculation formula is
Figure FDA0002616098490000018
Step 107, detecting the PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
2. A PLC channel impulse noise detection system using an offset, comprising:
the module 201 acquires a signal sequence S acquired in time sequence;
the module 202 obtains N signal differential delay sequences, specifically: the nth signal differential delay sequence is recorded as Delta SnThe ith element is marked as
Figure FDA00026160984900000111
Is calculated by the formula
Figure FDA00026160984900000112
Wherein, k is a frequency delay parameter and the calculation formula is
Figure FDA0002616098490000019
Figure FDA00026160984900000110
Representing the operation of modulo upper rounding by N, snr is the signal-to-noise ratio of the signal sequence S, N is the length of the signal sequence S, and SiIs the ith element of the signal sequence S;
Figure FDA0002616098490000027
is the i-kappa Y of the signal sequence SNAn element; i is the element serial number, and the value range is i ═ 1,2, ·, n; n is a sequence number, and the value range of N is 1,2, ·, N;
the module 203 calculates N DFT coefficient sequences, specifically: the nth DFT coefficient sequence is denoted as fnThe calculation formula is fn=DFT[ΔSn](ii) a Wherein DFT represents discrete fourier transform;
the module 204 calculates N normalized DFT coefficient sequences, specifically: the nth normalized DFT coefficient sequence is denoted as pnThe calculation formula is
Figure FDA0002616098490000021
The module 205 calculates N center frequency offsets, specifically: the k-th center frequency offset is denoted as HkThe calculation formula is
Figure FDA0002616098490000022
Wherein the content of the first and second substances,
Figure FDA0002616098490000023
for the nth normalized DFT coefficient sequence pnThe kth element of (1); k is the serial number of DFT element, and the value range is k is 1,2,. cndot.N; f. of0Is the center frequency of the signal sequence S; j. the design is a square0Is a frequency deviation adjustment factor, and the calculation formula is
Figure FDA0002616098490000024
Wherein Δ f isThe sampling frequency of the signal sequence S;
Figure FDA0002616098490000025
for the nth normalized DFT coefficient sequence pnM is a summation parameter, and the value range of m is 1,2, ·, n;
the module 206 calculates a judgment threshold, specifically: the judgment threshold is recorded as0The calculation formula is
Figure FDA0002616098490000026
The module 207 detects PLC impulse noise, specifically: if the k-th center frequency offset HkGreater than or equal to the judgment threshold0Detecting impulse noise at the kth point of the signal sequence S; otherwise, no impulse noise is detected at the kth point of the signal sequence S.
CN202010769621.1A 2020-08-04 2020-08-04 PLC channel impulse noise detection method and system by utilizing offset Withdrawn CN111756456A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112165342A (en) * 2020-11-09 2021-01-01 华北电力大学 Noise detection method and system by using mode feature vector
CN112649675A (en) * 2020-12-17 2021-04-13 深圳供电局有限公司 PLC (programmable logic controller) anomaly detection method based on electromagnetic side channel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112165342A (en) * 2020-11-09 2021-01-01 华北电力大学 Noise detection method and system by using mode feature vector
CN112649675A (en) * 2020-12-17 2021-04-13 深圳供电局有限公司 PLC (programmable logic controller) anomaly detection method based on electromagnetic side channel

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Application publication date: 20201009