CN111695162A - Device for generating a PUF signature - Google Patents
Device for generating a PUF signature Download PDFInfo
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- CN111695162A CN111695162A CN201910189870.0A CN201910189870A CN111695162A CN 111695162 A CN111695162 A CN 111695162A CN 201910189870 A CN201910189870 A CN 201910189870A CN 111695162 A CN111695162 A CN 111695162A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/73—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by creating or determining hardware identification, e.g. serial numbers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
Abstract
The invention provides a device for generating a PUF signature, comprising a PUF basic cell, an analog-to-digital converter and a calculation cell, wherein: the PUF basic unit comprises a plurality of resistance devices and a current source for providing current for the resistance devices, the resistance devices are included in equipment to generate the PUF characteristic code, and the resistance value of each resistance device changes along with the change of process factors; the analog-to-digital converter acquires analog voltage values at two ends of each resistor device and converts the analog voltage values at two ends of each resistor device into digital voltage code values; the calculation unit determines respective resistance code values of the plurality of resistance devices based on the voltage code values, calculates an average value of the resistance code values, and generates a PUF signature code of the apparatus based on a magnitude relationship between the resistance code value of each resistance device and the average value. The apparatus for generating the PUF pattern according to the present invention may be selected from a working circuit inherent in a device, and has high secrecy in generating the PUF pattern, and the generated PUF pattern 0/1 is balanced and has high security.
Description
Technical Field
The invention relates to the technical field of information security, in particular to a device for generating a Physical Unclonable Function (PUF) feature code.
Background
The best secret key for identifying a device is the key calculated using the PUF signature. PUFs are based on physical properties that are randomly generated during the production and manufacture of devices, making these characteristics unique to each device due to small uncontrolled random variations in the manufacturing process. Although these variations cannot be predetermined or controlled, if they can be measured in sufficiently low noise or are sufficiently stable, these measurements can be used to construct the device-specific private key.
PUFs are biometric features of inanimate devices that resemble a human fingerprint or retina. As with twins that are "made" from the same DNA but have unique fingerprints, the inherent PUF of an inanimate object made using the same blueprint process is also unique. Perfect cloning is practically impossible to a certain extent due to unavoidable small variations, and PUFs offer advantages by taking advantage of this fact.
For a device, when generating a PUF signature, the PUF signature is required to have uniqueness, immobility, and high productivity. In addition, PUF signatures are required to be highly covert. In the prior art, a PUF generation circuit is typically provided in a device for generating a PUF pattern for the device. For example, a PUF generation circuit in a Static Random Access Memory (SRAM) is a circuit that is single in structure and high in repeatability, has high identifiability, and is very disadvantageous when a device is used in the field of information security.
Disclosure of Invention
The invention provides a device for generating a PUF signature, the device comprising a PUF basic cell, an analog-to-digital converter and a calculation unit, wherein: the PUF basic unit comprises a plurality of resistance devices and a current source for providing current for the resistance devices, the resistance devices are included in equipment to be generated with PUF feature codes, and the resistance value of each resistance device changes along with the change of process factors; the analog-to-digital converter acquires analog voltage values at two ends of each resistor device and converts the analog voltage values at two ends of each resistor device into digital voltage code values; the calculation unit determines respective resistance code values of the plurality of resistance devices based on the voltage code values, calculates a mean value of the resistance code values, and generates a PUF feature code of the apparatus based on a magnitude relationship between the resistance code value of each of the resistance devices and the mean value.
In an embodiment of the invention, the computing unit is further configured to: adding the mean to the PUF signature.
In an embodiment of the invention, the computing unit is further configured to: calculating a standard deviation of the resistance code values of the plurality of resistance devices and adding the standard deviation to the PUF signature.
In an embodiment of the invention, the computing unit is further configured to: adding a code to the PUF signature code representing at least one of: whether a resistance code value greater than a standard maximum value exists in the resistance code values; whether a resistance code value smaller than a standard minimum value exists in the resistance code values; whether the standard deviation of the resistance code value meets a criterion.
In an embodiment of the invention said PUF elementary cell comprises a plurality of PUF sub-cells, each of said PUF sub-cells comprising one of said resistance devices and one of said current sources.
In one embodiment of the invention, said PUF elementary cell comprises a plurality of PUF sub-cells, each of said PUF sub-cells comprising one of said resistance devices, said plurality of PUF sub-cells sharing one of said current sources.
In an embodiment of the present invention, each of the PUF sub-cells further includes a switch, one end of the switch is connected to the resistance device, and the other end of the switch is connected to the analog-to-digital converter.
In one embodiment of the invention, the resistive device is a device having a switching function.
In one embodiment of the present invention, the resistive device is an N-well resistive device or an NMOS transistor.
In an embodiment of the invention, the apparatus is comprised in the device to generate the PUF signature.
The device for generating the PUF characteristic code provided by the invention constructs the PUF characteristic code based on the resistance device of which the resistance value changes along with the change of process factors, and has higher concealment in the generation of the PUF characteristic code because the resistance device can be selected from the inherent working circuit in equipment. In addition, the apparatus for generating the PUF feature code provided by the present invention generates the PUF feature code based on the magnitude relationship between the resistance code values of the plurality of resistance devices and the average value thereof, so that the generated PUF feature code 0/1 is balanced and has higher security.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
fig. 1 shows an exemplary block diagram of an apparatus for generating a PUF signature according to an embodiment of the present invention;
figure 2 shows an exemplary circuit diagram of a PUF subunit in an apparatus for generating a PUF signature according to an embodiment of the present invention;
figure 3 shows another exemplary circuit diagram of a PUF subunit in an apparatus for generating a PUF signature according to an embodiment of the present invention; and
figure 4 shows a further exemplary circuit diagram of a PUF subunit in an apparatus for generating a PUF signature according to an embodiment of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In order to provide a thorough understanding of the present invention, detailed steps and detailed structures will be set forth in the following description in order to explain the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
Fig. 1 shows an exemplary block diagram of an apparatus 100 for generating a PUF signature according to an embodiment of the present invention. As shown in fig. 1, the apparatus 100 for generating a PUF signature comprises a PUF basic unit 110, an analog-to-digital converter 120 and a calculation unit 130. The PUF basic cell 110 includes a plurality of resistance devices included in an apparatus to generate a PUF signature code, each of the resistance devices having a resistance value that varies according to a process factor, and a current source that supplies a current to the resistance devices. The analog-to-digital converter 120 obtains an analog voltage value across each of the resistor devices and converts the analog voltage value across each of the resistor devices into a digital voltage code value. The calculation unit 130 determines respective resistance code values of the plurality of resistance devices based on the voltage code values, calculates a mean value of the resistance code values, and generates a PUF feature code of the apparatus based on a magnitude relationship between the resistance code value of each of the resistance devices and the mean value.
In an embodiment of the invention, the plurality of resistive devices comprised by the PUF elementary cell 110 may come from an intrinsic working circuit in the device in which the PUF signature is to be generated, without special provisions. Furthermore, the current source comprised by the PUF elementary unit 110 may also come from an intrinsic working circuit in the device in which the PUF signature is to be generated, or may also be provided in addition.
In an embodiment of the present invention, a PUF signature of an apparatus is constructed based on a plurality of resistance devices (e.g., N, where N is a positive integer) included in the apparatus to generate the PUF signature, the resistance values of which have randomness due to randomness of process factors, the plurality of resistance devices being included in the apparatus to generate the PUF signature. Based on this, the current source is adopted to provide the same current for the resistance devices, so that the voltage values at two ends of the resistance devices have randomness. Wherein, the voltage value at two ends of the resistance device can be understood as: the voltage value at one end of the resistive device is grounded while the other end is grounded. Further, under the current provided by the current source, the voltage values at two ends of the resistance devices are unique and stable, i.e. have a fixed property.
In an embodiment of the invention, the PUF elementary cell 110 may comprise a plurality of PUF sub-cells, each of which may comprise one of said resistance devices and one of said current sources, such as one of the PUF sub-cells 200 shown in fig. 2. In this embodiment, the current source in each PUF subunit 200 may be coupled to one end of a resistive device, the other end of which may be connected to a reference supply terminal (e.g., ground GND). In addition, the end of the resistive device coupled to the current source may be coupled to the analog-to-digital converter 120 to obtain the voltage value across the resistive device by the analog-to-digital converter 120. Further, each PUF subunit 200 may also include a switch, and the terminal of the resistor device coupled to the current source may be coupled to one terminal of the switch, the other terminal of the switch being connected to the analog-to-digital converter 120. When the PUF feature code needs to be generated, the switch of each PUF subunit 200 may be controlled to be turned on, so that the analog-to-digital converter 120 obtains the voltage value of the resistance device; when the PUF signature does not need to be generated, the switch of each PUF subunit 200 can be controlled to be turned off, which is advantageous for maintaining the stability of the operating circuit in the device including the plurality of resistance devices.
In another embodiment of the present invention, the PUF elementary cell 110 may comprise a plurality of PUF sub-cells, each of which may comprise one of said resistance devices, said plurality of PUF sub-cells sharing one of said current sources, such as one PUF sub-cell 300 as shown in fig. 3. In this embodiment, one terminal of the resistor device in each PUF subunit 300 is connected to a reference power terminal (e.g., ground), and the other terminals are commonly coupled to the same current source. In addition, the end of the resistive device coupled to the current source may be coupled to the analog-to-digital converter 120 to obtain the voltage value across the resistive device by the analog-to-digital converter 120. Further, each PUF subunit 300 may further include a switch, one end of the resistor device is connected to a reference power source terminal (e.g., ground), the other end of the resistor device is coupled to one end of the switch, and the other end of the switch is coupled to the shared current source and the analog-to-digital converter 120. When the PUF feature code needs to be generated, the switch of each PUF subunit 300 may be controlled to be turned on, so that the current source provides current for the resistance devices of the PUF subunit 300, and the analog-to-digital converter 120 obtains voltage values of the resistance devices; and when the PUF signature does not need to be generated, the switch of each PUF subunit 300 can be controlled to be turned off, which is advantageous for maintaining the stability of the operating circuit in the device including the plurality of resistive devices.
In yet another embodiment of the present invention, the aforementioned resistance device may be a device (e.g., an N-well resistance device or an NMOS transistor) having a switching function, and thus, one end of the resistance device of each PUF sub-unit is connected to a reference power source terminal (e.g., ground), and the other end is coupled to a shared current source and the analog-to-digital converter 120, such as one PUF sub-unit 400 shown in fig. 4. In this embodiment, the functions of the resistance device and the switch are combined, and the resistance device itself has the switching function.
Referring back to fig. 1, the voltage value across each resistor of the PUF basic cell 110 may be sequentially input to the analog-to-digital converter 120, and the analog-to-digital converter 120 may convert the analog voltage value across each resistor into a digital voltage code value based on a preset threshold. Illustratively, the preset threshold may be one or more. When the preset threshold is one, for example, the preset threshold is V0, a voltage value greater than the preset threshold V0 may be converted into a voltage code value of 1, a voltage value less than the preset threshold V0 may be converted into a voltage code value of 0, and a voltage value equal to the preset threshold V0 may be converted into a voltage code value of 1 or a voltage code value of 0, which may be preset. When the preset threshold is plural, for example, the preset threshold includes V1, V2, V3 and V4, where V1< V2< V3< V4, and the minimum value and the maximum value among the voltage values of the plural resistance devices are Vmin and Vmax, the following comparison interval may be formed: [ Vmin, V1), [ V1, V2), [ V2, V3), [ V3, V4), [ V4, Vmax ]; the analog-to-digital converter 120 may convert the voltage values falling into the above-mentioned intervals into the voltage code values of-2, -1, 0, 1 and 2, respectively, or the analog-to-digital converter 120 may convert the voltage values falling into the above-mentioned intervals into the voltage code values of 0, 1, 2, 3 and 4, respectively; alternatively, the adc 120 may convert the voltage values falling into the above-mentioned intervals into binary representations of the voltage code values 0, 1, 2, 3 and 4, respectively, the number of bits of the binary representations may depend on the resolution of the adc 120, for example, if the adc 120 is a 4-bit adc, the voltage values falling into the above-mentioned intervals are converted into the voltage code values 0000, 0001, 0010, 0011 and 0100, respectively. This is only a simple example for convenience of description, the number of bits of the analog-to-digital converter in practical application may be more, the number of the preset thresholds may also be more, and the mode of converting into the voltage code value may also be any other suitable coding mode, which may be configured according to practical situations. Based on the above description, the analog-to-digital converter 120 may convert the voltage value across each resistance device into a voltage code value to output to the calculation unit 130.
In the embodiment of the present invention, the voltage code value output by the analog-to-digital converter 120 may represent the resistance of the resistor device, because the input voltage value of the analog-to-digital converter 120 is the current value of the current source and the resistance value of the resistor device, and the output voltage code value has a certain conversion relationship with the input voltage value, the output voltage code value may represent the magnitude of the input voltage value, that is, the magnitude of the resistance value of the resistor device. For example, for a 10-bit, 1.8V full-stroke analog-to-digital converter, the input voltage value is 1.8 (2 × output code value)/(2 × full-stroke maximum code value). Therefore, it is possible to obtain an input voltage value corresponding to the voltage code value based on the voltage code value output by the analog-to-digital converter 120, and obtain a resistance code value of the resistance device corresponding to the input voltage value. In one example, the voltage code value output by the analog-to-digital converter 120 can also be directly regarded as the resistance code value of the corresponding resistance device. Based on this, the calculation unit 130 may determine the resistance code values of the respective plurality of resistance devices.
After obtaining the resistance code value of each resistance device, the calculation unit 130 may calculate an average value of the resistance code values of the plurality of resistance devices, and generate the PUF feature code based on a magnitude relationship between the resistance code value of each resistance device and the average value. For example, the number of the resistance devices is N, and is R1 to RN, if the resistance code value of R1 is smaller than the average value, then code 0 is generated; if the resistance code value of R2 is greater than the mean, then code 1 is generated; the code values for R3 to RN, and so on; in addition, for the resistance device whose resistance code value is equal to the average value, it may be encoded as 0, or may be encoded as 1, which may be set in advance. Of course, this is merely exemplary, and other encoding schemes are possible. In a word, the resistance code value of each resistance device is compared with the average value to obtain one code value, and the resistance code values of the N resistance devices are sequentially compared with the average value to obtain N code values. If the coding mode in the above example is adopted, the PUF feature code with N bits can be obtained. The PUF signature generated based on a comparison of the resistance code values of the plurality of resistance devices with their average value may enable a more balanced comparison of code values (e.g., 0/1) in the generated PUF signature, resulting in a higher security of the PUF signature.
In a further embodiment of the invention, the calculation unit 130 may also add the mean value to the PUF signature. That is, for the above-mentioned N-bit PUF signature, a mean value may also be added to the PUF signature, for example, a form of a binary code of the mean value may be added to the PUF signature, and the number of bits of the binary code may be the same as the number of bits of the resistance code value, for example.
In a further embodiment of the present invention, the calculation unit 130 may further calculate a standard deviation of the resistance code values of the plurality of resistance devices and add the standard deviation to the PUF signature. That is, for the above-mentioned N-bit PUF signature, a standard deviation may also be added to the PUF signature, for example, a form of a binary code of the standard deviation may be added to the PUF signature, and the number of bits of the binary code may be the same as the number of bits of the resistance code value, for example.
In a further embodiment of the invention, the calculation unit 130 may also add a code to the PUF signature that represents at least one of: whether a resistance code value greater than a standard maximum value exists among the resistance code values of the plurality of resistance devices; whether a resistance code value smaller than a standard minimum value exists in the resistance code values of the plurality of resistance devices; whether a standard deviation of resistance code values of the plurality of resistance devices satisfies a standard. For example, if there is a resistance code value larger than the standard maximum value among the resistance code values of the plurality of resistance devices, code 1 may be added to the previously generated PUF feature code, and if there is no resistance code value larger than the standard maximum value among the resistance code values of the plurality of resistance devices, code 0 may be added to the previously generated PUF feature code; if the resistance code values of the plurality of resistance devices have the resistance code values smaller than the standard minimum value, adding a code 1 into the generated PUF feature code, and if the resistance code values of the plurality of resistance devices do not have the resistance code values smaller than the standard minimum value, adding a code 0 into the generated PUF feature code; if the standard deviation of the resistance code values of the plurality of resistance devices satisfies the standard, a code 1 may be further added to the generated PUF signature, and if the standard deviation of the resistance code values of the plurality of resistance devices does not satisfy the standard, a code 0 may be further added to the generated PUF signature. The standard that the standard maximum value, the standard minimum value and the standard deviation satisfy may be values that are recorded and stored in a memory (e.g., a ROM) after the wafer is manufactured, or values that are generated based on the values.
The calculation unit 130 may encode one or more of the above-mentioned further embodiments in a PUF signature, which may enable the generated PUF signature to embody whether a device (or die) comprising the plurality of resistive devices is produced from a regular manufacturer or whether it is a bad device (or die). Conversely, if the PUF signature exhibits a mean, a standard deviation, a maximum, a minimum, etc. of a plurality of resistance devices that satisfy the criteria, the PUF signature may also be considered as a criterion for a Wafer Acceptance Test (WAT).
Based on the above description, the apparatus for generating a PUF signature according to the present invention constructs a PUF signature based on resistive devices having resistance values that vary according to process factors, and has high imperceptibility in generating the PUF signature because the resistive devices may be selected from intrinsic operating circuits in a device. Further, the apparatus for generating the PUF feature code provided by the present invention may be integrally included in a device to generate the PUF feature code, so that the apparatus not only has high imperceptibility when generating the PUF feature code, but also does not need to specially provide a PUF generation circuit in the device, thereby facilitating miniaturization of the device. In addition, the apparatus for generating the PUF feature code provided by the present invention generates the PUF feature code based on the magnitude relationship between the resistance code values of the plurality of resistance devices and the average value thereof, so that the generated PUF feature code 0/1 is balanced and has higher security. Further, the apparatus for generating the PUF feature code provided by the present invention can also consider the WAT standard when generating the PUF feature code, so that the generated PUF feature code can embody more secure and standard information.
Although the foregoing example embodiments have been described with reference to the accompanying drawings, it is to be understood that the foregoing example embodiments are merely illustrative and are not intended to limit the scope of the invention thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as set forth in the appended claims.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the invention and aiding in the understanding of one or more of the various inventive aspects. However, the method of the present invention should not be construed to reflect the intent: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
It will be understood by those skilled in the art that all of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where such features are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.
The above description is only for the specific embodiment of the present invention or the description thereof, and the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and the changes or substitutions should be covered within the protection scope of the present invention. The protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. An apparatus for generating a PUF signature, the apparatus comprising a PUF base unit, an analog-to-digital converter, and a computation unit, wherein:
the PUF basic unit comprises a plurality of resistance devices and a current source for providing current for the resistance devices, the resistance devices are included in equipment to be generated with PUF feature codes, and the resistance value of each resistance device changes along with the change of process factors;
the analog-to-digital converter acquires analog voltage values at two ends of each resistor device and converts the analog voltage values at two ends of each resistor device into digital voltage code values;
the calculation unit determines respective resistance code values of the plurality of resistance devices based on the voltage code values, calculates a mean value of the resistance code values, and generates a PUF feature code of the apparatus based on a magnitude relationship between the resistance code value of each of the resistance devices and the mean value.
2. The apparatus of claim 1, wherein the computing unit is further configured to: adding the mean to the PUF signature.
3. The apparatus of claim 1, wherein the computing unit is further configured to: calculating a standard deviation of the resistance code values of the plurality of resistance devices and adding the standard deviation to the PUF signature.
4. The apparatus of claim 1, wherein the computing unit is further configured to: adding a code to the PUF signature code representing at least one of:
whether a resistance code value greater than a standard maximum value exists in the resistance code values;
whether a resistance code value smaller than a standard minimum value exists in the resistance code values;
whether the standard deviation of the resistance code value meets a criterion.
5. The apparatus of claim 1, wherein the PUF elementary cell comprises a plurality of PUF sub-cells, each of the PUF sub-cells comprising one of the resistance devices and one of the current sources.
6. The apparatus of claim 1, wherein the PUF elementary cell comprises a plurality of PUF sub-cells, each of the PUF sub-cells comprising one of the resistance devices, the plurality of PUF sub-cells sharing one of the current sources.
7. The apparatus according to claim 5 or 6, wherein each of said PUF sub-units further comprises a switch, one end of said switch being connected to said resistive device and the other end of said switch being connected to said analog-to-digital converter.
8. The apparatus of claim 5 or 6, wherein the resistive device is a device having a switching function.
9. The apparatus of claim 8, wherein the resistive device is an N-well resistive device or an NMOS transistor.
10. The apparatus according to claim 1, wherein the apparatus is comprised in the device where the PUF signature is to be generated.
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| CN105184191A (en) * | 2015-08-12 | 2015-12-23 | 苏州芯动科技有限公司 | Reconfigurable physical unclonable functional circuit |
| CN108875418A (en) * | 2017-05-12 | 2018-11-23 | 中芯国际集成电路制造(上海)有限公司 | The generation method of PUF characteristic value and device with PUF |
| CN108880818A (en) * | 2017-05-16 | 2018-11-23 | 三星电子株式会社 | The unclonable functional circuit of physics, system and integrated circuit with this function |
| CN109428713A (en) * | 2017-08-31 | 2019-03-05 | 中芯国际集成电路制造(上海)有限公司 | The method of circuit structure and acquisition PUF value for PUF |
| US10103895B1 (en) * | 2017-10-13 | 2018-10-16 | Macronix International Co., Ltd. | Method for physically unclonable function-identification generation and apparatus of the same |
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