CN111682927A

CN111682927A - Message synchronization method, device, equipment and medium based on MLAG environment

Info

Publication number: CN111682927A
Application number: CN202010343952.9A
Authority: CN
Inventors: 万红明; 刘斌
Original assignee: Inspur Cisco Networking Technology Co Ltd
Current assignee: Inspur Cisco Networking Technology Co Ltd
Priority date: 2020-04-27
Filing date: 2020-04-27
Publication date: 2020-09-18
Anticipated expiration: 2040-04-27
Also published as: CN111682927B

Abstract

The embodiment of the application discloses a message synchronization method, a device, equipment and a medium based on an MLAG environment, which comprises the following steps: when first equipment sends a table item request message to second equipment and the second equipment sends a table item response message to third equipment, the third equipment analyzes the table item response message and determines a target MAC address of the table item response message, wherein the first equipment and the third equipment belong to members of the same MLAG environment, and the target MAC address of the table item response message is the first equipment; and when determining that the destination MAC address of the entry response message is different from the MAC address of the third device, the third device sends the entry response message to the first device according to the destination MAC address of the entry response message, so that the first device performs learning operation on the entry response message.

Description

Message synchronization method, device, equipment and medium based on MLAG environment

Technical Field

The present application relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a medium for message synchronization based on an MLAG environment.

Background

In the MLAG environment shown in fig. 1, device a and device B establish an MLAG environment through Peerlink links, where MLAG member port 2 performs link aggregation with port 1 and port 2 of device C together, and establishes link aggregation group AGG1, and MLAG member port 3 forms aggregation group AGG2 with port 1 and port 2 of device D together. If the access device a sends a request message to the accessed device C (server side) through the MLAG member port 2, but the device C may send a response message to the device B from another member port 2 of the aggregation group AGG1 due to the load sharing mechanism of link aggregation, so that the device a cannot receive and process the request message.

Disclosure of Invention

In view of this, embodiments of the present application provide a message synchronization method, apparatus, device and medium based on an MLAG environment, so as to solve the problem in the prior art that a device sending a request message cannot receive a corresponding response message due to a load sharing mechanism of link aggregation in the MLAG environment.

The embodiment of the application adopts the following technical scheme:

the embodiment of the application provides a message synchronization method based on an MLAG environment, and the method comprises the following steps:

when first equipment sends a table item request message to second equipment and the second equipment sends a table item response message to third equipment, the third equipment analyzes the table item response message and determines a target MAC address of the table item response message, wherein the first equipment and the third equipment belong to members of the same MLAG environment, and the target MAC address of the table item response message is the first equipment;

and when determining that the destination MAC address of the entry response message is different from the MAC address of the third device, the third device sends the entry response message to the first device according to the destination MAC address of the entry response message, so that the first device performs learning operation on the entry response message.

Further, the sending the entry response packet to the first device so that the first device performs a learning operation on the entry response packet specifically includes:

and the third equipment encapsulates the table item response message into an MLAG synchronous message, and sends the MLAG synchronous message to the first equipment through a Peerlink, so that the first equipment can analyze the table item response message according to the MLAG synchronous message, send the table item response message to a corresponding protocol control layer, and perform learning operation on the table item response message.

Further, before sending the entry response packet to the first device according to the destination MAC address of the entry response packet, the method further includes:

and the third equipment sends the table item response message to a corresponding protocol control layer and executes learning operation on the table item response message so as to ensure that the table items of the same MLAG member are kept consistent.

Further, the entry request message includes an arp entry request message, and the entry response message includes an arp entry response message.

when the third device is restarted after power failure and the first device detects that the Peerlink link route is disconnected and reconnected, the first device triggers all address resolution protocol table entries under all MLAG member ports to perform aging updating, so that the first device can resend the address resolution protocol table entry request message to the second device.

Further, when the third device determines that the destination MAC address of the entry response packet is the same as the MAC address of the third device, the method further includes:

and the third equipment sends the table entry response message to a corresponding protocol control layer, performs learning operation on the table entry response message, and does not need to execute the step of sending the table entry response message to the first equipment, wherein the MAC address is a virtual MAC address.

Further, the MLAG synchronization packet includes a protocol version number, a packet type, and a packet content.

The embodiment of the present application further provides a packet synchronization apparatus based on an MLAG environment, where the apparatus includes:

the system comprises an analysis unit and a processing unit, wherein the analysis unit is used for analyzing a table entry response message and determining a destination MAC address of the table entry response message when first equipment sends the table entry request message to second equipment and the second equipment sends the table entry response message to third equipment, wherein the first equipment and the third equipment belong to the same MLAG member, and the destination MAC address of the table entry response message is the first equipment;

and the synchronizing unit is used for sending the table entry response message to the first equipment according to the destination MAC address of the table entry response message when the third equipment determines that the destination MAC address of the table entry response message is different from the MAC address of the third equipment, so that the first equipment can perform learning operation on the table entry response message.

An embodiment of the present application further provides a message synchronization apparatus based on an MLAG environment, where the apparatus includes:

at least one processor; and the number of the first and second groups,

a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,

the memory stores instructions executable by the at least one processor to enable the at least one processor to:

An embodiment of the present application further provides a message synchronization medium based on an MLAG environment, in which a computer-executable instruction is stored, where the computer-executable instruction is set as:

The embodiment of the application adopts at least one technical scheme which can achieve the following beneficial effects: when the first device sends the table entry request message to the second device and the second device sends the table entry response message to the third device, the third device of the embodiment of the application synchronizes the table entry response message to the first device when determining that the destination MAC address of the table entry response message is different from the MAC address of the third device, so that the first device performs a learning operation on the table entry response message.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

fig. 1 is a schematic structural diagram of an MLAG environment proposed in the background art;

fig. 2 is a schematic flowchart of a message synchronization method based on an MLAG environment according to an embodiment of the present disclosure;

fig. 3 is a schematic flowchart of a message synchronization method based on an MLAG environment according to a second embodiment of the present specification;

fig. 4 is a schematic flowchart of a restart of a device with power down according to a second embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of an MLAG synchronization packet format according to a second embodiment of the present disclosure;

fig. 6 is a schematic structural diagram of a packet synchronization apparatus based on an MLAG environment according to a third embodiment of this specification.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that, the MLAG (Multi-Chassis LAG, Multi-Chassis link aggregation) technology is a cross-device link aggregation technology, two access devices (which may be switches) keep the entries of the two devices consistent through multiple entries such as Peerlink link synchronization ARP, and the two access devices perform LACP link aggregation negotiation with the accessed device in the same information and state, and the accessed device may use the two access devices as one device to establish a link aggregation relationship. The cross-device link aggregation mechanism can be used as a logical link aggregation group to realize link aggregation among multiple devices. In order to ensure the effectiveness of the MLAG mechanism, multiple entries of the access device must be synchronized, and the embodiments of the present specification take ARP entries as an example for description, and the existing methods directly encapsulate all ARP entries into an MLAG synchronization message, and then send the MLAG synchronization message to the opposite device through a Peerlink link, and the opposite device receives the synchronization message through the Peerlink link, analyzes out the ARP entries in the message, and directly executes the operation of writing the entries, so as to achieve the ARP entry synchronization of the MLAG master device and the MLAG slave device. The address Resolution protocol (arp) is a TCP/IP protocol for acquiring a physical address according to an IP address.

However, the direct synchronization of the ARP entry cannot perform the entire ARP learning process, that is, the entire ARP learning process from the time when the device receives the ARP entry response message to the time when the device passes the ARP control layer to operate the protocol state machine cannot be performed, and particularly in the special environment of MLAG, some abnormal problems may occur because some other actions may be triggered during the operation of the ARP control layer, for example, local related software information update (routing table information, ARP related soft table information, etc.), arpansections, and some other protocol control modules related to ARP may also be triggered to perform specific actions, and if the device does not perform the normal ARP learning process, the direct synchronization of the ARP entry may cause these additional actions to be not performed. In addition, compatibility between different versions may not be achieved.

In addition, in the prior art, if a device in the MLAG environment receives a response packet, and the device has not sent a request packet for the response packet, or a destination MAC address of the response packet is not the device, the device may discard the response packet, so that the synchronization of the table entries cannot be achieved.

Further, if the device characteristics in the MLAG environment are changed to accept and learn all the response messages, although the ARP entry synchronization can be realized, if the device is attacked by a large number of different response messages, the device will learn a large number of useless ARP entries, and the ARP entries of the device are easily written to full.

Link Aggregation (Link Aggregation) is a computer network term, which refers to aggregating a plurality of physical ports together to form a logical port, so as to implement load sharing of the throughput of the ingress/egress traffic on each member port, and a device determines from which member port a packet (which may be a packet) is sent to a device at an opposite end according to a port load sharing policy configured by a user. When the device detects that the link of one member port has a fault, the device stops sending packets on the port, recalculates the sending port of the message in the rest links according to the load sharing strategy, and the fault port is used as the receiving and sending port again after being recovered. Link aggregation is an important technology in terms of increasing link bandwidth, implementing link transmission resilience, engineering redundancy, and the like.

The role of the Peerlink is as follows: the DFS Group protocol message is transmitted; the method is used for transmitting the synchronous message, including MAC table entry, ARP table entry and the like; the method is used for forwarding non-M-LAG member port traffic crossing devices or M-LAG single-homing member port traffic under a fault scene.

The technical solutions provided by the embodiments of the present application are described in detail below with reference to the accompanying drawings.

Fig. 2 is a schematic flowchart of a message synchronization method based on an MLAG environment provided in an embodiment of this specification, which specifically includes:

step S101, when a first device sends a table item request message to a second device and the second device sends a table item response message to a third device, the third device analyzes the table item response message and determines a destination MAC address of the table item response message, wherein the first device and the third device belong to members of the same MLAG environment, and the destination MAC address of the table item response message is the first device.

Step S102, when it is determined that the destination MAC address of the entry response packet is different from the MAC address of the third device, the third device sends the entry response packet to the first device according to the destination MAC address of the entry response packet, so that the first device performs a learning operation on the entry response packet.

It should be noted that the first device may correspond to the device a in fig. 1, the second device may correspond to the device C in fig. 1, and the third device may correspond to the device B in fig. 1.

When the first device sends the table entry request message to the second device and the second device sends the table entry response message to the third device, the third device of the embodiment of the application synchronizes the table entry response message to the first device when determining that the destination MAC address of the table entry response message is different from the MAC address of the third device, so that the first device performs a learning operation on the table entry response message.

Correspondingly to the embodiment of the present specification, fig. 3 is a schematic flowchart of a message synchronization method based on an MLAG environment provided in a second embodiment of the present specification, and specifically includes:

step S201, when a first device sends a table item request message to a second device and the second device sends a table item response message to a third device, the third device analyzes the table item response message and determines a destination MAC address of the table item response message, wherein the first device and the third device belong to members of the same MLAG environment, and the destination MAC address of the table item response message is the first device;

step S202, the third device sends the entry response packet to a corresponding protocol control layer, and performs a learning operation on the entry response packet, so as to ensure that entries of the same MLAG member are consistent.

Step S203, when it is determined that the destination MAC address of the entry response packet is different from the MAC address of the third device, the third device sends the entry response packet to the first device according to the destination MAC address of the entry response packet, so that the first device performs a learning operation on the entry response packet.

Further, the entry request message includes an address resolution protocol entry request message, and the entry response message includes an address resolution protocol entry response message.

Further, before the executing step sends the entry response message to the first device according to the destination MAC address of the entry response message, the method further includes:

if the third device is restarted after power failure, and the first device detects that the Peerlink link route is disconnected and reconnected, the first device triggers all address resolution protocol table entries under all MLAG member ports to perform aging updating, so that the first device resends the address resolution protocol table entry request message to the second device.

It should be noted that, if the third device loses power, referring to fig. 4, an entry (which may be an ARP entry) on the third device (in fig. 4, device B) may be lost, the Peerlink link between the first device and the third device is disconnected, and the Peerlink connection may also be automatically lost. In order to ensure that all ARP table entries of the equipment A can be automatically resynchronized after the equipment B is restarted after power failure, when the equipment A detects the Peerlink successful connection again, the equipment A automatically triggers the ARP table entries on all MLAG member ports to carry out aging updating, the aging updating triggers all the ARP table entries to resend an ARP request message (ARPrequest), and the batch synchronization of the messages is carried out after the ARP response message is received, so that all the ARP response messages (ARPreply) of the equipment A can still be synchronized in time after the equipment B is restarted.

ARP aging update mechanism: each ARP list item has an aging time of NUM seconds, when the aging time is 0, an ARP request message can be automatically sent, if an ARP response message can be received, the ARP list item is reserved, the aging time is reset to NUM seconds, otherwise, the ARP list item is deleted.

The aging updating triggered by the first device can cause a large number of ARP table entries to be detected again, namely all ARP table entries under the MLAG member port can send ARP request messages again, and at the moment, a large number of ARP response messages are received regularly and need to be synchronized. Encapsulating MLAG synchronization packet format see fig. 5. There are three situations, one of which is that the second device sends all ARP reply messages to the third device, and at this time, the third device synchronizes these reply messages to the first device again, so that it executes a complete ARP learning process, and the third device also needs to actively learn these ARP entries, thereby ensuring that the ARP entries between the master device and the slave device are consistent. And secondly, all the ARP response messages are sent to the first equipment by the second equipment, at the moment, the first equipment can learn the ARP table items by itself, and meanwhile, the ARP response messages are synchronously sent to the slave equipment B through Peerlink, so that the ARP table items under the ports of the main MLAG members are kept consistent. Thirdly, the second device sends a part of ARP response message to the first device, and a part of ARP response message is sent to the third device, at the moment, the first device can learn the ARP list items, and meanwhile, the ARP response message is synchronously sent to the third device through Peerlink; the third equipment can learn the ARP table items by itself, and simultaneously, the ARP response message is synchronously sent to the first equipment through Peerlink, so that the consistency of the ARP table items under MLAG member ports is ensured.

The sync message encapsulation content may contain the following information:

and the protocol Version number is used for identifying the M-LAG Version operated by the dual-homing device.

Message Type, which identifies the Type of the Message, hello Message or synchronous Message.

And Sub Type, if the message is a synchronous message, indicating the message Type, ARP, igmp and the like.

Data: the original message content, len is the message length, and value is the message content received by the hardware driver, and includes a driver header (a packet receiving port number, vlan, vrf, etc. used for the protocol control layer to execute the message processing flow) and message information.

and the third equipment sends the table item response message to a corresponding protocol control layer, performs learning operation on the table item response message, and does not need to send the table item response message to the first equipment, wherein the MAC address can be a VRRP virtual MAC address. The Virtual Router Redundancy Protocol (VRRP) is a routing protocol proposed by IETF for solving the single point failure phenomenon in configuring a static gateway in a local area network

It should be noted that, in the MLAG networking environment, the ARP table entry can be synchronized by executing a complete ARP learning process, which is equivalent to the fact that the device itself receives the packet and executes the ARP learning process, so that some extra work of the protocol control layer in the ARP learning process can be executed, such as updating the routing table information, updating the ARP related soft table information, triggering other protocol layer actions, and the like, and thus, the protocol security and stability are higher, and it is ensured that any extra work related to the ARP learning process is not missed.

It should be noted that, taking fig. 1 as an example, if the accessed device D pings the device C across network segments, the device D sends an ARP request message to the device C via the device B, if the device C sends a responded ARP reply message to the device a, the device a synchronizes the message to the device B, and the device B forwards the message to the accessed device C, even if the device a cannot send the received ARP reply message back to the device D, the device D may also learn the ARP entry.

It should be noted that, in the embodiments of the present description, synchronizing ARP reply messages, regardless of the same device processing mode of any version, is easier to implement compatibility between versions, and after receiving an ARP reply message, an opposite end (MLAG networking environment) synchronizes to its own entry according to message information.

Corresponding to the second embodiment of this specification, fig. 6 is a schematic structural diagram of a packet synchronization apparatus based on an MLAG environment provided in the third embodiment of this specification, and specifically includes:

the analysis unit 1 is configured to, when a first device sends a table entry request packet to a second device and the second device sends a table entry response packet to a third device, analyze the table entry response packet by the third device, and determine a destination MAC address of the table entry response packet, where the first device and the third device belong to the same MLAG member, and the destination MAC address of the table entry response packet is the first device.

The synchronization unit 2 is configured to, when it is determined that the destination MAC address of the entry response packet is different from the MAC address of the third device, send the entry response packet to the first device according to the destination MAC address of the entry response packet, so that the first device performs a learning operation on the entry response packet.

at least one processor; and the number of the first and second groups,

In the 90 s of the 20 th century, improvements in a technology could clearly distinguish between improvements in hardware (e.g., improvements in circuit structures such as diodes, transistors, switches, etc.) and improvements in software (improvements in process flow). However, as technology advances, many of today's process flow improvements have been seen as direct improvements in hardware circuit architecture. Designers almost always obtain the corresponding hardware circuit structure by programming an improved method flow into the hardware circuit. Thus, it cannot be said that an improvement in the process flow cannot be realized by hardware physical modules. For example, a Programmable Logic Device (PLD), such as a Field Programmable Gate Array (FPGA), is an integrated circuit whose Logic functions are determined by programming the Device by a user. A digital system is "integrated" on a PLD by the designer's own programming without requiring the chip manufacturer to design and fabricate application-specific integrated circuit chips. Furthermore, nowadays, instead of manually making an integrated Circuit chip, such Programming is often implemented by "logic compiler" software, which is similar to a software compiler used in program development and writing, but the original code before compiling is also written by a specific Programming Language, which is called Hardware Description Language (HDL), and HDL is not only one but many, such as abel (advanced Boolean Expression Language), ahdl (alternate Language Description Language), traffic, pl (core unified Programming Language), HDCal, JHDL (Java Hardware Description Language), langue, Lola, HDL, laspam, hardsradware (Hardware Description Language), vhjhd (Hardware Description Language), and vhigh-Language, which are currently used in most common. It will also be apparent to those skilled in the art that hardware circuitry that implements the logical method flows can be readily obtained by merely slightly programming the method flows into an integrated circuit using the hardware description languages described above.

The controller may be implemented in any suitable manner, for example, the controller may take the form of, for example, a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro) processor, logic gates, switches, an Application Specific Integrated Circuit (ASIC), a programmable logic controller, and an embedded microcontroller, examples of which include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320, the memory controller may also be implemented as part of the control logic for the memory. Those skilled in the art will also appreciate that, in addition to implementing the controller as pure computer readable program code, the same functionality can be implemented by logically programming method steps such that the controller is in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Such a controller may thus be considered a hardware component, and the means included therein for performing the various functions may also be considered as a structure within the hardware component. Or even means for performing the functions may be regarded as being both a software module for performing the method and a structure within a hardware component.

The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. One typical implementation device is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission medium which can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.

The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A message synchronization method based on MLAG environment is characterized in that the method comprises the following steps:

2. The message synchronization method based on the MLAG environment according to claim 1, wherein the sending the entry response message to the first device so that the first device performs a learning operation on the entry response message specifically comprises:

3. The message synchronization method based on the MLAG environment according to claim 1, wherein before sending the entry response message to the first device according to the destination MAC address of the entry response message, the method further comprises:

4. The message synchronization method based on the MLAG environment according to claim 2, wherein the entry request message comprises an arp entry request message, and the entry response message comprises an arp entry response message.

5. The message synchronization method based on the MLAG environment according to claim 4, wherein before sending the entry response message to the first device according to the destination MAC address of the entry response message, the method further comprises:

6. The message synchronization method based on the MLAG environment according to claim 1, wherein when the third device determines that the destination MAC address of the entry response message is the same as its own MAC address, the method further comprises:

7. The MLAG environment-based message synchronization method of claim 2, wherein the MLAG synchronization message comprises protocol version number, message type and message content.

8. A message synchronization device based on MLAG environment is characterized in that the device comprises:

9. A message synchronization device based on MLAG environment is characterized in that the device comprises:

at least one processor; and the number of the first and second groups,

10. A message synchronization medium based on MLAG environment, storing computer-executable instructions, wherein the computer-executable instructions are configured to: