CN111682849A - Anti-interference method, medium, device and anti-interference transmission system - Google Patents

Anti-interference method, medium, device and anti-interference transmission system Download PDF

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Publication number
CN111682849A
CN111682849A CN202010442906.4A CN202010442906A CN111682849A CN 111682849 A CN111682849 A CN 111682849A CN 202010442906 A CN202010442906 A CN 202010442906A CN 111682849 A CN111682849 A CN 111682849A
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signal
interference
pulse
frequency conversion
frequency
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CN111682849B (en
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罗九兵
胡建伟
吴伟江
王立龙
胡如波
王新成
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Fuzhou Rockchip Electronics Co Ltd
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Fuzhou Rockchip Electronics Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16Multiple-frequency-changing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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  • Power Engineering (AREA)
  • Noise Elimination (AREA)

Abstract

The invention provides an anti-interference method, a medium, a device and an anti-interference transmission system, wherein the anti-interference method comprises the following steps: receiving a carrier signal; the carrier signal comprises at least two pulse signals; when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted; and generating a frequency conversion signal according to the counting result. The invention improves the anti-interference capability of the frequency conversion signal transmission by detecting the pulse number of the carrier frequency in the timing time, and more accurately restores the transmitted frequency conversion signal.

Description

Anti-interference method, medium, device and anti-interference transmission system
Technical Field
The invention belongs to the technical field of frequency conversion signal processing, relates to a processing method during frequency conversion signal transmission, and particularly relates to an anti-interference method, a medium, a device and an anti-interference transmission system.
Background
At present, in a frequency conversion signal transmission system, transmission of a variable frequency signal can be realized by transmitting a rising edge (or a falling edge), but the interference resistance is weak. When the interference pulse signal occurs, the received frequency is suddenly changed, so that the frequency signal is distorted. Specifically, as shown in fig. 1, the source signal is an F1 signal, which is converted into a pulse signal TX, and after signal transmission, the RX signal in phase is received, and if the RX signal is subjected to a Noise signal (Noise), the RX signal is restored to a frequency signal, which becomes an F2 signal, and the Noise signal (Noise) correspondingly generates an F2 high level, resulting in signal distortion.
Therefore, how to provide an anti-interference method, medium, device and anti-interference transmission system to solve the defects that the prior art cannot accurately recover the transmitted frequency-converted signal, and the like, is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an anti-interference method, medium, device and anti-interference transmission system, which are used to solve the problem that the prior art cannot recover the transmitted frequency-converted signal more accurately.
To achieve the above and other related objects, an aspect of the present invention provides an anti-interference method, including: receiving a carrier signal; the carrier signal comprises at least two pulse signals; when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted; and generating a frequency conversion signal according to the counting result.
In an embodiment of the present invention, the step of counting the pulse signals and generating the frequency-variable signals according to the counting result includes: after starting timing, setting a timing signal to be high level/low level; the high level/low level continuous time period and the period of the carrier signal need to meet a preset numerical relationship; counting the pulse signals in the time period of the high level/low level duration, and judging whether the counting result is greater than or equal to 2; if so, setting the frequency conversion signal to be at a high level; if not, the number of the pulse signal counts is set to 0, and the frequency conversion signal is set to low level.
In an embodiment of the invention, after the timing is finished, the timing signal is set to a low level/a high level, and the timing signal is set to a high level/a low level again until the pulse signal is acquired next time.
In an embodiment of the present invention, the predetermined numerical relationship is: the high level/low level duration time period is greater than or equal to the product of the number of pulse signals and the period of the carrier signal.
Another aspect of the invention provides a medium having stored thereon a computer program which, when executed by a processor, implements the interference rejection method.
In another aspect, the present invention provides an anti-interference apparatus, including: a processor and a memory; the memory is used for storing computer programs, and the processor is used for executing the computer programs stored by the memory so as to enable the anti-interference device to execute the anti-interference method.
In a final aspect, the present invention provides an anti-interference transmission system, including: the frequency conversion signal transmitting device is used for taking a frequency conversion signal to be transmitted as a source signal and carrying out signal modulation on the source signal to generate a carrier signal; the carrier signal comprises at least two pulse signals; the pulse signal transmission module is connected with the variable frequency signal sending device and used for transmitting the carrier signal; the anti-interference device is connected with the pulse signal transmission module and used for receiving a carrier signal; when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted; and generating a frequency conversion signal according to the counting result.
In an embodiment of the present invention, the frequency-variable signal transmitting apparatus changes the signal frequency of the source signal into the carrier frequency of the carrier signal through signal modulation; the number of the pulse signals is 2n-1, wherein n is greater than or equal to 2.
In an embodiment of the present invention, the pulse signal transmission module is a coupling device; the coupling device is used for transmitting the pulse signal from the frequency conversion signal sending device to the anti-interference device in an isolated mode.
As described above, the anti-interference method, medium, device and anti-interference transmission system according to the present invention have the following advantages:
the anti-interference capability of frequency conversion signal transmission is improved by detecting the number of pulses of the carrier frequency within the timing time, and the transmitted frequency conversion signal is restored more accurately. As long as the carrier frequency is much larger than the signal frequency, the influence of the delay count caused by the interference signal is small, i.e. the interference resistance is strong enough. For the occasion of source signal frequency change, the receiving end can completely restore the frequency signal.
Drawings
Fig. 1 is a timing diagram of a prior art transmission of a frequency-converted signal.
Fig. 2 is a schematic flow chart of an anti-interference method according to an embodiment of the present invention.
FIG. 3 is a timing diagram illustrating an anti-interference processing of the frequency-converted signal according to an embodiment of the anti-interference method of the present invention.
FIG. 4 is a timing diagram illustrating the anti-jamming processing of the frequency-converted signals according to another embodiment of the anti-jamming method of the present invention.
Fig. 5 is a schematic structural connection diagram of an anti-jamming device according to an embodiment of the present invention.
Fig. 6 is a schematic circuit diagram of an embodiment of the interference rejection transmission system according to the present invention.
Description of the element reference numerals
5 anti-interference device
51 processor
52 memory
53 communication interface
54 system bus
S21-S23
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The invention provides an anti-interference method, which improves the anti-interference capability of frequency conversion signal transmission by detecting the number of pulses of carrier frequency in a timing time and more accurately restores the transmitted frequency conversion signal.
The principle and implementation of an anti-interference method, medium, apparatus and anti-interference transmission system according to the present embodiment will be described in detail below with reference to fig. 2 to 7, so that those skilled in the art can understand the anti-interference method, medium, apparatus and anti-interference transmission system according to the present embodiment without creative work.
Please refer to fig. 2, which is a schematic flowchart illustrating an anti-interference method according to an embodiment of the present invention. The anti-interference method is applied to the frequency conversion signal receiving device. The frequency conversion signal to be transmitted is converted into a pulse signal through signal modulation, and the pulse signal is transmitted to the frequency conversion signal receiving device through the pulse signal transmission module by the frequency conversion signal transmitting device. As shown in fig. 2, the anti-interference method specifically includes the following steps:
s21, receiving a carrier signal; the carrier signal comprises at least two pulse signals.
In the present embodiment, the signal frequency of the source signal is changed into the carrier frequency of the carrier signal through signal modulation; the number of the pulse signals is 2n-1, wherein n is greater than or equal to 2.
S22, when the first pulse signal is detected, timing is started and the pulse signals are counted.
It should be noted that the detection modes in the pulse signal counting include, but are not limited to, rising edge detection, falling edge detection, and level detection.
And S23, generating a frequency conversion signal according to the counting result.
In one embodiment, S23 includes:
(1) after the start of the timer, the timing signal is set to high level.
(2) And counting the pulse signals in the high-level continuous time period, and judging whether the counting result is greater than or equal to 2.
(3) If so, setting the frequency conversion signal to be at a high level; if not, the number of the pulse signal counts is set to 0, and the frequency conversion signal is set to low level.
In this embodiment, after the end of the timing, the timing signal is set to a low level, and the timing signal is set to a high level again until the next time the pulse signal is acquired.
In another embodiment, S23 includes:
(1) after the start of the timer, the timing signal is set to a low level.
(2) And counting the pulse signals in the time period of the low level duration, and judging whether the counting result is greater than or equal to 2.
(3) If so, setting the frequency conversion signal to be at a high level; if not, the number of the pulse signal counts is set to 0, and the frequency conversion signal is set to low level.
In this embodiment, after the end of the timing, the timing signal is set to the high level, and the timing signal is set to the low level again until the next time the pulse signal is acquired.
It should be noted that the duration of the high level/low level and the period of the carrier signal need to satisfy a preset numerical relationship; when the pulse signal is counted, the timing signal may be set to a high level to count for a period in which the high level continues, or may be set to a low level to count for a period in which the low level continues.
Further, the preset numerical relationship is as follows: the high level/low level continuous time period is greater than or equal to the product of the number of pulse signals and the period of the carrier signal, so that at least two pulse signals are included in the high level/low level continuous time period; specifically, the duration time of the high level/low level is more than or equal to n/Fmod, wherein n is more than or equal to 2, Fmod is a carrier frequency, 1/Fmod is the period of a carrier signal, and n/Fmod represents that the duration time of the high level/low level is more than or equal to n periods of the carrier signal.
Fig. 3 is a timing chart of the anti-interference processing of the frequency-converted signal according to the anti-interference method of the present invention. As shown in fig. 3, the source signal is F1, and is converted into a pulse signal TX, the TX signal does not transmit a single pulse signal, and the number of transmitted pulses is greater than or equal to (2 n-1); the RX signal also receives the pulse signal in phase, and if the interference signal (Noise) is received, it is shown in fig. 3. At a receiving end, when receiving a pulse signal, starting a One-shot timer which is a One-shot mode timer, and when the timing signal (Toneshot signal) is at a high level, counting and receiving n (n is more than or equal to 2) pulse signals, setting a high F2 signal; if n pulse signals are not accumulated in a high stage of the timing signal (Toneshot signal), the counter is reset after the timing signal (Toneshot signal) becomes a low level, and the F2 signal is not set high. The timing signal (Toneshot signal) will be reset and clocked the next time the pulse signal is received.
Please refer to fig. 4, which shows a timing chart of the anti-interference processing of the frequency-converted signal according to another embodiment of the anti-interference method of the present invention. As shown in fig. 4, if the interference signal (Noise) arrives at a time just before the TX signal is transmitted, the timing signal (Toneshot signal) is set high, and if the RX receives the true (n-1) th pulse signal (or accumulates less than n pulses) when the timing signal (Toneshot signal) is just low, the F2 signal cannot be set high. However, the timing signal (Toneshot signal) will continue to go high when the next pulse signal is received, and the number of remaining pulses m ≧ 2n-1) - (n-1), i.e., m ≧ n. The F2 signal may also be made high. As long as the carrier frequency Fmod is much greater than the signal frequency, the effect of the delay due to the above causes is small.
It should be noted that, during the transmission of the frequency conversion signal, an interference signal occurs due to an ESD (Electro-Static discharge) test or a surge phenomenon, and a condition of an interference pulse signal occurs most commonly, so that the accuracy of the transmission of the frequency conversion signal is greatly improved by providing an anti-interference method for the interference pulse signal.
The protection scope of the anti-interference method of the present invention is not limited to the execution sequence of the steps listed in this embodiment, and all the schemes of adding, subtracting, and replacing steps in the prior art according to the principles of the present invention are included in the protection scope of the present invention.
The present embodiment provides a computer storage medium having stored thereon a computer program which, when executed by a processor, implements the tamper-resistant method.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the above method embodiments may be performed by hardware associated with a computer program. The aforementioned computer program may be stored in a computer readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned computer-readable storage media comprise: various computer storage media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Fig. 5 is a schematic structural connection diagram of an anti-jamming device according to an embodiment of the present invention. As shown in fig. 5, the present embodiment provides an anti-interference apparatus 5, where the anti-interference apparatus 5 may be a hardware circuit for receiving a variable frequency signal and resisting interference, which is designed by a logic gate, a trigger, a capacitor, a resistor, a diode, and the like, so as to save the design cost of the anti-interference apparatus or improve the integration level of a circuit applied by the anti-interference apparatus; or the existing integrated 51 singlechip, STM32 singlechip, etc. When the anti-jamming device 5 is a single chip microcomputer, the anti-jamming device 5 includes: a processor 51, memory 52, communication interface 53, or/and system bus 54; the memory 52 and the communication interface 53 are connected to the processor 51 through a system bus 54 and perform communication with each other, the memory 52 is used for storing computer programs, the communication interface 53 is used for communicating with other anti-jamming devices, and the processor 51 is used for running the computer programs to enable the anti-jamming device 5 to execute the steps of the anti-jamming method.
The system bus 54 may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The system bus may be divided into an address bus, a data bus, a control bus, and the like. The communication interface 53 is used to enable communication between the database access device and other tamper resistant devices (e.g., clients, read-write libraries, and read-only libraries). The Memory 52 may include a Random Access Memory (RAM), and may further include a non-volatile Memory (non-volatile Memory), such as at least one disk Memory.
The Processor 51 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components.
The anti-interference transmission system of the invention comprises: frequency conversion signal sending device, pulse signal transmission module and anti jamming unit.
The frequency conversion signal sending device is used for taking a frequency conversion signal to be sent as a source signal and carrying out signal modulation on the source signal to generate a carrier signal; the carrier signal comprises at least two pulse signals.
The pulse signal transmission module is connected with the variable frequency signal sending device and is used for transmitting the carrier signal.
The anti-interference device is a variable frequency signal receiving device, is connected with the pulse signal transmission module and is used for receiving a carrier signal; when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted; and generating a frequency conversion signal according to the counting result.
In this embodiment, the variable frequency signal transmitting apparatus changes the signal frequency of the source signal into the carrier frequency of the carrier signal through signal modulation; the number of the pulse signals is 2n-1, wherein n is greater than or equal to 2.
In this embodiment, the pulse signal transmission module is a coupling device; the coupling device is used for transmitting the pulse signal from the frequency conversion signal sending device to the anti-interference device in an isolated mode. The coupling device is preferably a coupling inductor, and may also be an optical coupler or other coupling device capable of realizing frequency conversion signal isolation transmission.
Fig. 7 is a schematic circuit diagram of an interference rejection transmission system according to an embodiment of the invention. The anti-interference transmission system is applied to a synchronous rectification flyback converter circuit, and is preferably applied to a synchronous rectification isolation flyback converter. As shown in fig. 7, C1 is an energy storage capacitor at an input end, R1, C2 and D1 form a primary side leakage inductance energy absorption circuit, P1 is a switching tube of a flyback converter, R2 is a current sampling resistor of a primary side loop, T1 is a transformer of the flyback converter, P2 is a secondary side synchronous rectifier, C3 is an energy storage capacitor at an output end, R3 is secondary side loop current sampling, and R4 and R5 are output voltage sampling.
Specifically, the input voltage V is connected in parallel across the capacitor C1 in fig. 7INThe anode of the capacitor C1 is connected to one end of a capacitor C2, one end of a resistor R1 and a first end of a transformer T1, the other end of the capacitor C2 and the other end of a resistor R1 are connected to the cathode of a diode D1, the anode of a diode D1 is connected to the second end of a transformer T1 and the source of a switch tube P1, the gate of the switch tube P1 is connected to an anti-interference device, the drain of the switch tube P1 is connected to one end of a resistor R2, the other end of the resistor R2 is connected to the primary side ground, the third end of the transformer T1 is connected to one end of a capacitor C3, the fourth end of the transformer T1 is connected to the drain of a switch tube P2, and the switch tube P2 isThe source is connected with the other end of the capacitor C3 and one end of the resistor R3, two ends of the resistor R3 are connected with the variable-frequency signal transmitting device, the grid of the switch tube P2 is connected with the variable-frequency signal transmitting device, one end of the capacitor C3 is connected with one end of the resistor R4, the other end of the resistor R4 is connected with one end of the resistor R5 and the variable-frequency signal transmitting device, and the other end of the resistor R5 is connected with the ground of the secondary side.
Specifically, in fig. 7, the anti-interference device is a frequency conversion signal receiving end or receiving end, and is a primary side control device, and is mainly used for controlling a switching tube P1 of the flyback converter. The frequency conversion signal transmitting device in fig. 7 is a secondary side control device, and is mainly used for controlling a P2 switching tube during synchronous rectification. The frequency conversion signal sending device converts a frequency conversion signal to be sent into a pulse signal through signal modulation, the pulse signal of the pulse signal sending end is transmitted to a pulse signal receiving end of the anti-interference device through a pulse signal transmission module, and the anti-interference device executes the anti-interference method to restore frequency information of the frequency conversion signal to be sent.
In summary, the anti-interference method, medium, device and anti-interference transmission system of the present invention improve the anti-interference capability of the transmission of the frequency conversion signal by detecting the number of pulses of the carrier frequency within the timing time, and more accurately recover the transmitted frequency conversion signal. As long as the carrier frequency is much larger than the signal frequency, the influence of the delay count caused by the interference signal is small, i.e. the interference resistance is strong enough. For the occasion of source signal frequency change, the receiving end can completely restore the frequency signal. The invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (9)

1. An interference rejection method, comprising:
receiving a carrier signal; the carrier signal comprises at least two pulse signals;
when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted;
and generating a frequency conversion signal according to the counting result.
2. The interference rejection method according to claim 1, wherein said pulse signals are counted, and the step of generating a frequency-converted signal according to the counted result comprises:
after starting timing, setting a timing signal to be high level/low level; the high level/low level continuous time period and the period of the carrier signal need to meet a preset numerical relationship;
counting the pulse signals in the time period of the high level/low level duration, and judging whether the counting result is greater than or equal to 2;
if so, setting the frequency conversion signal to be at a high level; if not, the number of the pulse signal counts is set to 0, and the frequency conversion signal is set to low level.
3. The method of claim 2, further comprising:
and after the timing is finished, setting the timing signal to be at a low level/a high level, and setting the timing signal to be at the high level/the low level again until the pulse signal is acquired next time.
4. The method of claim 2, further comprising:
the preset numerical value relationship is as follows: the high level/low level duration time period is greater than or equal to the product of the number of pulse signals and the period of the carrier signal.
5. A medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the tamper resistant method of any one of claims 1 to 4.
6. An interference rejection device, comprising: a processor and a memory;
the memory is configured to store a computer program, and the processor is configured to execute the computer program stored by the memory to cause the tamper resistant device to perform the tamper resistant method according to any one of claims 1 to 4.
7. An interference-resistant transmission system, comprising:
the frequency conversion signal transmitting device is used for taking a frequency conversion signal to be transmitted as a source signal and carrying out signal modulation on the source signal to generate a carrier signal; the carrier signal comprises at least two pulse signals;
the pulse signal transmission module is connected with the variable frequency signal sending device and used for transmitting the carrier signal;
the anti-interference device is connected with the pulse signal transmission module and used for receiving a carrier signal; when a first pulse signal is detected, timing is started, and meanwhile, the pulse signal is counted; and generating a frequency conversion signal according to the counting result.
8. The antijam transmission system of claim 7, wherein:
the frequency conversion signal transmitting device changes the signal frequency of the source signal into the carrier frequency of the carrier signal through signal modulation; the number of the pulse signals is 2n-1, wherein n is greater than or equal to 2.
9. The antijam transmission system of claim 7, wherein:
the pulse signal transmission module is a coupling device; the coupling device is used for transmitting the pulse signal from the frequency conversion signal sending device to the anti-interference device in an isolated mode.
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