CN111675192A - Deep silicon cavity etching method of micro-system module - Google Patents
Deep silicon cavity etching method of micro-system module Download PDFInfo
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- 238000005530 etching Methods 0.000 title claims abstract description 150
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 44
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 44
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- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000007493 shaping process Methods 0.000 claims abstract description 10
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- 238000009279 wet oxidation reaction Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 238000012360 testing method Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00301—Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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Abstract
The invention discloses a deep silicon cavity etching method of a micro-system module, which specifically comprises the following steps: 101) a preliminary etching step, 102) a preliminary shaping step, 103) an etching stop layer step; the invention provides a deep silicon cavity etching method for efficiently manufacturing a micro-system module, which can solve the problems of structural precision and structural defects.
Description
Technical Field
The invention relates to the field of semiconductor packaging, in particular to an etching method for a deep silicon cavity in a radio frequency micro-system module with a chip embedded in a silicon adapter plate.
Background
With the development of silicon-based micro-electro-mechanical systems (MEMS) and radio frequency through silicon vias (RF TSVs), the three-dimensional heterogeneous integrated microsystem technology becomes an important development direction for the next generation of military highly integrated electronic systems. The three-dimensional heterogeneous integration is an integration method for realizing high-density integration by embedding chips with different sizes and textures into a silicon cavity on a silicon-based substrate, fanning out through a rear wiring technology and then through silicon through holes.
However, when a chip with a large width and a large depth is embedded in the silicon interposer, a large amount of silicon needle silicon grass is usually present in the etched cavity, and it is difficult to ensure the bottom of the cavity to be flat. This is because when etching, the bottom etching atmosphere with too large cavity width will have left-right non-uniform phenomenon. At present, there are two general methods for solving the unevenness of the silicon needle silicon grass and the cavity bottom, namely a wafer-level bonding method and a method for adjusting the etching and passivation ratio in the etching process. The first wafer-level bonding method can better solve the problem of silicon needle silicon grass, but the manufacturing cost is greatly increased due to the addition of more wafer-level bonding steps, and the fact that cavities with different depths are manufactured on the same adapter plate is difficult to achieve by adopting the wafer-level bonding mode. The second method for adjusting the etching and passivation ratio has higher requirements on etching equipment, the optimal etching and passivation ratio is difficult to adjust, and the improvement effect is not obvious.
Disclosure of Invention
The invention overcomes the defects of the prior art and provides a deep silicon cavity etching method of a micro-system module which can be manufactured efficiently.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a deep silicon cavity etching method of a micro-system module comprises the following steps:
101) a primary etching step: coating photoresist on the upper surface of a wafer, forming at least more than two preliminary cavities on the photoresist in a distributed manner by an exposure and development technology, deepening the etching depth, and removing the photoresist to form corresponding small cavities after the etching is finished;
102) a primary shaping step: placing dry film glue on the upper surface of the wafer processed in the step 101), exposing all the small cavities and the side walls thereof through exposure and development to form a primary large cavity, deepening the etching depth, and removing the dry film glue after the etching is finished to form a large cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
Further, the thickness of the photoresist in the step 101) ranges from 8 micrometers to 15 micrometers, the size of the opening of the cavity ranges from 20 micrometers to 50 micrometers, and the etching depth ranges from 20 micrometers to 80 micrometers; the photoresist adopts positive photoresist, negative photoresist, dry film paste or liquid photoresist; the etching adopts wet etching or dry etching.
Further, the thickness range of the dry film adhesive in the step 102) is 8-15 micrometers, and the etching depth of the primary large cavity reaches 100-200 micrometers; the etching adopts wet etching or dry etching.
A deep silicon cavity etching method of a micro-system module comprises the following steps:
101) a primary etching step: depositing a hard mask layer with the thickness ranging from 2 to 10 microns on the upper surface of the wafer, forming a primary large cavity on the hard mask layer by an exposure and development technology, and deepening the etching depth to form a corresponding large cavity;
102) a primary shaping step: coating photoresist on the upper surface of the wafer processed in the step 101), distributing and forming at least more than two primary cavities in the large cavity area corresponding to the photoresist through an exposure and development technology, deepening etching depth, and removing the photoresist to form small distributed cavities in the corresponding large cavities after etching is finished; under the protection of the hard mask layer, deepening the integral etching depth of the large cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
A deep silicon cavity etching method of a micro-system module comprises the following specific testing and processing flows:
101) a primary etching step: coating photoresist on the upper surface of a wafer, forming at least more than two preliminary cavities on the photoresist in a distributed manner by an exposure and development technology, deepening the etching depth to form small cavities, wherein the depth of each small cavity is 8-15 micrometers;
102) a primary shaping step: further deepening the etching depth on the wafer processed in the step 101), and removing the photoresist after the etching is finished to form a large cavity integrally formed by small cavities; wherein the depth of the large cavity is the same as that of the small cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
Further, the oxidation process is thermal oxidation or wet oxidation.
Compared with the prior art, the invention has the advantages that:
the invention solves the problem of the silicon needle silicon grass caused by uneven atmosphere by dividing a large cavity into small cavities for etching and then removing the side wall; the problem that the bottom of the cavity is polluted by falling due to overhigh side wall is prevented by simultaneously etching the side wall and the small cavity; therefore, the problem of etching the large cavity can be solved well at low cost.
Drawings
FIG. 1 is a diagram illustrating a structure of a preliminary chamber formed by coating a photoresist on a wafer according to the present invention;
FIG. 2 is a block diagram of the invention shown in FIG. 1 with small cavities;
FIG. 3 is a block diagram of FIG. 2 with photoresist removed according to the present invention;
FIG. 4 is a block diagram of the dry film adhesive coated in FIG. 3 according to the present invention;
FIG. 5 is a schematic diagram of the present invention showing a preliminary large chamber provided in FIG. 4;
FIG. 6 is a diagram of the deepening etching of the preliminary large cavity in FIG. 5 according to the present invention;
FIG. 7 is a block diagram of the present invention of FIG. 6 with the dry film glue removed;
FIG. 8 is a block diagram of the present invention after oxidation of FIG. 7;
FIG. 9 is a block diagram of the present invention;
FIG. 10 is a block diagram of a hard mask layer coated on a wafer according to the present invention;
FIG. 11 is a schematic view of the preliminary large chamber shown in FIG. 10 according to the present invention;
FIG. 12 is a block diagram of the photoresist coated on FIG. 11 according to the present invention;
FIG. 13 is a block diagram of the invention with small cavities provided in FIG. 12;
FIG. 14 is a block diagram of the deepened etched small cavity of FIG. 13 in accordance with the present invention;
FIG. 15 is a block diagram of the invention of FIG. 14 with the photoresist removed;
FIG. 16 is a block diagram of the deepened etch of the large cavity of FIG. 15 in accordance with the present invention;
FIG. 17 is a diagram illustrating the structure of the photoresist coated on the wafer according to the present invention;
FIG. 18 is a block diagram of the invention with small cavities provided in FIG. 17;
FIG. 19 is a block diagram of the invention after a deeper etch of FIG. 18 has been performed;
FIG. 20 is a structural diagram of an oxide layer formed after oxidation of FIG. 20 according to the present invention.
The labels in the figure are: photoresist 101, small cavities 102, dry film adhesive 103, a preliminary large cavity 104, a hard mask layer 105, an oxide layer 106 and a large cavity 107.
Detailed Description
The invention is further described with reference to the following figures and detailed description.
Example 1:
as shown in fig. 1 to 9, a method for etching a deep silicon cavity of a micro system module specifically includes the following steps:
101) a primary etching step: a photoresist 101 is applied to the top surface of the wafer, the photoresist 101 having a thickness in the range of 8 microns to 15 microns. At least more than two primary cavities are formed on the photoresist 101 in a distributed mode through an exposure and development technology, the opening size of each primary cavity is 20 micrometers to 50 micrometers, the etching depth is deepened and is 20 micrometers to 80 micrometers, and the photoresist 101 is removed after etching is completed to form corresponding small cavities 102. The photoresist 101 may be a positive or negative photoresist, and the photoresist 101 may be coated by attaching a dry film on the wafer or by spin-coating the liquid photoresist 101 on the wafer. The etching may be wet etching or dry etching.
The ratio of the depth of the small cavity 102 and the wall thickness of the small cavity 102 can be adjusted arbitrarily to achieve good performance.
102) A primary shaping step: placing a dry film adhesive 103 on the upper surface of the wafer processed in the step 101), wherein the thickness of the dry film is 8-15 microns. Exposing all the small cavities 102 and the side walls thereof through exposure and development to form a primary large cavity 104, and further deepening and etching the primary large cavity 104 to the etching depth of 100-200 micrometers; and forming a large cavity 107 for reserving the side wall of the small cavity 102, and removing the dry film adhesive 103 on the surface of the wafer after the etching is finished. Wherein, the etching adopts wet etching or dry etching.
103) Etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer 106 with the thickness ranging from 2 microns to 10 microns, and taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; the oxide layer 106 of the wafer is etched away to form the final large cavity 107. Wherein the oxide layer 106 is grown to a thickness at least to completely oxidize the sidewalls of the small cavities 102 in the large cavities 107. The oxidation of the wafer can adopt dry thermal oxidation or wet oxidation; the thickness of the oxidized layer 106 resulting from the oxidation may be adjusted to achieve good etch stop performance requirements.
The requirement for etch selectivity in etching is that the etch selectivity of silicon oxide is greater than the etch selectivity of silicon. The etching method can adopt wet etching or dry etching, and the used etching liquid medicine (or etching atmosphere) can adopt any etching liquid medicine (or etching atmosphere) meeting the etching selectivity requirement.
Example 2:
as shown in fig. 8 to 16, a method for etching a deep silicon cavity of a micro system module specifically includes the following steps:
101) a primary etching step: depositing a hard mask layer 105 with the thickness ranging from 2 to 10 microns on the upper surface of the wafer, forming a primary large cavity 104 on the hard mask layer 105 through an exposure and development technology, and deepening the etching depth to form a corresponding large cavity 107.
The hard mask layer 105 may be formed by a chemical vapor deposition, a physical vapor deposition, an evaporation, or any other suitable deposition method. The thickness of the deposited hard mask layer 105 may be arbitrarily adjusted to achieve good performance requirements. The material of the hard mask layer 105 may be any of various materials having hard mask properties such as silicon dioxide and silicon nitride. The hard mask layer 105 may be etched to form a pattern by dry etching or wet etching.
102) A primary shaping step: coating photoresist 101 on the upper surface of the wafer processed in the step 101), distributing at least two primary cavities in the area of the large cavity 107 corresponding to the photoresist 101 through an exposure and development technology, deepening the etching depth, and removing the photoresist 101 after the etching is finished to form a corresponding small cavity 102 distributed in the large cavity 107; under the protection of the hard mask layer 105, deepening the integral etching depth of the large cavity 107;
the photoresist 101 can enable the dry film photoresist 101 to be attached to the mask layer, and the liquid photoresist 101 can be spin-coated or blade-coated on the mask layer; the coating method of the photoresist 101 can be spin coating or scratch coating; the thickness of the coated photoresist 101 can be adjusted at will to meet good performance requirements; the etching of the small cavity 102 may be either a dry or wet etch.
103) Etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer 106 with the thickness ranging from 2 microns to 10 microns, and taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; the oxide layer 106 of the wafer is etched away to form the final large cavity 107. Wherein the oxide layer 106 is grown to a thickness at least to completely oxidize the sidewalls of the small cavities 102 in the large cavities 107. The oxidation of the wafer can adopt dry thermal oxidation or wet oxidation; the thickness of the oxidized layer 106 resulting from the oxidation may be adjusted to achieve good etch stop performance requirements.
The requirement for etch selectivity in etching is that the etch selectivity of silicon oxide is greater than the etch selectivity of silicon. The etching method can adopt wet etching or dry etching, and the used etching liquid medicine (or etching atmosphere) can adopt any etching liquid medicine (or etching atmosphere) meeting the etching selectivity requirement.
Example 3:
as shown in fig. 8, 9, and 17 to 20, a specific test processing flow of the deep silicon cavity etching method for a micro system module is as follows:
101) a primary etching step: the wafer upper surface is coated with photoresist 101, the coating thickness range is 8-15 microns, at least two preliminary cavities are formed on the photoresist 101 through an exposure and development technology, the etching depth is deepened, small cavities 102 are formed, and the depth of the small cavities 102 is 8-15 microns. The gluing mode can be a spin-coating method or a dry film pasting method; the width of the small cavity 102 and the wall thickness of the side wall of the small cavity 102 can be adjusted arbitrarily to achieve good performance requirements.
102) A primary shaping step: further deepening the etching depth on the wafer processed in the step 101), and removing the photoresist 101 after the etching is finished to form a large cavity 107 integrally formed by the small cavities 102; wherein the depth of the large cavity 107 and the small cavity 102 are the same. The etching method can be wet etching or dry etching.
103) Etching the stop layer: and oxidizing the wafer processed in the step 103) so that the silicon-based surface of the side wall of the small cavity 102 and the bottom of the small cavity 102 are all oxidized. The oxidation generates an oxide layer 106 with a thickness ranging from 2 microns to 10 microns, the time for completely oxidizing the silicon sidewall of the small cavity 102 is about 10 to 20 hours, the oxidation process is thermal oxidation or wet oxidation, and the thickness of the oxide layer 106 obtained by oxidation can be adjusted to meet the performance requirement of good etching termination. Wherein, the silicon oxide is used as an etched part of the subsequent etching, and the substrate silicon of the wafer is used as an etching stop layer of the subsequent etching; the oxide layer 106 of the wafer is etched away to form the final large cavity 107.
The large cavity 107 has a depth of about 100 to 200 microns and a width of about 300 to 500 microns, and the etch selectivity requirement during etching is that the etch selectivity for silicon oxide be greater than the etch selectivity for silicon. The etching method can adopt wet etching or dry etching; the etching solution (or etching atmosphere) can be any etching solution (or etching atmosphere) meeting the etching selectivity requirement.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and decorations can be made without departing from the spirit of the present invention, and these modifications and decorations should also be regarded as being within the scope of the present invention.
Claims (6)
1. A deep silicon cavity etching method of a micro-system module is characterized by comprising the following steps:
101) a primary etching step: coating photoresist on the upper surface of a wafer, forming at least more than two preliminary cavities on the photoresist in a distributed manner by an exposure and development technology, deepening the etching depth, and removing the photoresist to form corresponding small cavities after the etching is finished;
102) a primary shaping step: placing dry film glue on the upper surface of the wafer processed in the step 101), exposing all the small cavities and the side walls thereof through exposure and development to form a primary large cavity, deepening the etching depth, and removing the dry film glue after the etching is finished to form a large cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
2. The method of claim 1, wherein the etching process comprises: the thickness range of the photoresist in the step 101) is 8-15 microns, the size of an opening of the cavity is 20-50 microns, and the etching depth is 20-80 microns; the photoresist adopts positive photoresist, negative photoresist, dry film paste or liquid photoresist; the etching adopts wet etching or dry etching.
3. The method of claim 1, wherein the etching process comprises: the thickness range of the dry film adhesive in the step 102) is 8-15 microns, and the etching depth of the primary large cavity reaches 100-200 microns; the etching adopts wet etching or dry etching.
4. A deep silicon cavity etching method of a micro-system module is characterized by comprising the following steps:
101) a primary etching step: depositing a hard mask layer with the thickness ranging from 2 to 10 microns on the upper surface of the wafer, forming a primary large cavity on the hard mask layer by an exposure and development technology, and deepening the etching depth to form a corresponding large cavity;
102) a primary shaping step: coating photoresist on the upper surface of the wafer processed in the step 101), distributing and forming at least more than two primary cavities in the large cavity area corresponding to the photoresist through an exposure and development technology, deepening etching depth, and removing the photoresist to form small distributed cavities in the corresponding large cavities after etching is finished; under the protection of the hard mask layer, deepening the integral etching depth of the large cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
5. A deep silicon cavity etching method of a micro-system module is characterized in that: the specific test treatment process is as follows:
101) a primary etching step: coating photoresist on the upper surface of a wafer, forming at least more than two preliminary cavities on the photoresist in a distributed manner by an exposure and development technology, deepening the etching depth to form small cavities, wherein the depth of each small cavity is 8-15 micrometers;
102) a primary shaping step: further deepening the etching depth on the wafer processed in the step 101), and removing the photoresist after the etching is finished to form a large cavity integrally formed by small cavities; wherein the depth of the large cavity is the same as that of the small cavity;
103) etching the stop layer: oxidizing the wafer processed in the step 103) to generate an oxide layer with the thickness ranging from 2 microns to 10 microns, taking silicon oxide as an etched part of subsequent etching, and taking the substrate silicon of the wafer as an etching stop layer of the subsequent etching; etching the oxide layer of the wafer to form a final large cavity; wherein the growth thickness of the oxide layer at least needs to completely oxidize the side wall of the small cavity in the large cavity.
6. The method of claim 5, wherein the etching process comprises: the oxidation process is thermal oxidation or wet oxidation.
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| CN201911197687.1A CN111115560A (en) | 2019-11-29 | 2019-11-29 | Deep silicon cavity etching method of micro-system module |
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