CN111597076B - Method and device for operating data and method and device for managing persistent jump table - Google Patents

Method and device for operating data and method and device for managing persistent jump table Download PDF

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Publication number
CN111597076B
CN111597076B CN202010398318.5A CN202010398318A CN111597076B CN 111597076 B CN111597076 B CN 111597076B CN 202010398318 A CN202010398318 A CN 202010398318A CN 111597076 B CN111597076 B CN 111597076B
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pointer
node
format
dirty bit
new
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CN111597076A (en
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杨俊�
陈宬
卢冕
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4Paradigm Beijing Technology Co Ltd
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4Paradigm Beijing Technology Co Ltd
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Priority to PCT/CN2021/086966 priority patent/WO2021227747A1/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1471—Saving, restoring, recovering or retrying involving logging of persistent data for recovery

Abstract

A method and apparatus for operating data and a method and apparatus for managing a persistent jump table are provided. The method for operating the data comprises the following steps: reading a first pointer sp having a specific format, wherein the specific format comprises at least an address part and dirty bits; determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; and modifying the first pointer sp to point to the new address by comparing and swapping CAS operations.

Description

Method and device for operating data and method and device for managing persistent jump table
Technical Field
The present application relates generally to the field of data manipulation of persistent memory devices (Persistent Memory, PMEM), and more particularly to methods and apparatus for data manipulation of persistent memory devices and methods and apparatus for managing persistent jump tables.
Background
Existing concurrent lock-free jumpers are all implemented based on Compare and Swap (CAS) operations, but PMEM differs from DRAM in the persistence feature, i.e., data is not lost when powered down. Under the existing computer hardware and software architecture, the program will read and write the memory through the cache (the basic unit is called cache line) in the CPU, so the write operation (including CAS) of the data in the PMEM cannot ensure that the new data written in the PMEM will be written in the PMEM immediately. Only when the cache line where the new data is located is written back into the PMEM (i.e. cache line FLUSH, hereinafter referred to as FLUSH), the data is actually written into the PMEM. The sequence of FLUSH is independent of the order in which the data is modified, and is determined by the CPU, the program can achieve this by executing an additional instruction (CLFLUSH/CLWB), but these instructions cannot be combined with the conventional CAS into an atomic operation. Thus, in some cases, the use of conventional CAS may cause data inconsistency after power restoration. For example, as shown in FIG. 1, X is controlled by thread 1, an initial value of 1, and Y needs to be kept at all times equal to X+1, controlled by thread 2. Since cas+flush is not an atomic operation, threads 1 and 2 may execute in the order of fig. 1, so if the system is powered down before FLUSH (X) of thread 1, the new value of X is not actually written to PMEM after recovery, resulting in that the value of X is still 1 before modification, and new value of Y4 is already written to PMEM, resulting in y+.x+1, which causes a problem of inconsistent data. The existing CAS cannot be applied to the PMEM-based persistent data structure.
While the prior art may utilize a FLUSH-on-read (FLUSH) mechanism to solve the above problem in terms of correctness, i.e., FLUSH the read data once before CAS, in today's systems, there is no way to determine whether the read data requires FLUSH. In addition, CAS is used in large numbers in the implementation of the lock-jump table, and if FLUSH is performed before each CAS, a large number of unnecessary FLUSH is generated, which is a very time-consuming operation itself. In addition, the above problems can be solved by using the cacheline instruction (CLFLUSH/CLWB), but these instructions themselves are only atomic operation when the data size of flush is less than or equal to 64 bytes (64B), which means that if power is cut off during the flush operation performed on the data with data size >64B, the data with data size >64B may have a problem that only part of the data is updated and the data is inconsistent after the system is restarted.
Disclosure of Invention
Exemplary embodiments of the present application provide a method and apparatus for operating data and a method and apparatus for managing persistent jump tables to solve at least the above-mentioned problems of the prior art.
According to an exemplary embodiment of the present application, a method of operating data is provided, which may include: reading a first pointer sp having a specific format, wherein the specific format comprises at least an address part and dirty bits; determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; the first pointer sp is modified to point to the new address by comparing and swapping CAS operations.
Optionally, the step of determining whether to perform the flush operation on the first pointer sp according to the dirty bit of the first pointer sp may include: determining whether a dirty bit of the first pointer sp is a first value; if the dirty bit of the first pointer sp is the first value, the dirty bit of the first pointer sp is set to the second value and the flush operation is performed on the first pointer sp, and if the dirty bit of the first pointer sp is the second value, the flush operation is not performed on the first pointer sp.
Alternatively, the dirty bit in the particular format may be at least one of the lowest 3 bits of the pointer.
Optionally, the step of modifying the first pointer sp to point to the new address by comparing and swapping CAS operations may comprise: creating a second pointer sp_old and a third pointer sp_new having the specific format; pointing the second pointer sp_old to the address part of the first pointer sp, and setting the dirty bit of the second pointer sp_old to a second value; pointing the third pointer sp_new to the new address and setting the dirty bit of the third pointer sp_new to a first value; the CAS operation is performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new.
According to an exemplary embodiment of the present application, there is provided an apparatus for manipulating data, the apparatus may include: a reading module configured to read a first pointer sp having a specific format, wherein the specific format includes at least an address portion and dirty bits; and a processing module configured to: determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; and modifying the first pointer sp to point to the new address by comparing and swapping CAS operations.
Optionally, the processor may be configured to determine whether to perform a flush operation on the first pointer sp by: determining whether a dirty bit of the first pointer sp is a first value; if the dirty bit of the first pointer sp is the first value, the dirty bit of the first pointer sp is set to the second value and the flush operation is performed on the first pointer sp, and if the dirty bit of the first pointer sp is the second value, the flush operation is not performed on the first pointer sp.
Alternatively, the dirty bit in the particular format may be at least one of the lowest 3 bits of the pointer.
Optionally, the processing module may be configured to modify the first pointer sp to point to the new address by: creating a second pointer sp_old and a third pointer sp_new having the specific format; pointing the second pointer sp_old to the address part of the first pointer sp, and setting the dirty bit of the second pointer sp_old to a second value; pointing the third pointer sp_new to the new address and setting the dirty bit of the third pointer sp_new to a first value; the CAS operation is performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new.
According to an exemplary embodiment of the present application, a method of managing a persistent jump table is provided, which may include: generating a persistent jump table based on the pointer having the first format and the pointer having the second format; and storing all pointers in the persistent jump table having a first format and key value pairs and heights of all nodes in the persistent storage, wherein the first format includes at least an address portion and a dirty bit, the second format includes only the address portion, the dirty bit is used for determining whether to execute a flush operation on the pointers having the first format, wherein the next pointer of each node in an underlying linked list in the persistent jump table has the first format, and the next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has the second format.
Alternatively, the dirty bit in the first format may be at least one of the lowest 3 bits of the pointer.
Optionally, when any node in the bottom linked list is modified, the following operations may be performed: reading a next pointer sp of any node; determining whether a dirty bit of a next pointer sp of the arbitrary node is a first value; setting the dirty bit of the next pointer sp of the arbitrary node to a second value and performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the first value, and not performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the second value; the next pointer sp of any one node is modified to point to a new address by comparing and exchanging CAS operations.
Optionally, the step of modifying the first pointer sp to point to the new address by comparing and swapping CAS operations may comprise: creating pointers sp_old and sp_new having a first format; pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value; pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
Optionally, when any node in an upper linked list except the lower linked list in the persistent jump table is modified, the following operations may be performed: reading a next pointer sp of any node; creating pointers sp_old and sp_new having a second format; pointing the pointer sp_old to the next pointer sp of any node; pointing the pointer sp_new to the new address; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
Alternatively, when a device using the method is powered up, the persistent jump table may be restored by rebuilding a next pointer in the persistent jump table having a second format on the basis of the underlying linked list stored in the persistent storage.
Optionally, the step of recovering the persistent jump table may include: acquiring a head node of the bottom linked list, and assigning the head node to a current node; starting from the head node, the following operations are performed: and if the next pointer of the current node in the bottom linked list does not point to the tail node, modifying the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list to point to the current node according to the height of the current node in the bottom linked list, and if the next pointer of the current node in the bottom linked list points to the tail node, modifying the next pointer of the last node of each upper layer linked list to point to the tail node.
Optionally, according to an exemplary embodiment of the present application, there is provided an apparatus for managing a persistent jump table, the apparatus may include: a processing unit configured to generate a persistent jump table from the pointer having the first format and the pointer having the second format; and a storage unit configured to store in a persistent storage all pointers having a first format and key value pairs and heights of all nodes in the persistent jump table, wherein the first format includes at least an address portion and a dirty bit, the second format includes only the address portion, the dirty bit is used to determine whether to perform a flush operation on the pointers having the first format, wherein a next pointer of each node in an underlying linked list in the persistent jump table has the first format, and a next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has the second format.
Alternatively, the dirty bit in the first format may be at least one of the lowest 3 bits of the pointer.
Alternatively, when modifying any one of the nodes in the underlying linked list, the processing unit may be configured to: reading a next pointer sp of any node; determining whether a dirty bit of a next pointer sp of the arbitrary node is a first value; setting the dirty bit of the next pointer sp of the arbitrary node to a second value and performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the first value, and not performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the second value; the next pointer sp of any one node is modified to point to a new address by comparing and exchanging CAS operations.
Optionally, the processing unit may be configured to modify the first pointer sp to point to the new address by: creating pointers sp_old and sp_new having a first format; pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value; pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
Optionally, when any one node in an upper linked list other than the lower linked list in the persistent jump table is modified, the processing unit may be configured to: reading a next pointer sp of any node; creating pointers sp_old and sp_new having a second format; pointing the pointer sp_old to the next pointer sp of any node; pointing the pointer sp_new to the new address; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
Optionally, when the device is powered up, the processor may be configured to restore the persistent jump table by rebuilding a next pointer in the persistent jump table with a second format by a storage unit on the basis of the underlying linked list stored in the persistent storage.
Optionally, the step of the processing unit being configured to restore the persistent jump table comprises: acquiring a head node of the bottom linked list, and assigning the head node to a current node; starting from the head node, the following operations are performed: and if the next pointer of the current node in the bottom linked list does not point to the tail node, modifying the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list to point to the current node according to the height of the current node in the bottom linked list, and if the next pointer of the current node in the bottom linked list points to the tail node, modifying the next pointer of the last node of each upper layer linked list to point to the tail node.
According to another exemplary embodiment of the present application, a computer-readable storage medium storing instructions is provided, wherein the instructions, when executed by at least one computing device, cause the at least one computing device to perform a method of operating data as described above or a method of managing persistent jump tables as described above.
According to another exemplary implementation of the present application, a system is provided comprising at least one computing device and at least one storage device storing instructions, wherein the instructions, when executed by the at least one computing device, cause the at least one computing device to perform a method of operating data as described above or a method of managing persistent jump tables as described above.
The method and the device for operating the data according to the exemplary embodiments of the present application avoid unnecessary flush by using the new intelligent pointer, realize efficient PMEM-based CAS, and simultaneously solve the problem of inconsistent data caused by CAS in PMEM. In addition, the method and the device for managing the persistent jump table according to the exemplary embodiment of the application replace the traditional memory address pointer by the intelligent pointer, so that the persistent concurrent lock-free jump table is realized.
Additional aspects and/or advantages of the present general inventive concept will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the general inventive concept.
Drawings
These and/or other aspects and advantages of the present application will become more apparent and more readily appreciated from the following detailed description of the embodiments of the present application, taken in conjunction with the accompanying drawings, wherein:
fig. 1 is a diagram showing an example of a DRAM-based CAS operation in the related art;
FIG. 2 is a diagram illustrating a generic pointer and a smart pointer according to an exemplary embodiment of the present application in the prior art;
FIG. 3 is a general flow chart illustrating a method of operating data according to an exemplary embodiment of the present application;
FIG. 4 is a detailed flow chart illustrating a method of operating data according to an exemplary embodiment of the present application;
FIG. 5 is a block diagram illustrating an apparatus for manipulating data according to an exemplary embodiment of the present application;
FIG. 6 is a flowchart illustrating a method of managing persistent jump tables in accordance with an exemplary embodiment of the present application;
FIG. 7 is a diagram illustrating an example of a conventional DRAM-based skip list and a PEME-based persistent skip list according to an exemplary embodiment of the present application;
FIG. 8 is a flow chart illustrating a process of modifying an underlying linked list of a PMEM-based persistent jump table according to an exemplary embodiment of the present application;
FIG. 9 is a flowchart illustrating a process of recovering a PMEM-based persistent jump table according to an exemplary embodiment of the present application;
FIG. 10 is a diagram of pseudo code illustrating a process of recovering a PMEM-based persistent jump table according to an exemplary embodiment of the present application;
fig. 11 is a block diagram illustrating an apparatus for managing persistent jump tables according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The embodiments will be described below in order to explain the present invention by referring to the figures.
Fig. 2 is a diagram illustrating a general pointer and an intelligent pointer according to an exemplary embodiment of the present application in the related art.
As shown in fig. 2, the memory address used in X86 64-bit CUP-based computer programming is 64 bits, and the ordinary pointer 101 in the prior art uses a 64-bit unsigned integer variable to store the pointed memory address, whereas the 8-byte CAS atomic operation supported in the X86 64-bit CPU must guarantee 8-byte alignment, which means that the lowest 3 bits of the address supporting the 8-byte CAS atomic operation are always 0 since the basic unit of memory access is 1 byte.
The smart pointer 102 according to an exemplary embodiment of the present application has a specific format including at least an address portion addr and a dirty bit dirty_flag. As shown in fig. 2, the dirty bit dirty_flag according to an exemplary embodiment of the present application is at least one bit of the lowest 3 bits of the smart pointer 102 (i.e., at least one bit of the last reserved portion of the smart pointer 102 in fig. 2), and the address portion addr is a portion of the smart pointer 102 other than the lowest 3 bits, which is used to store a memory address. Wherein the dirty_flag may be used to indicate whether a flush operation is required the next time the smart pointer 102 is accessed. If the dirty bit dirty_flag is a first value (e.g., 1), it indicates that a flush operation needs to be performed on the smart pointer 102 the next time the smart pointer 102 is accessed, and if the dirty bit dirty_flag is a second value (e.g., 0), it indicates that no flush operation needs to be performed on the smart pointer 102 the next time the smart pointer 102 is accessed.
A method of operating data based on the smart pointer in fig. 2 according to an exemplary embodiment of the present application will be described in detail.
Fig. 3 is a general flowchart illustrating a method of operating data according to an exemplary embodiment of the present application.
As shown in fig. 3, in step S301, a first pointer sp having the specific format including at least an address portion addr and dirty bits dirtyflag, in other words, the first pointer sp is an intelligent pointer having the structure of the intelligent pointer 102 shown in fig. 2 is read.
In step S302, it is determined whether to perform a flush operation on the first pointer sp according to the dirty bit dirty flag of the first pointer sp.
In step S303, the first pointer sp is modified to point to the new address by comparing and swapping CAS operations. This is described in detail below with reference to fig. 4.
Fig. 4 is a detailed flowchart illustrating a method of operating data according to an exemplary embodiment of the present application.
As shown in fig. 4, in step S401 (i.e., S301), the first pointer sp having the specific format is read to obtain an address portion addr and dirty bits dirtyflag of the first pointer sp.
In step S402, it is determined whether the dirty bit dirtyflag of the first pointer sp is a first value (e.g., 1);
If the dirty bit dirtyflag of the first pointer sp is a first value (e.g., 1), then in step S403, the dirty bit dirtyflag of the first pointer sp is set to a second value (e.g., 0), a flush operation is performed on the first pointer sp, and the process proceeds to step S404. Herein, the first value is different from the second value and may be any two values different from each other. If the dirty bit dirty flag of the first pointer sp is a second value (e.g., 0), then the flush operation is not performed on the first pointer sp, but proceeds directly to step S404. That is, step S302 includes step S402 and step S403.
In step S404, the second pointer sp_old and the third pointer sp_new having the specific format are created.
In step S405, the second pointer sp_old is pointed to the address portion addr of the first pointer sp, and the dirty bit dirtyflag of the second pointer sp_old is set to a second value (e.g., 0).
In step S406, the third pointer sp_new is pointed to the new address, and the dirty bit dirty_flag of the third pointer sp_new is set to a first value (e.g., 1). The order between step S405 and step S406 is interchangeable.
In step S407, a CAS operation, that is, CAS (sp, sp_old, sp_new) is performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new. Specifically, it is first determined whether sp and sp_old are equal, and if sp and sp_old are equal, sp is modified to sp_new and ended. If sp and sp_old are not equal, the process returns to step S401. That is, step S303 includes steps S404 to S407. As can be seen from the above description, after the CAS operation based on the smart pointer is successful, the dirty bit dirty flag of the smart pointer must be 1.
Fig. 5 shows a block diagram of an apparatus 100 for manipulating data according to an exemplary embodiment of the present application.
As shown in fig. 5, the apparatus 100 may include a reading module 110 and a processing module 120.
The reading module 110 may be configured to read the first pointer sp having a specific format, wherein the specific format includes at least an address portion addr and a dirty bit dirtyflag, wherein the dirty bit dirtyflag may be at least one bit of the lowest 3 bits of the smart pointer 102 as shown in fig. 2. The processing module 120 may be configured to determine whether to perform a flush operation on the first pointer sp according to the dirty bit dirty flag of the first pointer sp, and modify the first pointer sp to point to the new address by comparing and swapping CAS operations.
In particular, the processing module 120 may determine whether to perform a flush operation on the first pointer sp by: first, it is determined whether a dirty bit dirtyflag of the first pointer sp is a first value (e.g., 1); the dirty bit dirtyflag of the first pointer sp is set to a second value (e.g., 0) and the flush operation is performed on the first pointer sp if the dirty bit dirtyflag of the first pointer sp is a first value (e.g., 1), and the flush operation is not performed on the first pointer sp if the dirty bit dirtyflag of the first pointer sp is a second value (e.g., 0).
After the processing module 120 determines whether to perform the flush operation on the first pointer sp by the above operations, the processing module 120 may modify the first pointer sp to point to the new address by: first, creating a second pointer sp_old and a third pointer sp_new having the specific format; then, the second pointer sp_old is pointed to the address portion addr of the first pointer sp, and the dirty bit dirtyflag of the second pointer sp_old is set to a second value (e.g., 0); thereafter, the third pointer sp_new is pointed to the new address, and the dirty bit dirtyflag of the third pointer sp_new is set to a first value (e.g., 1); finally, CAS operations, i.e., CAS (sp, sp_old, sp_new) are performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new.
According to the method and the device for operating the data based on the intelligent pointer, unnecessary flush operation can be avoided, efficient CAS (CAS) based on PMEM is achieved, and meanwhile the problem of inconsistent data caused by CAS in the PMEM can be solved.
A method and apparatus for managing persistent jump tables implemented using the intelligent pointers described with reference to fig. 2-5 will be described.
Fig. 6 is a flowchart illustrating a method of managing persistent jump tables according to an exemplary embodiment of the present application.
As shown in fig. 6, in step S601, a persistent jump table is generated from a pointer having a first format and a pointer having a second format, wherein the persistent jump table is a persistent lock-free jump table. The first format includes at least an address portion addr and a dirty bit dirty flag for determining whether to perform a flush operation on a pointer having the first format, and the dirty bit dirty flag in the first format is at least one of the lowest 3 bits of the pointer, in other words, the format of the smart pointer 102 shown in fig. 2. The second format includes only an address portion, in other words, the second format is the format of the ordinary pointer 101 shown in fig. 2.
In particular, a persistent-hop table may be generated according to existing methods of generating a common-hop table, wherein a next pointer of each node in an underlying linked list in the persistent-hop table has a first format and a next pointer of each node in an upper linked list in the persistent-hop table other than the underlying linked list has a second format. Furthermore, the dirty bit dirtyflag in the next pointer of each node in the underlying linked list in the persistent jump table is initialized to 1. Since a procedure of generating a skip list according to an existing method of generating a general skip list is well known to those skilled in the art, a detailed description thereof will not be provided herein.
In step S602, all pointers in the first format and key-value pairs and heights of all nodes in the persistent-jump table are stored in a persistent storage. This will be described in detail with reference to fig. 7. Fig. 7 is a diagram illustrating an example of a conventional DRAM-based skip list and a PMEM-based persistent skip list according to an exemplary embodiment of the present application.
As shown in fig. 7, the next pointers of the nodes in each layer list of the DRAM-based conventional skip list are pointers of the second format (i.e., the normal pointer 101 in fig. 2), whereas the next pointers of the nodes in the layer list of the PMEM-based persistent skip list according to the exemplary embodiment of the present application are pointers of the first format (i.e., the intelligent pointer 102 in fig. 2), whereas the next pointers of the nodes in the other layer list except the layer list of the PMEM-based persistent skip list are pointers of the second format, that is, the nodes in the layer list of the PMEM-based persistent skip list include key value pairs (i.e., key value k and value v), the next pointers of the first format (i.e., the intelligent pointer 102 in fig. 2) and the height (height), and in addition, the nodes in the other layers except the layer list of the persistent skip list include key value pairs (i.e., key value k and value v) and the normal pointer 101 in fig. 2). In this application, in order to persist the entire jump table, only the persistence of the bottom-most linked list needs to be guaranteed, so the next pointer of the node in the bottom-most linked list needs to be set as the intelligent pointer 102 in fig. 2, while the next pointers of the nodes in the other-than-bottom linked list can be reconstructed on the basis of the bottom-most linked list in the process of recovering the persisted jump table, so the next pointers of the nodes in the other-than-bottom linked list are set as the ordinary pointer 101 in fig. 2.
An operational procedure when modifying the PMEM-based persistent jump table according to the exemplary embodiment of the present application will be described below with reference to fig. 8.
Fig. 8 is a flow chart illustrating a process of modifying an underlying linked list of PMEM-based persistent jump tables in accordance with an exemplary embodiment of the present application.
As shown in fig. 8, when any one node in the underlying linked list is modified, step S801 is first performed to read a next pointer sp of the any one node, where the next pointer sp of the any one node in the underlying linked list is a pointer having the structure of the intelligent pointer 102 in fig. 2, and thus, the reading process may obtain an address portion addr and dirty bits dirty flag of the next pointer sp.
Thereafter, in step S802, it is determined whether the dirty bit dirtyflag of the next pointer sp of the arbitrary node is a first value.
If the dirty bit dirtyflag of the next pointer sp of the arbitrary node is a first value (e.g., 1), the process proceeds to step S803, the dirty bit dirtyflag of the next pointer sp of the arbitrary node is set to a second value (e.g., 0), a flush operation is performed on the next pointer sp of the arbitrary node, and the process proceeds to step S804. If the dirty bit dirty flag of the next pointer sp of any one node is a second value (e.g., 0), the flush operation is not performed on the next pointer sp of any one node, but the process proceeds directly to step S804.
In step S804, the next pointer sp of any one node is modified to point to a new address by comparing and exchanging CAS operations.
In particular, the step of modifying the next pointer sp of any one node to point to a new address by comparing and exchanging CAS operations may include: creating pointers sp_old and sp_new having a first format; pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value; pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node. After the above procedure, the dirty bit dirtyflag of the next pointer sp of any one node is set to 1. Since the process is similar to steps S404 to S407 of fig. 4, a description thereof will not be repeated.
When any one node in the upper link list except the lower link list in the persistent jump table is modified, the procedure can be implemented by using a CAS operation based on the normal pointer 101, that is, reading the next pointer sp of the any one node in the upper link list except the lower link list, creating a pointer sp_old and a pointer sp_new having a second format, pointing the pointer sp_old to the next pointer sp of the any one node in the upper link list except the lower link list, pointing the pointer sp_new to a new address, and performing the CAS operation on the next pointer sp, the pointer sp_old, and the pointer sp_new of the any one node in the upper link list except the lower link list.
Further, when a device using the method of managing a persistent-hop table is powered up, the persistent-hop table is restored by rebuilding a next pointer having a second format in the persistent-hop table on the basis of an underlying linked list stored in the persistent storage device. This will be described in detail with reference to fig. 9 and 10.
Fig. 9 is a flowchart illustrating a process of recovering a PMEM-based persistent jump table according to an exemplary embodiment of the present application. Fig. 10 is a diagram of pseudo code illustrating a process of restoring a PMEM-based persistent jump table according to an exemplary embodiment of the present application.
As shown in fig. 9, in step S901, a head node head of an underlying linked list in a persistent jump table is obtained, and the head node head is assigned to a current node, wherein a key value pair (i.e., a key value k and data v) of the head node, a next pointer having a first format, and a height are obtained in the process of obtaining the head node head.
In this step, a temporary pointer array cur [ 1..max_height-1 ] needs to be set and initialized, as shown in fig. 10, in the pseudo code portion 1010, max_height-1 represents the maximum value among the heights of all nodes of the PMEM-based persistent-jump table stored in the PMEM. Pseudo code portion 1010 represents initializing the cur [ 1..max_height-1 ] pointer array to the head node head of the PMEM-based persistent linked list stored in the PMEM, and cur [ i ] is assigned as head.addr since the next pointer of each node in the other layer linked list than the underlying linked list in the PMEM-based persistent jump table belongs to the ordinary pointer 101 shown in fig. 2. Further, in the pseudo code section 1020, the node represents the current node (in other words, a variable for representing the current node), the head represents the head node, that is, the pseudo code section 1020 represents assigning the head node head to the current node, in other words, determining the current node as the head node head.
After step S901, the following steps S902 to S904 are performed from the head node head.
Specifically, first, in step S902, it is determined whether the next pointer of the current node in the bottom linked list points to the tail node tail. Referring to fig. 10, in the pseudo code portion 1030, tail represents a tail node, and node_addr is used to temporarily store an address portion addr of a next pointer of a current node, which belongs to the smart pointer 102 shown in fig. 2. The judgment statement in the while statement in the pseudo code portion 1030 represents whether or not the next pointer of the current node points to the tail node tail.
If the next pointer of the current node in the bottom linked list does not point to the tail node tail, in step S903, the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list is modified to point to the current node according to the height of the current node in the bottom linked list, as shown by the pseudo code 1031 in fig. 10. Thereafter, in step S904, the next node in the bottom linked list is assigned to the current node, and as shown in fig. 10, the node=node_next [0] statement in the pseudo code 1030 indicates that the next node_next [0] is assigned to the current node.
If the next pointer of the current node in the bottom linked list points to the tail node tail, then in step S905, the next pointer of the last node of each upper linked list is modified to point to the tail node tail, as shown in the pseudo code 1040 in fig. 10.
Persistent concurrency free tables are implemented by the above-described fig. 6-10.
Fig. 11 is a block diagram illustrating an apparatus for managing persistent jump tables according to an exemplary embodiment of the present application.
As shown in fig. 11, the apparatus 20 includes a processing unit 210 and a storage unit 220.
The processing unit 210 may be configured to generate a persistent jump table from the pointer having the first format and the pointer having the second format, wherein the persistent jump table is a persistent lock-free jump table. The first format includes at least an address portion addr and a dirty bit dirty flag for determining whether to perform a flush operation on a pointer having the first format, and the dirty bit dirty flag in the first format is at least one of the lowest 3 bits of the pointer, in other words, the format of the smart pointer 102 shown in fig. 2. The second format includes only an address portion, in other words, the second format is the format of the ordinary pointer 101 shown in fig. 2.
In particular, the processing unit 210 may generate a persistent-hop table according to an existing method of generating a normal-hop table, wherein a next pointer of each node in an underlying linked list in the persistent-hop table has a first format and a next pointer of each node in an upper linked list other than the underlying linked list in the persistent-hop table has a second format. Furthermore, the dirty bit dirtyflag in the next pointer of each node in the underlying linked list in the persistent jump table is initialized to 1. Since a procedure of generating a skip list according to an existing method of generating a general skip list is well known to those skilled in the art, a detailed description thereof will not be provided herein.
The storage unit 220 may be configured to store all pointers in the first format and key-value pairs and heights of all nodes in the persistent-jump table in the persistent storage. Since the cases of the conventional DRAM-based skip list and the permanent PMEM-based skip list according to the exemplary embodiment of the present application have been described in detail above with reference to fig. 7, a repetitive description thereof will not be made herein.
How the processing unit 210 operates when modifying any one of the nodes in the underlying linked list will be described below.
When any one node in the underlying linked list is modified, the processing unit 210 may be configured to read the next pointer sp of the any one node, where the next pointer sp of the any one node in the underlying linked list is a pointer having the structure of the smart pointer 102 in fig. 2, and thus, during the reading process, the processing unit 210 may obtain the address portion addr and dirty bit dirty flag of the next pointer sp.
Thereafter, the processing unit 210 may determine whether the dirty bit of the next pointer sp of the arbitrary node is the first value. If the dirty bit dirtyflag of the next pointer sp of the arbitrary node is a first value (e.g., 1), the processing unit 210 may set the dirty bit dirtyflag of the next pointer sp of the arbitrary node to a second value (e.g., 0), perform a flush operation on the next pointer sp of the arbitrary node, and modify the next pointer sp of the arbitrary node to point to a new address by comparing and exchanging CAS operations. If the dirty bit dirty flag of the next pointer sp of any one node is a second value (e.g., 0), the processing unit 210 may not perform a flush operation on the next pointer sp of any one node and modify the next pointer sp of any one node to point to a new address by comparing and exchanging CAS operations.
In particular, the processing unit 210 may be configured to modify the first pointer sp to point to the new address by: creating pointers sp_old and sp_new having a first format; pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value; pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value; and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node. After the above procedure, the dirty bit dirtyflag of the next pointer sp of any one node is set to 1. Since the process is similar to steps S404 to S407 of fig. 4, a description thereof will not be repeated.
Further, when any one node in the upper-layer linked list other than the lower-layer linked list is modified, the processing unit 210 may implement the process using a CAS operation based on the normal pointer 101, i.e., the processor 210 may read the next pointer sp of the any one node in the upper-layer linked list other than the lower-layer linked list, create pointers sp_old and sp_new having a second format, point the pointer sp_old to the next pointer sp of the any one node in the upper-layer linked list other than the lower-layer linked list, point the pointer sp_new to a new address, and perform the CAS operation on the next pointer sp, the pointer sp_old, and the pointer sp_new of the any one node in the upper-layer linked list other than the lower-layer linked list.
Further, when the device managing the persistent-hop table is powered on, the processing unit may be configured to restore the persistent-hop table by rebuilding a next pointer in the persistent-hop table having the second format by the storage unit 220 on the basis of the underlying linked list stored in the persistent storage device.
In particular, the processing unit 210 may be configured to recover the persistent jump table by: acquiring a head node of the bottom linked list, and assigning the head node to a current node; starting from the head node, if the next pointer of the current node in the bottom linked list does not point to the tail node, modifying the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list to point to the current node according to the height of the current node in the bottom linked list, and if the next pointer of the current node in the bottom linked list points to the tail node, modifying the next pointer of the last node of each upper layer linked list to point to the tail node. Since this has been described in detail above with reference to fig. 9 and 10, a repetitive description will not be made here.
A method and apparatus for operating data and a method and apparatus for managing a persistent jump table according to an exemplary embodiment of the present application have been described above with reference to fig. 2 to 11. However, it should be understood that: the apparatus shown in the figures may be configured as software, hardware, firmware, or any combination thereof, respectively, that performs the specified functions. For example, the apparatus may correspond to an application specific integrated circuit, to a pure software code, or to a module in which software is combined with hardware. Furthermore, one or more functions implemented by the apparatus may also be uniformly performed by components in a physical entity device (e.g., a processor, a client, a server, or the like).
It should be appreciated that a method of operating data according to an exemplary embodiment of the present application may be implemented by instructions recorded on a computer-readable storage medium, for example, according to an exemplary embodiment of the present application, a computer-readable storage medium storing instructions may be provided, wherein the instructions, when executed by at least one computing device, cause the at least one computing device to perform the steps of: reading a first pointer sp having a specific format, wherein the specific format comprises at least an address part and dirty bits; determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; the first pointer sp is modified to point to the new address by comparing and swapping CAS operations.
For another example, according to another exemplary embodiment of the present application, a computer-readable storage medium storing instructions may be provided, wherein the instructions, when executed by at least one computing device, cause the at least one computing device to perform the steps of: generating a persistent jump table based on the pointer having the first format and the pointer having the second format; and storing all pointers in the persistent jump table having a first format and key value pairs and heights of all nodes in the persistent storage, wherein the first format includes at least an address portion and a dirty bit, the second format includes only the address portion, the dirty bit is used for determining whether to execute a flush operation on the pointers having the first format, wherein the next pointer of each node in an underlying linked list in the persistent jump table has the first format, and the next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has the second format.
The instructions stored in the above-described computer-readable storage medium may be executed in an environment deployed in a computer device such as a client, a host, a proxy device, a server, etc., and it should be noted that the instructions may also perform more specific processes when performing the above-described steps, the contents of which have been mentioned in the description with reference to fig. 2 to 4 and 6 to 10, and thus, a detailed description will not be repeated here.
It should be noted that the devices on-line of the model according to the exemplary embodiment of the present invention may depend entirely on the execution of the computer program to achieve the corresponding functions, i.e., each device corresponds to each step in the functional architecture of the computer program, so that the entire system is called through a dedicated software package (e.g., lib library) to achieve the corresponding functions.
On the other hand, the apparatus for manipulating data according to the exemplary embodiments of the present invention may also be implemented by hardware, software, firmware, middleware, microcode, or any combination thereof. When implemented in software, firmware, middleware or microcode, the program code or code segments to perform the corresponding operations may be stored in a computer-readable medium, such as a storage medium, so that the processor can perform the corresponding operations by reading and executing the corresponding program code or code segments.
For example, according to an exemplary embodiment of the present application, a system may be provided that includes at least one computing device and at least one storage device storing instructions that, when executed by the at least one computing device, cause the at least one computing device to perform the steps of: reading a first pointer sp having a specific format, wherein the specific format comprises at least an address part and dirty bits; determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; the first pointer sp is modified to point to the new address by comparing and swapping CAS operations.
For another example, according to another exemplary embodiment of the present application, a system may be provided that includes at least one computing device and at least one storage device storing instructions that, when executed by the at least one computing device, cause the at least one computing device to perform the steps of: generating a persistent jump table based on the pointer having the first format and the pointer having the second format; and storing all pointers in the persistent jump table having a first format and key value pairs and heights of all nodes in the persistent storage, wherein the first format includes at least an address portion and a dirty bit, the second format includes only the address portion, the dirty bit is used for determining whether to execute a flush operation on the pointers having the first format, wherein the next pointer of each node in an underlying linked list in the persistent jump table has the first format, and the next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has the second format.
It should be noted that the instructions stored in the at least one storage device may also perform more specific processes when performing the above steps, the contents of these further processes have been mentioned in the description with reference to fig. 2 to 4 and 6 to 10, and thus a detailed description will not be given here in order to avoid repetition.
In particular, the above-described system may be deployed in a server or client, as well as on a node in a distributed network environment. Furthermore, the system may be a PC computer, tablet device, personal digital assistant, smart phone, web application, or other device capable of executing the above set of instructions. In addition, the system may also include a video display (such as a liquid crystal display) and a user interaction interface (such as a keyboard, mouse, touch input device, etc.). Additionally, all components of the system may be connected to each other via a bus and/or a network.
Here, the system is not necessarily a single system, but may be any device or aggregate of circuits capable of executing the above-described instructions (or instruction set) alone or in combination. The system may also be part of an integrated control system or system manager, or may be configured as a portable electronic device that interfaces with locally or remotely (e.g., via wireless transmission).
In the system, the at least one computing device may include a Central Processing Unit (CPU), a Graphics Processor (GPU), a programmable logic device, a special purpose processor system, a microcontroller, or a microprocessor. By way of example and not limitation, the at least one computing device may also include an analog processor, a digital processor, a microprocessor, a multi-core processor, a processor array, a network processor, and the like. The computing device may execute instructions or code stored in one of the storage devices, wherein the storage devices may also store data. Instructions and data may also be transmitted and received over a network via a network interface device, which may employ any known transmission protocol.
The storage device may be integrated with the computing device, for example, with RAM or flash memory disposed within an integrated circuit microprocessor or the like. Further, the storage devices may include stand-alone devices, such as external disk drives, storage arrays, or other storage devices usable by any database system. The storage device and the computing device may be operatively coupled or may communicate with each other, such as through an I/O port, network connection, or the like, such that the computing device is capable of reading instructions stored in the storage device.
The foregoing description of exemplary embodiments of the invention has been presented only to be understood as illustrative and not exhaustive, and the invention is not limited to the exemplary embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. Therefore, the protection scope of the present invention shall be subject to the scope of the claims.

Claims (24)

1. A method of manipulating data, the method comprising:
reading a first pointer sp having a specific format, wherein the specific format at least comprises an address part and a dirty bit, wherein the dirty bit is used for indicating whether to execute a flush operation on the pointer having the specific format;
determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp;
the first pointer sp is modified to point to the new address by comparing and swapping CAS operations.
2. The method of claim 1, wherein determining whether to perform a flush operation on the first pointer sp based on the dirty bits of the first pointer sp comprises:
determining whether a dirty bit of the first pointer sp is a first value;
if the dirty bit of the first pointer sp is the first value, the dirty bit of the first pointer sp is set to the second value and the flush operation is performed on the first pointer sp, and if the dirty bit of the first pointer sp is the second value, the flush operation is not performed on the first pointer sp.
3. The method of claim 1, wherein the dirty bit in the particular format is at least one of the lowest 3 bits of a pointer.
4. The method of claim 2, wherein modifying the first pointer sp to point to the new address by comparing and swapping CAS operations comprises:
creating a second pointer sp_old and a third pointer sp_new having the specific format;
pointing the second pointer sp_old to the address part of the first pointer sp, and setting the dirty bit of the second pointer sp_old to a second value;
pointing the third pointer sp_new to the new address and setting the dirty bit of the third pointer sp_new to a first value;
the CAS operation is performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new.
5. An apparatus for manipulating data, the apparatus comprising:
a reading module configured to read a first pointer sp having a specific format, wherein the specific format includes at least an address portion and a dirty bit, wherein the dirty bit is used to indicate whether to perform a flush operation on the pointer having the specific format; and
a processing module configured to:
determining whether to execute flush operation on the first pointer sp according to the dirty bit of the first pointer sp; and is also provided with
The first pointer sp is modified to point to the new address by comparing and swapping CAS operations.
6. The apparatus of claim 5, wherein the processor is configured to determine whether to perform a flush operation on the first pointer sp by:
determining whether a dirty bit of the first pointer sp is a first value;
if the dirty bit of the first pointer sp is the first value, the dirty bit of the first pointer sp is set to the second value and the flush operation is performed on the first pointer sp, and if the dirty bit of the first pointer sp is the second value, the flush operation is not performed on the first pointer sp.
7. The apparatus of claim 5, wherein the dirty bit in the particular format is at least one of the lowest 3 bits of a pointer.
8. The apparatus of claim 6, wherein the processing module is configured to modify the first pointer sp to point to the new address by:
creating a second pointer sp_old and a third pointer sp_new having the specific format;
pointing the second pointer sp_old to the address part of the first pointer sp, and setting the dirty bit of the second pointer sp_old to a second value;
pointing the third pointer sp_new to the new address and setting the dirty bit of the third pointer sp_new to a first value;
The CAS operation is performed on the first pointer sp, the second pointer sp_old, and the third pointer sp_new.
9. A method of managing a persistent jump table, the method comprising:
generating a persistent jump table based on the pointer having the first format and the pointer having the second format; and is also provided with
Storing all pointers in the first format and key-value pairs and heights of all nodes in the persistent jump table in a persistent storage,
wherein the first format comprises at least an address portion and a dirty bit, the second format comprises only an address portion, the dirty bit being used to indicate whether a flush operation is performed on a pointer having the first format,
wherein the next pointer of each node in an underlying linked list in the persistent jump table has a first format and the next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has a second format.
10. The method of claim 9, wherein the dirty bit in the first format is at least one of the lowest 3 bits of the pointer.
11. The method of claim 9, wherein when any one node in the underlying linked list is modified, the following is performed:
Reading a next pointer sp of any node;
determining whether a dirty bit of a next pointer sp of the arbitrary node is a first value;
setting the dirty bit of the next pointer sp of the arbitrary node to a second value and performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the first value, and not performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the second value;
the next pointer sp of any one node is modified to point to a new address by comparing and exchanging CAS operations.
12. The method of claim 11, wherein modifying the first pointer sp to point to the new address by comparing and swapping CAS operations comprises:
creating pointers sp_old and sp_new having a first format;
pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value;
pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value;
and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
13. The method of claim 9, wherein when any one of the nodes in the upper linked list in addition to the lower linked list in the persistent jump table is modified, the following operations are performed:
reading a next pointer sp of any node;
creating pointers sp_old and sp_new having a second format;
pointing the pointer sp_old to the next pointer sp of any node;
pointing the pointer sp_new to the new address;
and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
14. The method of claim 9, wherein when a device using the method is powered up, the persistent jump table is restored by rebuilding a next pointer in the persistent jump table having a second format on the basis of the underlying linked list stored in the persistent storage.
15. The method of claim 14, wherein recovering the persistent jump table comprises:
acquiring a head node of the bottom linked list, and assigning the head node to a current node;
starting from the head node, the following operations are performed: and if the next pointer of the current node in the bottom linked list does not point to the tail node, modifying the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list to point to the current node according to the height of the current node in the bottom linked list, and if the next pointer of the current node in the bottom linked list points to the tail node, modifying the next pointer of the last node of each upper layer linked list to point to the tail node.
16. An apparatus for managing a persistent jump table, the apparatus comprising:
a processing unit configured to generate a persistent jump table from the pointer having the first format and the pointer having the second format; and is also provided with
A storage unit configured to store all pointers in the first format and key-value pairs and heights of all nodes in the persistent-jump table in a persistent storage,
wherein the first format comprises at least an address portion and a dirty bit, the second format comprises only an address portion, the dirty bit being used to indicate whether a flush operation is performed on a pointer having the first format,
wherein the next pointer of each node in an underlying linked list in the persistent jump table has a first format and the next pointer of each node in an upper linked list other than the underlying linked list in the persistent jump table has a second format.
17. The apparatus of claim 16, wherein the dirty bit in the first format is at least one of the lowest 3 bits of the pointer.
18. The apparatus of claim 16, wherein, when modifying any one of the nodes in the underlying linked list, the processing unit is configured to:
reading a next pointer sp of any node;
Determining whether a dirty bit of a next pointer sp of the arbitrary node is a first value;
setting the dirty bit of the next pointer sp of the arbitrary node to a second value and performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the first value, and not performing flush operation on the next pointer sp of the arbitrary node if the dirty bit of the next pointer sp of the arbitrary node is the second value;
the next pointer sp of any one node is modified to point to a new address by comparing and exchanging CAS operations.
19. The apparatus of claim 18, wherein the processing unit is configured to modify the first pointer sp to point to the new address by:
creating pointers sp_old and sp_new having a first format;
pointing the pointer sp_old to the address part of the next pointer sp of the arbitrary node, and setting the dirty bit of the pointer sp_old to a second value;
pointing the pointer sp_new to the new address and setting the dirty bit of the pointer sp_new to a first value;
and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
20. The apparatus of claim 16, wherein, when modifying any one of the nodes in the upper linked list of the persistent jump table other than the lower linked list, the processing unit is configured to:
Reading a next pointer sp of any node;
creating pointers sp_old and sp_new having a second format;
pointing the pointer sp_old to the next pointer sp of any node;
pointing the pointer sp_new to the new address;
and executing CAS operation on the next pointer sp, the pointer sp_old and the pointer sp_new of any node.
21. The apparatus of claim 16, wherein when the apparatus is powered up, the processing unit is configured to recover the persistent jump table by rebuilding, by a storage unit, a next pointer in the persistent jump table having a second format on the basis of the underlying linked list stored in the persistent storage.
22. The apparatus of claim 21, wherein the processing unit is configured to recover the persistent jump table by:
acquiring a head node of the bottom linked list, and assigning the head node to a current node;
starting from the head node, the following operations are performed: and if the next pointer of the current node in the bottom linked list does not point to the tail node, modifying the next pointer of the corresponding layer linked list of the previous node of each upper layer linked list to point to the current node according to the height of the current node in the bottom linked list, and if the next pointer of the current node in the bottom linked list points to the tail node, modifying the next pointer of the last node of each upper layer linked list to point to the tail node.
23. A computer-readable storage medium storing instructions that, when executed by at least one computing device, cause the at least one computing device to perform the method of any of claims 1-4 and 9-15.
24. A system comprising at least one computing device and at least one storage device storing instructions that, when executed by the at least one computing device, cause the at least one computing device to perform the method of any of claims 1-4 and 9-15.
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