CN111430372B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN111430372B CN111430372B CN202010244318.XA CN202010244318A CN111430372B CN 111430372 B CN111430372 B CN 111430372B CN 202010244318 A CN202010244318 A CN 202010244318A CN 111430372 B CN111430372 B CN 111430372B
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- 239000000758 substrate Substances 0.000 title claims abstract description 116
- 230000006698 induction Effects 0.000 claims abstract description 134
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- 239000010409 thin film Substances 0.000 claims description 30
- 239000010408 film Substances 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 7
- 239000002356 single layer Substances 0.000 claims description 4
- 239000011229 interlayer Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
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- 238000000034 method Methods 0.000 description 4
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- 238000004519 manufacturing process Methods 0.000 description 2
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- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- 239000011521 glass Substances 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6672—High-frequency adaptations for passive devices for integrated passive components, e.g. semiconductor device with passive components only
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Abstract
The invention provides an array substrate, a display panel and a display device. Compared with an externally-hung induction coil in the existing display device, the induction coil provided by the invention does not occupy the peripheral space of the display device any more, and further the space of the display device is saved. Furthermore, the induction coil provided by the invention penetrates through and is connected with the at least one shielding part, so that the shielding part is used as a part of the induction coil, the impedance of the induction coil can be reduced, the magnetic flux of the induction coil can be further improved, and the high induction effect of the induction coil is ensured.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
With the development of electronic technology, wireless charging technology, Near Field Communication (NFC), and the like are increasingly applied to display devices. The wireless charging technology is to use a line to wind a city coil and realize charging by induction between a power transmission side and a power receiving side through the principle of electromagnetic induction. The short-distance wireless communication is realized by induction between a signal generating end and a receiving end through the principle of electromagnetic induction, and has great application in card swiping and data transmission. Therefore, no matter the wireless charging technology or the short-distance wireless communication is realized by winding the circuit into an induction coil and utilizing the electromagnetic induction principle. However, the sensing coil of the conventional display device is usually externally hung, and is not integrated in the display device.
Disclosure of Invention
In view of this, the present invention provides an array substrate, a display panel and a display device, which effectively solve the technical problems in the prior art, and integrate an induction coil in the array substrate to save space, and simultaneously reduce the impedance of the induction coil to improve the magnetic flux of the induction coil, thereby ensuring a high induction effect of the induction coil.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
an array substrate, comprising:
a substrate;
the conductive shading layer is positioned on one side of the substrate and comprises an induction coil and a plurality of shading parts, wherein the induction coil penetrates through and is connected with at least one shading part on an extending path of the induction coil;
the buffer insulating layer is positioned on one side, away from the substrate, of the conductive shading layer;
and the thin film transistor array layer is positioned on one side, away from the substrate, of the buffer insulating layer, the thin film transistor array layer comprises a plurality of thin film transistors which are in one-to-one correspondence with the shielding parts, and the shielding range of the shielding parts at least comprises the vertical projection of the channel parts of the thin film transistors on the substrate.
Correspondingly, the invention also provides a display panel which comprises the array substrate.
Correspondingly, the invention further provides a display device which comprises the display panel.
Compared with the prior art, the technical scheme provided by the invention at least has the following advantages:
the invention provides an array substrate, a display panel and a display device, comprising: a substrate; the conductive shading layer is positioned on one side of the substrate and comprises an induction coil and a plurality of shading parts, wherein the induction coil penetrates through and is connected with at least one shading part on an extending path of the induction coil; the buffer insulating layer is positioned on one side, away from the substrate, of the conductive shading layer; and the thin film transistor array layer is positioned on one side, away from the substrate, of the buffer insulating layer, the thin film transistor array layer comprises a plurality of thin film transistors which are in one-to-one correspondence with the shielding parts, and the shielding range of the shielding parts at least comprises the vertical projection of the channel parts of the thin film transistors on the substrate.
According to the invention, the induction coil is arranged on the conductive shading layer, so that the induction coil is prepared by multiplexing the conductive shading layer, and the purpose of integrating the induction coil on the array substrate is achieved. Compared with an externally-hung induction coil in the existing display device, the induction coil provided by the invention does not occupy the peripheral space of the display device any more, and further the space of the display device is saved. Furthermore, the induction coil provided by the invention penetrates through and is connected with the at least one shielding part, so that the shielding part is used as a part of the induction coil, the impedance of the induction coil can be reduced, the magnetic flux of the induction coil can be further improved, and the high induction effect of the induction coil is ensured.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an induction coil and a light shielding portion of an array substrate according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view taken along AA' of FIG. 1;
FIG. 3 is a schematic structural diagram of a substrate and an induction coil according to an embodiment of the present invention;
FIG. 4 is a cut-away view taken along direction BB' in FIG. 3;
FIG. 5 is a schematic diagram of another substrate and induction coil structure according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 9 is a sectional view taken in the direction CC' in FIG. 8;
fig. 10 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 11 is a sectional view taken along direction DD' in FIG. 10;
fig. 12 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background art, the wireless charging technology is to use a line winding loop to realize charging by induction between the power transmission side and the power receiving side through the principle of electromagnetic induction. The short-distance wireless communication is realized by induction between a signal generating end and a receiving end through the principle of electromagnetic induction, and has great application in card swiping and data transmission. Therefore, no matter the wireless charging technology or the short-distance wireless communication is realized by winding the circuit into an induction coil and utilizing the electromagnetic induction principle. However, the sensing coil of the conventional display device is usually externally hung, and is not integrated in the display device.
Based on the above, the invention provides the array substrate, the display panel and the display device, which effectively solve the technical problems in the prior art, the induction coil is integrated in the array substrate to save space, and simultaneously, the impedance of the induction coil is reduced to improve the magnetic flux of the induction coil, so that the induction effect of the induction coil is high. In order to achieve the above object, the technical solutions provided by the present invention are described in detail below, specifically with reference to fig. 1 to 13.
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural view of an induction coil and a shielding portion in an array substrate according to an embodiment of the present invention, and fig. 2 is a sectional view along an AA' direction in fig. 1, where the array substrate according to the embodiment of the present invention includes:
a substrate 100.
The light-shielding layer is located on one side of the substrate 100, and includes an induction coil 210 and a plurality of shielding portions 220, where the induction coil 210 passes through and is connected to at least one shielding portion 220 on an extending path of the induction coil 210.
And the buffer insulating layer 300 is positioned on one side of the conductive shading layer, which is far away from the substrate 100.
And a thin film transistor array layer located on a side of the buffer insulating layer 300 away from the substrate 100, where the thin film transistor array layer includes a plurality of thin film transistors TFT corresponding to the shielding portions 220 one to one, and a shielding range of the shielding portions 220 at least includes a vertical projection of a channel portion of the thin film transistor TFT on the substrate 100.
It can be understood that the induction coil may be configured as an NFC coil in the embodiments of the present invention. The induction coil is arranged on the conductive shading layer, so that the induction coil is prepared by multiplexing the conductive shading layer, and the purpose of integrating the induction coil on the array substrate is achieved. Compared with an externally-hung induction coil in the existing display device, the induction coil provided by the invention does not occupy the peripheral space of the display device any more, and further the space of the display device is saved. Furthermore, the induction coil provided by the invention penetrates through and is connected with the at least one shielding part, so that the shielding part is used as a part of the induction coil, the impedance of the induction coil can be reduced, the magnetic flux of the induction coil can be further improved, and the high induction effect of the induction coil is ensured.
In order to further reduce the impedance of the induction coil and improve the magnetic flux of the induction coil, the embodiment of the invention can optimize the thickness, width, material and the like of the routing of the induction coil. Several corresponding structures for reducing the impedance of the induction coil provided by the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
Referring to fig. 3 and 4, fig. 3 is a schematic structural diagram of a substrate and an induction coil according to an embodiment of the present invention, and fig. 4 is a sectional view along the direction BB' in fig. 3. In the embodiment of the invention, a side of the substrate 100 facing the conductive light shielding layer includes a coil groove, and the induction coil 210 is at least partially disposed in the coil groove.
As shown in fig. 4, at the coil recess, the top surface of the side of the induction coil 210 facing away from the substrate 100 is higher than the top surface of the coil recess. That is, the induction coil 210 includes a first surface and a second surface opposite to each other, wherein the first surface of the induction coil 210 is in contact with the bottom surface of the coil groove, and the second surface of the induction coil 210 is higher than the top surface of the coil groove (i.e., the surface of the substrate 100 having the coil groove), so that the thickness d2 of the induction coil 210 is thicker than the sum of the depth of the coil groove and the thickness d1 of the induction coil higher than the top surface of the coil groove, thereby reducing the impedance of the induction coil 210.
In an embodiment of the present invention, the induction coil provided by the present invention is electrically connected to the shielding portion, so that the present invention can further perform etching processing on the substrate corresponding to the region of the shielding portion electrically connected to the induction coil to obtain the corresponding shielding portion groove, so that the thickness of the shielding portion in the shielding portion groove is increased, and the impedance of the induction coil is further reduced.
The thickness d1 of the induction coil provided by the invention, which is higher than the surface of the substrate, is not more than 1500 angstroms, thereby avoiding influencing the preparation of the subsequent transistor array layer. Therefore, the embodiment of the invention can adjust the impedance of the induction coil to meet the expected purpose by adjusting the depth of the coil groove, and the specific design needs to be carried out by referring to the parameters such as the thickness of the substrate in practical application. If the depth of the coil groove is adjusted, the depth of the coil groove is adjusted to be 4500 angstroms, so that the impedance of the induction coil is reduced; or the depth of the coil groove is further adjusted to 10000 angstroms, so as to further reduce the impedance of the induction coil, for this reason, the thickness of the substrate provided by the embodiment of the present invention may preferably be 125 microns, and the depth of the coil groove of 10000 angstroms does not affect the strength of the substrate.
It can be understood that, in the array substrate provided in the embodiment of the present invention, before the conductive shading layer is formed into a film, the coil groove with a shape corresponding to the induction coil is etched on the substrate (generally, a glass substrate) by using etching and other processes, and then the film forming process of the conductive shading layer is performed. Because the substrate is etched with the coil groove, the thickness of the conductive shading layer at the coil groove is larger than that of the rest part, and the thickness of the induction coil obtained after the conductive shading layer is processed is correspondingly larger, so that the impedance of the induction coil can be reduced, and the magnetic flux of the induction coil is improved.
Further, in order to ensure that the strength of the substrate is not affected, the embodiment of the invention may further form a film layer on the substrate to manufacture the coil groove. Referring to fig. 5, a schematic structural diagram of another substrate and an induction coil provided in an embodiment of the present invention is shown, where the array substrate provided in the embodiment of the present invention further includes: the transparent film 500 is located between the substrate 100 and the conductive shading layer, one side of the transparent film 500, which is away from the substrate, comprises a coil groove, and at least part of the induction coil 210 is arranged in the coil groove. The depth of the coil groove may be smaller than the thickness of the transparent film, or equal to the thickness of the transparent film, or larger than the thickness of the transparent film (i.e. the coil groove not only penetrates through the transparent film, but also is etched to the substrate along the bottom edge thereof), and the invention is not limited thereto. The transparent film provided by the embodiment of the invention can be a transparent inorganic film, such as a silicon oxide film or a silicon nitride film, and the thickness of the transparent film can be not less than 4500 angstroms.
As shown in fig. 5, at the coil recess, a top surface of a side of the induction coil facing away from the substrate 100 is higher than a top surface of the coil recess. In an embodiment of the present invention, the induction coil provided by the present invention is electrically connected to the shielding portion, so that the present invention can further perform etching processing on the region of the transparent film corresponding to the shielding portion electrically connected to the induction coil to obtain the corresponding shielding portion groove, so that the thickness of the shielding portion in the shielding portion groove is increased, and the impedance of the induction coil is further reduced.
It can be understood that, in the array substrate provided in the embodiment of the present invention, before the conductive light shielding layer is formed into a film, a transparent thin film is first prepared on the substrate, then a coil groove with a shape corresponding to that of the induction coil is etched on a side of the transparent thin film away from the substrate through processes such as etching, and then a film forming process of the conductive light shielding layer is performed. Because the transparent film is etched with the coil groove, the thickness of the conductive shading layer at the coil groove is larger than that of the rest part, and the thickness of the induction coil obtained after the conductive shading layer is correspondingly processed is larger, so that the impedance of the induction coil can be reduced, and the magnetic flux of the induction coil is improved. The thickness of the induction coil higher than the surface of the transparent film is not more than 1500 angstroms, so that the preparation of a subsequent transistor array layer is prevented from being influenced.
In an embodiment of the present invention, the thickness of the conductive light shielding layer may be directly increased to make the impedance of the manufactured induction coil meet expectations, and the thickness of the manufactured induction coil may be not less than 6000 angstroms. Referring to fig. 6, a schematic structural diagram of an array substrate according to an embodiment of the present invention is shown, wherein the buffer insulating layer 300 according to an embodiment of the present invention includes a flat layer 310 located on a side of the conductive light shielding layer away from the substrate 100.
As shown in fig. 6, the buffer insulating layer 300 according to the embodiment of the present invention further includes an inorganic buffer layer 320 located on a side of the planarization layer 310 away from the substrate 100, that is, located between the planarization layer 310 and the transistor array layer, wherein the inorganic buffer layer 320 can block impurities from entering the transistor array layer, so as to ensure high quality of the prepared transistor array layer.
It can be understood that, in the array electrode plate provided by the embodiment of the present invention, after the conductive shading layer with a thickness meeting the expected thickness is prepared and the induction coil and the shading part are processed and prepared, a flat layer of an organic film is formed on one side of the conductive shading layer away from the substrate; because the flat layer has a flat surface on the side departing from the substrate, the uneven surface is prevented from influencing the manufacturing of the transistor array layer, and the high structural quality of the subsequently manufactured crystal light array layer is ensured. The flat layer is required to resist the high temperature of more than 420%, the transmittance in a visible light range is more than 90%, and the surface of the substrate is flattened through the flat layer, so that the subsequent preparation of the transistor array layer is not affected.
In an embodiment of the present invention, the thickened conductive light shielding layer provided by the present invention may be a single-layer structure, or may be a stacked structure of a plurality of sub-layers; that is, in the direction from the substrate to the thin film transistor array layer provided in the embodiment of the present invention, the conductive trace of the sensing coil is a stacked structure of a single-layer trace or a plurality of sub-conductive traces. The single-layer wiring or the sub-conductive wiring provided by the embodiment of the invention can be made of Mo or Al and the like; or, when the conductive trace provided by the present invention is a stacked structure of a plurality of sub-conductive traces, the material of each sub-conductive trace may be the same or different, and the present invention is not particularly limited thereto.
Referring to fig. 7, a schematic structural diagram of another array substrate according to an embodiment of the present invention is shown, wherein the conductive light shielding layer further includes at least one auxiliary coil 230 routed along an extending path of the sensing coil 210, and the auxiliary coil 230 is connected in parallel with the sensing coil 210. It can be understood that, in the embodiment of the present invention, the auxiliary coil and the induction coil are electrically connected in parallel, which is equivalent to increasing the routing width of the induction coil, and thus, the impedance of the induction coil can be further reduced, and the magnetic flux of the induction coil can be increased.
With reference to fig. 8 and 9, fig. 8 is a schematic structural diagram of another array substrate provided in an embodiment of the present invention, and fig. 9 is a sectional view in a CC' direction in fig. 8, where in the array substrate provided in the embodiment of the present invention, in a direction from the substrate 100 to the thin film transistor array layer, the thin film transistor array layer is sequentially stacked by a semiconductor layer 410, a gate insulating layer 420, a gate metal layer 430, an interlayer insulating layer 440, and a source-drain metal layer 450, and impedances of materials of the gate metal layer 430 and the source-drain metal layer 450 are less than that of a material of the induction coil 210.
The array substrate further includes at least one auxiliary conductive trace 240, the auxiliary conductive trace 240 is located on the gate metal layer 430 or the source-drain metal layer 450, the conductive trace of the sensing coil 210 includes at least one cut-off portion 211 on an extending path of the conductive trace of the sensing coil 210, the cut-off portions 211 correspond to the auxiliary conductive trace 240 one by one, and the auxiliary conductive trace 240 is connected to an end portion of the conductive trace of the sensing coil 210 at the cut-off portion 211 through a via hole.
It can be understood that the impedance of the material of the gate metal layer and the source drain metal layer provided in the embodiment of the present invention is smaller than the impedance of the induction coil, so that at least one cut-off portion is obtained by performing a cutting process on the trace of the induction coil, and then the auxiliary conductive trace on the gate metal layer or the source drain metal layer is electrically connected to the induction coil at the cut-off portion, so that the overall impedance of the induction coil is reduced, and the magnetic flux of the induction coil is improved.
As shown in fig. 8, the array substrate provided in the embodiment of the present invention includes a display area AA and a non-display area NA located outside the display area AA, wherein the cut-off portion 211 and the auxiliary conductive trace 240 are both located in the non-display area NA. As can be appreciated, in the embodiment of the invention, the auxiliary conductive traces are disposed in the non-display area, so that the influence of the auxiliary conductive traces on the aperture opening ratio of the display area can be avoided, and the display effect of the display device is improved. Optionally, the auxiliary conductive trace located in the non-display area provided in the embodiment of the present invention may be set as a connection lead of the sensing coil connected to the driving circuit, and the present invention is not limited in particular.
Referring to fig. 10 and 11, fig. 10 is a schematic structural diagram of another array substrate according to an embodiment of the present invention, and fig. 11 is a sectional view along direction DD' in fig. 10, where the thin film transistor array layer according to the embodiment of the present invention includes a plurality of gate lines G and a plurality of data lines D, the gate lines G are located on the gate metal layer 430, and the data lines D are located on the source and drain metal layers 450. At least a portion of the conductive traces of the sensing coil 210 are located within a vertical projection range of the gate line G or the data line D on the substrate 100. It can be understood that the routing of the induction coil provided by the embodiment of the invention is arranged in the coverage range of the gate line or the data line, so that the influence of the induction coil on the aperture opening ratio of the array substrate can be avoided, and the high display effect of the display device is ensured.
Correspondingly, the invention further provides a display panel, and the display panel comprises the array substrate provided by any one of the embodiments. The display panel provided in the embodiment of the present invention may be a liquid crystal display panel, and the present invention is not particularly limited thereto.
Referring to fig. 12, a schematic structural diagram of a display panel according to an embodiment of the present invention is shown, where the display panel is a liquid crystal display panel, and the liquid crystal display panel includes:
the array substrate 10 and the color filter substrate 20 are oppositely arranged, and the array substrate 10 is the array substrate provided by any one of the embodiments;
and a liquid crystal layer 30 between the array substrate 10 and the color film substrate 20.
Correspondingly, the invention further provides a display device which comprises the display panel provided by any one of the embodiments. The display device provided by the embodiment of the invention can be a mobile terminal and the like.
Referring to fig. 13, a schematic structural diagram of a display device according to an embodiment of the present invention is shown, where the display device is a mobile terminal 1000, and includes the display panel according to any one of the embodiments.
The invention provides an array substrate, a display panel and a display device, comprising: a substrate; the conductive shading layer is positioned on one side of the substrate and comprises an induction coil and a plurality of shading parts, wherein the induction coil penetrates through and is connected with at least one shading part on an extending path of the induction coil; the buffer insulating layer is positioned on one side, away from the substrate, of the conductive shading layer; and the thin film transistor array layer is positioned on one side, away from the substrate, of the buffer insulating layer, the thin film transistor array layer comprises a plurality of thin film transistors which are in one-to-one correspondence with the shielding parts, and the shielding range of the shielding parts at least comprises the vertical projection of the channel parts of the thin film transistors on the substrate.
According to the invention, the induction coil is arranged on the conductive shading layer, so that the induction coil is prepared by multiplexing the conductive shading layer, and the purpose of integrating the induction coil on the array substrate is achieved. Compared with an externally-hung induction coil in the existing display device, the induction coil provided by the invention does not occupy the peripheral space of the display device any more, and further the space of the display device is saved. Furthermore, the induction coil provided by the invention penetrates through and is connected with the at least one shielding part, so that the shielding part is used as a part of the induction coil, the impedance of the induction coil can be reduced, the magnetic flux of the induction coil can be further improved, and the high induction effect of the induction coil is ensured.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (12)
1. An array substrate, comprising:
a substrate;
the conductive shading layer is positioned on one side of the substrate and comprises an induction coil and a plurality of shading parts, wherein the induction coil penetrates through and is connected with at least one shading part on an extending path of the induction coil;
the buffer insulating layer is positioned on one side, away from the substrate, of the conductive shading layer;
and the thin film transistor array layer is positioned on one side, away from the substrate, of the buffer insulating layer, the thin film transistor array layer comprises a plurality of thin film transistors which are in one-to-one correspondence with the shielding parts, and the shielding range of the shielding parts at least comprises the vertical projection of the channel parts of the thin film transistors on the substrate.
2. The array substrate of claim 1, wherein a side of the substrate facing the conductive light shielding layer includes a coil groove, and the induction coil is at least partially disposed in the coil groove.
3. The array substrate of claim 1, further comprising: the transparent film is positioned between the substrate and the conductive shading layer, one side, which is far away from the substrate, of the transparent film comprises a coil groove, and at least part of the induction coil is arranged in the coil groove.
4. The array substrate of claim 2 or 3, wherein at the coil recess, a top surface of a side of the induction coil facing away from the base is higher than a top surface of the coil recess.
5. The array substrate of claim 1, wherein the buffer insulating layer comprises a flat layer on a side of the conductive light shielding layer facing away from the substrate.
6. The array substrate of claim 1, wherein the conductive trace of the sensing coil is a single-layer trace or a stacked structure of a plurality of sub-conductive traces in a direction from the substrate to the thin film transistor array layer.
7. The array substrate of claim 1, wherein the conductive light shielding layer further comprises at least one auxiliary coil routed along an extended path of the sensing coil, and the auxiliary coil is connected in parallel with the sensing coil.
8. The array substrate of claim 1, wherein in a direction from the substrate to the thin film transistor array layer, the thin film transistor array layer is sequentially stacked with a semiconductor layer, a gate insulating layer, a gate metal layer, an interlayer insulating layer and a source drain metal layer, and the impedance of the materials of the gate metal layer and the source drain metal layer is smaller than the impedance of the materials of the induction coil;
the array substrate further comprises at least one auxiliary conductive wire, the auxiliary conductive wire is located on the grid metal layer or the source drain metal layer, the extending path of the conductive wire of the induction coil is arranged, the conductive wire of the induction coil comprises at least one cut-off part, the cut-off part corresponds to the auxiliary conductive wire in a one-to-one mode, and the auxiliary conductive wire is connected with the end portion of the conductive wire of the induction coil at the cut-off part through holes.
9. The array substrate of claim 8, wherein the array substrate comprises a display area and a non-display area located outside the display area, and wherein the cut-off portion and the auxiliary conductive trace are both located in the non-display area.
10. The array substrate of claim 1, wherein the thin film transistor array layer comprises a plurality of gate lines and a plurality of data lines, wherein at least some of the conductive traces of the sensing coil are located within a vertical projection range of the gate lines or the data lines on the substrate.
11. A display panel comprising the array substrate according to any one of claims 1 to 10.
12. A display device characterized by comprising the display panel according to claim 11.
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| CN113437093B (en) * | 2021-06-24 | 2024-05-17 | 京东方科技集团股份有限公司 | Display panel, manufacturing method of display panel and display device |
| CN117940840A (en) * | 2022-08-26 | 2024-04-26 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
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| JP2000031384A (en) * | 1998-06-30 | 2000-01-28 | Asulab Sa | Microstructure containing circuit integrated on substrate on which flat surface coil is arranged |
| CN103376591A (en) * | 2012-04-25 | 2013-10-30 | 东莞万士达液晶显示器有限公司 | Color filtering substrate and display panel with same |
| CN103594023A (en) * | 2012-08-17 | 2014-02-19 | 元太科技工业股份有限公司 | Display panel with wireless charging function |
| CN110568953A (en) * | 2013-02-27 | 2019-12-13 | 三星显示有限公司 | Display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2016143971A (en) * | 2015-01-30 | 2016-08-08 | 株式会社ジャパンディスプレイ | Display unit |
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| JP2000031384A (en) * | 1998-06-30 | 2000-01-28 | Asulab Sa | Microstructure containing circuit integrated on substrate on which flat surface coil is arranged |
| CN103376591A (en) * | 2012-04-25 | 2013-10-30 | 东莞万士达液晶显示器有限公司 | Color filtering substrate and display panel with same |
| CN103594023A (en) * | 2012-08-17 | 2014-02-19 | 元太科技工业股份有限公司 | Display panel with wireless charging function |
| CN110568953A (en) * | 2013-02-27 | 2019-12-13 | 三星显示有限公司 | Display device |
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