CN111314180B - Ethernet link test method, terminal and storage medium - Google Patents
Ethernet link test method, terminal and storage medium Download PDFInfo
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- CN111314180B CN111314180B CN202010123878.XA CN202010123878A CN111314180B CN 111314180 B CN111314180 B CN 111314180B CN 202010123878 A CN202010123878 A CN 202010123878A CN 111314180 B CN111314180 B CN 111314180B
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
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Abstract
The invention discloses an Ethernet link test method, a terminal and a storage medium, wherein the Ethernet link test method comprises the following steps: detecting the connection state of a main control board, and determining the port position of the main control board according to the connection state of the main control board; connecting the appointed connection port to an Ethernet tester, and testing the appointed connection port through an Ethernet message; detecting the connection ports in the unconnected state, and setting all the unconnected ports as loopback test ports; and acquiring the test data in the Ethernet tester, and searching and displaying the link with the problem according to the test data. The invention simplifies the auxiliary equipment required by the test and simplifies the steps in the test process by improving the traditional test mode so as to improve the test efficiency of the exchange chip.
Description
Technical Field
The present invention relates to the field of terminal applications, and in particular, to a method, a terminal, and a storage medium for testing an ethernet link.
Background
The ethernet technology is widely used in communication products, and is particularly applied to frame-type equipment and used as a core communication technology of the whole equipment; most Ethernet switching technologies are communicated through switching chips, and each switching chip is correspondingly arranged on one switching port according to the type of the switching chip; and the single board of each slot position on the machine frame can use one or more ports, and when in communication, each single board sends respective Ethernet flow to the switching chip, and the switching chip sends the Ethernet flow to the outside in a unified way.
The switching chip as the core of the communication product is necessarily detected before leaving the factory, especially the switching chip with the signal frequency reaching more than 100 MHz; therefore, errors (e.g., PCB problems, soldering problems, chip problems, etc.) that occur during hardware production must be fully tested on the link of the switch chip before shipping.
According to the form and configuration of a product, the existing testing mode needs to insert the whole machine frame with a single board and configure data service, so that the testing condition can be met; however, such a testing method requires many resources, that is, a fully configured service board is required, and a normal data service is also required to be configured; in addition, during testing, corresponding auxiliary equipment (such as a terminal cat, a switch and the like) is required, and a tester is required to have high testing skills, so that the testing efficiency is low.
Accordingly, the prior art is yet to be improved and developed.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide an ethernet link testing method, a terminal and a storage medium, aiming at the defects of the prior art, wherein the conventional testing method is improved to simplify auxiliary equipment required by testing and simplify steps in the testing process, so as to improve the testing efficiency of a switching chip.
The technical scheme adopted by the invention for solving the technical problem is as follows:
in a first aspect, the present invention provides an ethernet link testing method, where the ethernet link testing method includes the following steps:
detecting the connection state of a main control board, and determining the port position of the main control board according to the connection state of the main control board;
connecting the appointed connection port to an Ethernet tester, and testing the appointed connection port through an Ethernet message;
detecting the connection ports in the unconnected state, and setting all the unconnected ports as loopback test ports;
and acquiring the test data in the Ethernet tester, and searching and displaying the link with the problem according to the test data.
Further, the detecting the connection state of the main control board and determining the port position of the main control board according to the connection state of the main control board specifically includes the following steps:
detecting the connection state of each connection port, and acquiring the equipment information of the connection equipment from the connected ports;
judging whether the equipment information is the equipment information of the main control board;
when the equipment information is the equipment information of the main control board, judging that the main control board is connected;
and determining the port position of the main control board according to the connection state of the main control board.
Further, the connecting the designated connection port to the ethernet tester and testing the designated connection port through the ethernet packet specifically includes the following steps:
setting a designated connection port as an Ethernet message test port, and connecting the designated connection port to the Ethernet tester;
sending an Ethernet message with a corresponding rate to the specified connection port according to the rate parameter of the specified connection port;
and carrying out data receiving and sending tests on the specified connection port through the Ethernet message.
Further, the detecting the connection ports in the unconnected state and setting all the unconnected ports as loopback test ports specifically includes the following steps:
detecting the connection ports in the unconnected state, and searching TX signal ends and RX signal ends of all the connection ports in the unconnected state;
and correspondingly connecting the TX signal end and the RX signal end one by one through a CPLD logic chip so as to set all the unconnected ports as loopback test ports.
Further, the detecting the connection ports in the unconnected state and setting all the unconnected ports as loopback test ports further includes:
grouping all the ports which are not connected, and carrying out message forwarding test on each group of ports through Ethernet messages.
Further, the acquiring of the test data in the ethernet tester and the searching and displaying of the problematic link according to the test data specifically include the following steps:
acquiring test data in the Ethernet tester, and judging whether the number of received messages is equal to the number of sent messages according to the test data;
when the number of the received messages is equal to the number of the sent messages, judging that each link is normal;
and when the number of the received messages is not equal to the number of the sent messages, searching and displaying a link with a problem according to the test data.
Further, the searching and displaying of the links with problems according to the test data specifically includes the following steps:
searching the packet sending count and the packet receiving count of each port according to the test data;
judging whether the packet sending count of each port is equal to the packet receiving count;
when the message packet sending count and the message packet receiving count of the port are not equal, judging that the line of the port is abnormal;
and displaying the position information of the abnormal port.
Further, the rate parameters include 10 mbps, 100 mbps, 1000 mbps, and 10000 mbps.
In a second aspect, the present invention further provides a terminal, including a processor, and a memory connected to the processor, where the memory stores an ethernet link test program, and the ethernet link test program is used to implement the operations of the ethernet link test method according to the first aspect when executed by the processor.
In a third aspect, the present invention further provides a storage medium, where the storage medium stores an ethernet link test program, and the ethernet link test program is used to implement the operations of the ethernet link test method according to the first aspect when executed by a processor.
The invention adopts the technical scheme and has the following effects:
the invention uses the Ethernet message to test the appointed connection port by connecting the appointed connection port to the Ethernet tester, and sets all the unconnected ports as the loopback test port, and uses the Ethernet message to carry out the forwarding test on the loopback test port, thereby reducing the service single board required by the test and realizing the test mode of carrying out large-flow full coverage on the Ethernet exchange link; the invention simplifies the auxiliary equipment required by the test, simplifies the steps in the test process and improves the test efficiency of the exchange chip by improving the traditional test mode.
Drawings
Fig. 1 is a flowchart of an ethernet link testing method according to an embodiment of the present invention.
Fig. 2 is a schematic configuration diagram of a service board in a conventional test mode.
Fig. 3 is a schematic diagram of the connection between the switch chip and each port according to the embodiment of the present invention.
Fig. 4 is a schematic diagram of the position of a port in an embodiment of the invention.
Fig. 5 is a schematic connection diagram of an ethernet tester according to an embodiment of the present invention.
Fig. 6 is a schematic flow diagram of a message sent by the ethernet tester a in the embodiment of the present invention.
Fig. 7 is a schematic flow diagram of a message sent by ethernet tester B in the embodiment of the present invention.
Fig. 8 is a functional schematic diagram of a terminal in an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
In a traditional test mode, a problem link can be detected only by fully inserting a service single board into each slot position on equipment connected with a switching chip; as shown in fig. 2, the device has board ports of 7 slot positions, where the main control board is located at the fourth slot position, and the board ports of other slot positions are all connected to the service board; the exchange chip is located on the main control board, and each slot position is connected with the exchange chip.
As shown in fig. 3, the switching ports from the switching chip on the main control board to each slot are P1 to P7, where, among the three slots on the left side of the switching chip, slot 1 is correspondingly connected to port P3 of the switching chip, slot 2 is correspondingly connected to port P2 of the switching chip, and slot 3 is correspondingly connected to port P1 of the switching chip; in the three slots on the right side of the switch chip, slot 5 is connected to port P5 of the switch chip correspondingly, and so on, slot 7 is connected to port P7 of the switch chip correspondingly.
Wherein, port P4 of the exchange chip is connected with the network port of the main control board; the ports of the exchange chip are set during the design of the system, and the corresponding connection relation of each port is determined; according to the traditional test method, the slot positions 1 to 7 in the tested equipment are all required to be fully inserted with the service single boards, and each service single board is required to have data message flow to pass through, so that the test mode is complex in configuration and extremely high in requirement on test resources.
In order to simplify the auxiliary devices required for testing and simplify the steps in the testing process, the embodiment provides an ethernet link testing method, and the testing efficiency of the switch chip is improved by improving the conventional testing mode.
As shown in fig. 1, in an implementation manner of this embodiment, the ethernet link testing method includes the following steps:
step S100, detecting the connection state of a main control board, and determining the port position of the main control board according to the connection state of the main control board.
In this embodiment, before testing an ethernet link, it is further required to detect a connection state of a main control board and determine a port position of the main control board; generally, as shown in fig. 4, 7 ports P1 to P7 are provided on the device, wherein, the P4 port is set as the port for connecting the master control board, so it is only necessary to detect the connection state of the P4 port and determine whether the P4 port is connected with the master control board.
However, in a case where the port position of the main control board is not determined, it is necessary to detect the connection state of each connection port, and acquire device information of the connection device from the connected port, for example, acquire a source MAC address of the connection device; then, judging whether the equipment information is the equipment information of the main control board, and judging that the main control board is connected when the equipment information is the equipment information of the main control board; at this time, the port position of the main control board can be determined according to the connection state of the main control board.
Namely, the step S100 specifically includes the following steps:
step S110, detecting the connection state of each connection port, and acquiring the equipment information of the connection equipment from the connected ports;
step S120, judging whether the equipment information is the equipment information of the main control board;
step S130, when the device information is the device information of the main control board, determining that the main control board is connected;
step S140, determining the port position of the main control board according to the connection state of the main control board.
In this embodiment, by detecting the connection state of the main control board, it can be ensured that the connection states of the main control board and the switch chip and the device are in a normal state; meanwhile, corresponding test setting can be carried out on other ports by determining the port position of the main control board.
As shown in fig. 1, in an implementation manner of this embodiment, the ethernet link testing method further includes the following steps:
step S200, connecting the appointed connection port to an Ethernet tester, and testing the appointed connection port through the Ethernet message.
In this embodiment, after determining the port position of the main control board, it is further required to set a designated connection port as an ethernet packet test port, and connect the designated connection port to the ethernet tester; meanwhile, according to the speed parameter of the appointed connection port, sending an Ethernet message with a corresponding speed to the appointed connection port, and carrying out data receiving and sending tests on the appointed connection port through the Ethernet message.
Specifically, as shown in fig. 5, two ports, P1 and P7, are set as switch ports, that is, two ports, P1 and P7, are set as designated ports, and are respectively connected to the ethernet tester through ethernet lines, wherein P1 is connected to the ethernet tester a, and P7 is connected to the ethernet tester B; the Ethernet tester A and the Ethernet tester B can both receive and transmit large-flow Ethernet messages, the transmission rate can be 10/100/1000/10000Mbsp, and the actual rate depends on the maximum performance of P1 and P7; when testing the appointed connection port, sending an Ethernet message through an Ethernet tester A, and receiving the Ethernet message by an Ethernet tester B; and when the Ethernet tester B finishes receiving, sending an Ethernet message through the Ethernet tester B, and receiving the Ethernet message by the Ethernet tester A.
That is, the step S200 specifically includes the following steps:
step S210, setting a designated connection port as an Ethernet message test port, and connecting the designated connection port to the Ethernet tester;
step S220, according to the speed parameter of the appointed connection port, sending an Ethernet message with a corresponding speed to the appointed connection port;
step S230, performing a data transmission and reception test on the designated connection port through the ethernet packet.
In this embodiment, the designated connection port is set as an ethernet message test port, and an ethernet tester is used to send and receive ethernet messages, so that all links connected to the switch chip in the device can be tested, and a large-flow full coverage test of the ethernet switch link is realized.
As shown in fig. 1, in an implementation manner of this embodiment, the ethernet link testing method further includes the following steps:
step S300, detecting the connection ports in the unconnected state, and setting all the unconnected ports as loopback test ports.
In this embodiment, after the ethernet tester is connected, it is further required to detect the connection ports in the unconnected state, and search for TX signal terminals and RX signal terminals of all the connection ports in the unconnected state; the purpose of searching the TX signal end and the RX signal end is to set each unconnected port as a transceiving loopback port.
Specifically, when setting a loopback port for transceiving, the TX signal terminal and the RX signal terminal need to be connected in a one-to-one correspondence by a CPLD logic chip, so as to set all unconnected ports as loopback test ports; and grouping all the ports which are not connected, and carrying out message forwarding test on each group of ports through Ethernet messages.
As shown in fig. 5, from the P2 port to the P6 port, these 5 ports are set as a loopback port for transceiving, that is, the TX signal end and the RX signal end are directly connected, so that the ethernet message sent by each unconnected port can be looped back to the port; the loop-back mode is controlled and set through a CPLD logic chip; since the transmission/reception data line of each switch chip passes through the CPLD logic chip, the TX signal terminal and the RX signal terminal need only be connected inside the CPLD logic chip.
After the TX signal terminal is connected with the RX signal terminal, a port VLAN is also set in groups; wherein, the P1/P2 is in a PORT VLAN group, the P2/P3 is in a PORT VLAN group, and so on, the P6/P7 is in a PORT VLAN group; setting 6 PORT VLAN groups in total; the PORTs in a PORT VLAN group can transmit messages; for example, in the P1/P2 group, the packet coming from the P1 port can only be switched to the P2 port, but not to any port from the P3 port to the P7 port.
Namely, the step S300 specifically includes the following steps:
step S310, detecting the connection ports in the unconnected state, and searching TX signal ends and RX signal ends of all the connection ports in the unconnected state;
step S320, the TX signal end and the RX signal end are correspondingly connected one by one through a CPLD logic chip so as to set all the unconnected ports as loopback test ports;
step S330, all the ports which are not connected are grouped, and the message forwarding test is carried out on each group of ports through the Ethernet messages.
In this embodiment, all unconnected ports are set as loopback test ports, and a message forwarding test is performed on each group of ports through an ethernet message, so that an abnormal port can be specifically detected in the test process, and a tester can obtain fault information in time.
As shown in fig. 1, in an implementation manner of this embodiment, the ethernet link testing method further includes the following steps:
and step S400, acquiring test data in the Ethernet tester, and searching and displaying a link with a problem according to the test data.
In this embodiment, after the test is completed, the test data in the ethernet tester may be obtained, and whether the number of received messages is equal to the number of sent messages is determined according to the test data; when the number of the received messages is equal to the number of the sent messages, judging that each link is normal; and when the number of the received messages is not equal to the number of the sent messages, searching and displaying a link with a problem according to the test data.
Specifically, a port P1 corresponds to the ethernet tester a, and the source MAC address used for receiving and sending the data packet in the port is 00:11:22:33:00: AA; the port P7 corresponds to ethernet tester B and the source MAC address used for receiving and sending packets in this port is 00:11:22:33:00: BB.
When the ethernet tester a sends an ethernet message, the destination MAC address is the MAC address of the ethernet tester B, and the flow of the ethernet message is as shown in fig. 6; when the ethernet tester B sends an ethernet message, the destination MAC address is the MAC address of the ethernet tester a, and the flow of the ethernet message is as shown in fig. 7.
That is, the step S400 specifically includes the following steps:
step S410, acquiring test data in the Ethernet tester, and judging whether the number of received messages is equal to the number of sent messages according to the test data;
step S420, when the number of the received messages is equal to the number of the sent messages, judging that each link is normal;
and step S430, when the number of the received messages is not equal to the number of the sent messages, searching and displaying a link with a problem according to the test data.
In this embodiment, when searching for an abnormal link, the determination may be made according to whether the number of sent messages is equal to the number of received messages.
When the ethernet tester a sends an ethernet message to the ethernet tester B, if the number of messages sent by the ethernet tester a is equal to the number of messages received by the ethernet tester B, the hardware in the link direction shown in fig. 6 is normal; otherwise, the number of messages received and sent by each port needs to be further checked, and if the number of the messages received and sent by the P4 port is not equal, and the number of the messages received and sent by the P3 port is equal, the line of the P4 port is abnormal, and the line of the P3 port is normal.
When the ethernet tester B sends an ethernet message to the ethernet tester a, if the number of messages sent by the ethernet tester B is equal to the number of messages received by the ethernet tester a, the hardware in the link direction shown in fig. 7 is normal; otherwise, the number of messages received and sent by each port needs to be further checked, and if the number of the messages received and sent by the P6 port is not equal, and the number of the messages received and sent by the P7 port is equal, the line of the P6 port is abnormal, and the line of the P7 port is normal.
The whole testing process needs to last for more than one day, and whether the message numbers of the Ethernet tester A and the Ethernet tester B are equal is checked; otherwise, the abnormal link needs to be checked according to the method.
Namely, in the step S430, searching and displaying the link with the problem according to the test data specifically includes the following steps:
step S431, searching the packet sending count and the packet receiving count of each port according to the test data;
step S432, judging whether the packet sending count of each port is equal to the packet receiving count;
step S433, when the packet sending count and the packet receiving count of the port are not equal, determining that the line of the port is abnormal;
step S434, displaying the position information of the abnormal port.
In the embodiment, the conventional test mode is improved, so that auxiliary equipment required by the test is simplified, and steps in the test process are simplified, so that the test efficiency of the exchange chip is improved.
Example two
As shown in fig. 8, the present embodiment provides a terminal, which includes a processor 10, and a memory 20 connected to the processor 10, where the memory 20 stores an ethernet link test program, and the ethernet link test program is used for implementing the operation of the ethernet link test method according to the first embodiment when executed by the processor 10; as described above.
EXAMPLE III
The present embodiment provides a storage medium, where the storage medium stores an ethernet link test program, and the ethernet link test program is used for implementing the operations of the ethernet link test method according to the first embodiment when being executed by a processor; as described above.
In summary, the invention uses the ethernet message to test the designated connection port by connecting the designated connection port to the ethernet tester, and sets all the unconnected ports as loopback test ports, and uses the ethernet message to perform forwarding test on the loopback test ports, thereby reducing the service single boards required by the test and realizing a test mode of performing large-flow full coverage on the ethernet exchange link; the invention simplifies the auxiliary equipment required by the test, simplifies the steps in the test process and improves the test efficiency of the exchange chip by improving the traditional test mode.
Of course, it will be understood by those skilled in the art that all or part of the processes of the methods of the above embodiments may be implemented by a computer program instructing relevant hardware (such as a processor, a controller, etc.), and the program may be stored in a computer readable storage medium, and when executed, the program may include the processes of the above method embodiments. The storage medium may be a memory, a magnetic disk, an optical disk, etc.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.
Claims (9)
1. An ethernet link test method, comprising the steps of:
detecting the connection state of a main control board, and determining the port position of the main control board according to the connection state of the main control board;
connecting the appointed connection port to an Ethernet tester, and testing the appointed connection port through an Ethernet message;
detecting the connection ports in the unconnected state, and setting all the unconnected ports as loopback test ports;
acquiring test data in the Ethernet tester, and searching and displaying a link with a problem according to the test data;
the method for acquiring the test data in the Ethernet tester and searching and displaying the link with the problem according to the test data specifically comprises the following steps:
acquiring test data in the Ethernet tester, and judging whether the number of received messages is equal to the number of sent messages according to the test data;
when the number of the received messages is equal to the number of the sent messages, judging that each link is normal;
when the number of the received messages is not equal to the number of the sent messages, searching and displaying a link with a problem according to the test data;
the designated connection ports include a P1 port and a P7 port, and the Ethernet tester includes: an Ethernet tester A and an Ethernet tester B;
sending an Ethernet message through the Ethernet tester A, and receiving the Ethernet message by the Ethernet tester B; and when the Ethernet tester B finishes receiving, sending the Ethernet message through the Ethernet tester B, and receiving the Ethernet message by the Ethernet tester A.
2. The ethernet link testing method according to claim 1, wherein the detecting the connection state of the main control board and determining the port position of the main control board according to the connection state of the main control board specifically comprises the following steps:
detecting the connection state of each connection port, and acquiring the equipment information of the connection equipment from the connected ports;
judging whether the equipment information is the equipment information of the main control board;
when the equipment information is the equipment information of the main control board, judging that the main control board is connected;
and determining the port position of the main control board according to the connection state of the main control board.
3. The ethernet link test method according to claim 1, wherein the connecting the designated connection port to an ethernet tester and testing the designated connection port through an ethernet packet specifically comprises the following steps:
setting a designated connection port as an Ethernet message test port, and connecting the designated connection port to the Ethernet tester;
sending an Ethernet message with a corresponding rate to the specified connection port according to the rate parameter of the specified connection port;
and carrying out data receiving and sending tests on the specified connection port through the Ethernet message.
4. The ethernet link test method according to claim 1, wherein the detecting of the connection ports in the unconnected state and setting all the unconnected ports as loopback test ports specifically comprises the following steps:
detecting the connection ports in the unconnected state, and searching TX signal ends and RX signal ends of all the connection ports in the unconnected state;
and correspondingly connecting the TX signal end and the RX signal end one by one through a CPLD logic chip so as to set all the unconnected ports as loopback test ports.
5. The ethernet link test method according to claim 4, wherein the detecting the connected ports in the unconnected state and setting all the unconnected ports as loopback test ports, further comprises:
grouping all the ports which are not connected, and carrying out message forwarding test on each group of ports through Ethernet messages.
6. The method according to claim 1, wherein the step of searching and displaying the link with the problem according to the test data comprises the following steps:
searching the packet sending count and the packet receiving count of each port according to the test data;
judging whether the packet sending count of each port is equal to the packet receiving count;
when the message packet sending count and the message packet receiving count of the port are not equal, judging that the line of the port is abnormal;
and displaying the position information of the abnormal port.
7. The Ethernet link test method of claim 3, wherein the rate parameters comprise 10Mbsp, 100Mbsp, 1000Mbsp, and 10000 Mbsp.
8. A terminal comprising a processor, and a memory coupled to the processor, the memory storing an ethernet link test program that when executed by the processor is configured to perform the operations of the ethernet link test method of any of claims 1-7.
9. A storage medium storing an ethernet link test program for implementing the operations of the ethernet link test method according to any one of claims 1 to 7 when executed by a processor.
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| CN112118158B (en) * | 2020-09-23 | 2022-11-08 | 苏州浪潮智能科技有限公司 | Test method, test device, test equipment and storage medium of switch |
| CN112968846B (en) * | 2021-02-02 | 2022-08-16 | 武汉迈威通信股份有限公司 | Detection system for illegal short circuit of switch port |
| CN112953857B (en) * | 2021-02-24 | 2022-02-22 | 迈普通信技术股份有限公司 | Method for testing internal channel between boards and distributed network equipment |
| CN113872827B (en) * | 2021-09-10 | 2023-03-24 | 苏州浪潮智能科技有限公司 | Method and device for analyzing snakelike test failure of switch and storage medium |
| CN115955396A (en) * | 2022-12-07 | 2023-04-11 | 篆芯半导体(南京)有限公司 | Method, system, equipment and storage medium for generating Ethernet switching network flow |
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| CN107547281A (en) * | 2017-09-18 | 2018-01-05 | 通鼎互联信息股份有限公司 | A kind of main and standby competition method, apparatus and application apparatus |
| CN110245048A (en) * | 2019-06-04 | 2019-09-17 | 重庆金美通信有限责任公司 | A kind of cabinet intelligent management system and management method |
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