CN111163001A - Method for sharing Flash memory and convergence gateway - Google Patents

Method for sharing Flash memory and convergence gateway Download PDF

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Publication number
CN111163001A
CN111163001A CN201911330832.9A CN201911330832A CN111163001A CN 111163001 A CN111163001 A CN 111163001A CN 201911330832 A CN201911330832 A CN 201911330832A CN 111163001 A CN111163001 A CN 111163001A
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China
Prior art keywords
program
top box
module
gateway
memory
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CN201911330832.9A
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Chinese (zh)
Inventor
刘永波
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Hisense Broadband Multimedia Technology Co Ltd
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Hisense Broadband Multimedia Technology Co Ltd
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Priority to CN201911330832.9A priority Critical patent/CN111163001A/en
Publication of CN111163001A publication Critical patent/CN111163001A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/66—Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/34—Network arrangements or protocols for supporting network services or applications involving the movement of software or configuration parameters 
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/4104—Peripherals receiving signals from specially adapted client devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
    • H04N21/4435—Memory management

Abstract

The embodiment of the application provides a method for sharing a Flash memory and a convergence gateway, when the convergence gateway is powered on, a first system realizes hardware initialization inside the convergence gateway according to a bootstrap program stored in the first system, and after a system of a second system is started, the program of the first system is read from the Flash memory configured in the second system, and is transmitted to the first system through a data transmission channel, so that the system of the first system is started. Compared with the prior art, the first system and the second system share the same Flash memory, and the first system is not provided with the Flash memory, so that the hardware development cost of the convergence gateway is saved, the use efficiency of the Flash memory is improved, and the competitiveness of the convergence gateway is improved.

Description

Method for sharing Flash memory and convergence gateway
Technical Field
The invention relates to the field of network multimedia terminals, in particular to a method for sharing a Flash memory and a convergence gateway.
Background
The fusion equipment integrates equipment with multiple functions into one equipment, and the fusion equipment reduces the number of equipment with single function and is convenient for operators to popularize and maintain, so that the fusion equipment can quickly occupy the market and can be widely applied to various industries.
For example, limited by the model selection scheme of the current convergence gateway, the gateway module and the set-top box module in the current convergence gateway have respective main control chips, and the operating system and the program code of each module are stored in respective Flash memories. The gateway module is responsible for network communication, the set top box module is responsible for audio and video decoding output, and the gateway module and the set top box module are directly connected through a network link to serve as a data transmission channel.
Therefore, in the converged gateway, how to enable the gateway module and the set-top box module to share the same Flash memory so as to save the hardware development cost of the converged gateway and improve the competitiveness of the converged gateway is a problem to be solved urgently by those skilled in the art.
Disclosure of Invention
The embodiment of the application provides a method for sharing a Flash memory and a convergence gateway, wherein the method for sharing the Flash memory is applied to the convergence gateway so as to realize the sharing of the Flash memory among systems in the convergence gateway, save the hardware development cost of the convergence gateway and improve the competitiveness of the convergence gateway.
In a first aspect, an embodiment of the present application provides a method for sharing a Flash memory, where the method is applied to a convergence gateway including a first system and a second system, where the first system and the second system have independent operating systems, and a program of the first system is stored in a Flash memory of the second system, and the method includes:
starting up the first system and the second system;
and after the second system is started up, reading the program of the first system in the Flash memory and transmitting the program to the first system so as to enable the first system to finish starting up.
Optionally, the first system is configured with a first network communication interface, the second system is configured with a second network communication interface, and a network link formed between the first network communication interface and the second network communication interface is used as a data transmission channel of the first system and the second system;
the transmitting to the first system specifically includes:
and the second system transmits the program of the first system to the first system through the data transmission channel.
Optionally, a communication protocol of the first network communication interface and the second network communication interface is a transmission control protocol TCP.
Optionally, the first system is configured to store a boot program,
before the transmission to the first system, the method further comprises:
and the first system completes hardware initialization according to the bootstrap program.
Optionally, the first system is further configured with a first memory and a first memory controller, where the first memory is used to run the program of the first system, and the first memory controller is used to transmit the program of the first system to the first memory;
the first system completes hardware initialization according to the bootstrap program, and specifically includes:
establishing a mapping relation between the first network communication interface and the first memory controller;
the transmitting to the first system specifically includes:
and transmitting the program of the first system read from the first network communication interface to the first memory by the first memory controller through the mapping relation.
Optionally, the Flash memory further includes a program of the second system, and the second system is further configured with a second memory and a second memory controller, where the second memory is used to run the program of the second system, and the second memory controller is used to transmit the program of the second system to the second memory;
before the step after the second system is started up, the method further comprises the following steps:
and the second memory controller reads the program of the second system from the Flash memory and transmits the program of the second system to the second memory for operation.
In a second aspect, an embodiment of the present application provides a convergence gateway, where the convergence gateway includes a set-top box module and a gateway module, where the set-top box module and the gateway module have independent operating systems, and a program of the set-top box module is stored in a Flash memory of the gateway module;
the set-top box module and the gateway module are started;
and after the starting of the set-top box module is finished, the gateway module reads the program of the set-top box module in the Flash memory and transmits the program to the set-top box module so as to enable the set-top box module to finish the starting of the set-top box module.
In a third aspect, an embodiment of the present application further provides another convergence gateway, where the convergence gateway includes a set-top box module and a gateway module, where the set-top box module and the gateway module have independent operating systems, and a program of the gateway module is stored in a Flash memory of the set-top box module;
the gateway module and the set top box module are started;
and after the set top box module is started up, reading the program of the gateway module in the Flash memory and transmitting the program to the gateway module so as to enable the gateway module to finish the startup.
In a fourth aspect, an embodiment of the present application provides a computer device, including:
a memory for storing program instructions;
and the processor is used for calling the program instructions stored in the memory and executing the method for sharing the Flash memory according to the obtained program.
In a fifth aspect, embodiments of the present application provide a computer-readable storage medium storing computer-executable instructions for causing a computer to execute a method for sharing a Flash memory.
The embodiment of the application provides a method for sharing a Flash memory and a convergence gateway, when the convergence gateway is powered on, a first system realizes hardware initialization inside the convergence gateway according to a bootstrap program stored in the first system, and after a system of a second system is started, the program of the first system is read from the Flash memory configured in the second system, and is transmitted to the first system through a data transmission channel, so that the system of the first system is started. Compared with the prior art, the first system and the second system share the same Flash memory, and the first system is not provided with the Flash memory, so that the hardware development cost of the convergence gateway is saved, the use efficiency of the Flash memory is improved, and the competitiveness of the convergence gateway is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a convergence gateway in the prior art according to an embodiment of the present application;
fig. 2 is a second schematic diagram of a convergence gateway in the prior art according to an embodiment of the present application;
FIG. 3 is a flowchart illustrating a method for sharing a Flash memory according to an embodiment of the present disclosure;
fig. 4 is a second schematic flowchart of a method for sharing a Flash memory according to an embodiment of the present application;
fig. 5 is one of schematic structural diagrams of a shared Flash memory in a converged gateway according to an embodiment of the present application;
fig. 6 is a schematic diagram of a network communication interface with a communication rate of 100M according to an embodiment of the present application;
fig. 7 is a third schematic flowchart of a method for sharing a Flash memory according to an embodiment of the present application;
fig. 8 is a second schematic structural diagram of a shared Flash memory in a converged gateway according to an embodiment of the present application;
fig. 9 is a schematic diagram of a network communication interface with a communication rate of 1000M according to an embodiment of the present application;
fig. 10 is a schematic hardware structure diagram of a computer device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first", "second", third "and the like in the various parts of the embodiments and drawings are used for distinguishing similar objects and not necessarily for describing a particular order or sequence. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The method flow diagrams of the embodiments of the invention described below are merely exemplary and do not necessarily include all of the contents and steps, nor do they necessarily have to be performed in the order described. For example, some steps may be broken down and some steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.
The fusion equipment integrates equipment with multiple functions into one equipment, and the fusion equipment reduces the number of equipment with single function and is convenient for operators to popularize and maintain, so that the fusion equipment can quickly occupy the market and can be widely applied to various industries. The convergence gateway is a form of convergence device.
Fig. 1 is a schematic diagram of a convergence gateway in the prior art according to an embodiment of the present application.
As shown in fig. 1, the convergence gateway includes a first system and a second system, data interaction is performed between the two systems through a network communication interface, and the first system and the second system are packaged together in one device, i.e., the convergence gateway. Generally, the convergence gateway includes a set-top box module and a gateway module, that is, when the first system is the set-top box module, the second system is the gateway module, or when the first system is the gateway module, the second system is the set-top box module. In the prior art, a convergence gateway adopts a dual-system structure, wherein a gateway module usually adopts a Linux system, and a set-top box module usually adopts an Android system, so that the two modules are independent of each other, that is, the two systems are independent of each other, and each system has a main chip, a memory, a Flash memory and the like.
The prior art will be described below by taking the first system as a gateway module and the second system as a set-top box module.
Fig. 2 is a second schematic diagram of a convergence gateway in the prior art according to an embodiment of the present application.
As shown in fig. 2, when the gateway module is booted, a memory controller XC1 is configured in a main chip XA1 of the gateway module, the main chip XA1 reads a program XS1 of the gateway module in a Flash memory XF1 and transmits the program XS1 to the memory controller XC1, and the memory controller XC1 transmits the program XS1 of the gateway module to the memory XD1 for operation.
The memory XD1, also known as ddr (double Data Rate sdram), is a bridge for communicating programs with the CPU; the memory controller XC1, also referred to as DDR controller, is used to manage the flow of data to and from the memory XD1, including the boot program XS 1; the Flash memory XF1 is also called as Flash memory, is a long-life nonvolatile memory, and is used for storing a main program, an operating system, an application program and the like in an embedded system; the main chip XA1 further includes a first network communication interface XB1 for enabling communication with the set-top box module at a communication rate of 10M, 100M, 1000M, etc.
Similarly, with respect to the set-top box module side, the power-on start is similar to the gateway module side. That is, the main chip XA2 of the set-top box module is configured with a memory controller XC2, the main chip XA2 reads the program XS2 of the set-top box module in the Flash memory XF2 and transmits the program XS2 to the memory controller XC2, and the memory controller XC2 transmits the program XS2 of the set-top box module to the memory XD2 for operation. For functional explanation of the same components, reference is made to the above description and detailed description is omitted here.
The data and address buses of the memory device are directly connected with the CPU of the main chip and can not be reused in other external systems in a time domain and a space domain, so that the two mutually independent systems of the set top box module and the gateway module can not share the memory device, and the Flash memory is mainly used for storing an operating system and an application program and has no strict requirement on time slots, thereby providing a foundation for the two mutually independent systems of the set top box module and the gateway module to share the Flash memory, realizing the effect of saving the cost of fusing gateway hardware and further improving the competitiveness of products.
Fig. 3 is a schematic flowchart of a method for sharing a Flash memory according to an embodiment of the present disclosure.
As shown in fig. 3, the convergence gateway in the embodiment of the present application includes a first system and a second system, where the first system and the second system have independent operating systems, and a program of the first system is stored in a Flash memory of the second system, and the method includes:
s301, starting up the first system and the second system.
S302, after the second system is started, reading a program of the first system in the Flash memory and transmitting the program to the first system so as to enable the first system to finish starting.
In the converged gateway, a first system and a second system are mutually independent and have respective operating systems, and when the first system is a gateway module, the second system is a set top box module, or when the first system is a set top box module, the second system is a gateway module.
The technical solution of the present application is described below by taking the first system as a gateway module and the second system as a set-top box module as an example.
Fig. 4 is a second flowchart illustrating a method for sharing a Flash memory according to an embodiment of the present application. As shown in fig. 4, the method includes:
and S401, starting up the gateway module and the set top box module.
S402, after the set-top box module is started up and started up.
S403, the set top box module reads the program of the gateway module in the Flash memory.
S404, the set-top box module transmits the program of the gateway module to the gateway module.
S405, the gateway module completes starting.
In the converged gateway, a gateway module and a set-top box module are provided with independent operating systems respectively and finish respective starting and starting, the gateway module and the set-top box module are provided with network communication interfaces, and a network link is formed through the network communication interfaces and is used as a data transmission channel of the gateway module and the set-top box module. The communication protocol between the gateway module and the set-top box module can be a Transmission Control Protocol (TCP), and the communication rate between the two modules can be 10M, 100M, 1000M and the like.
In the embodiment of the application, programs such as an operating system and a program code of the gateway module are stored in a Flash memory of the set-top box module, a bootstrap program of the gateway module is stored in a ROM of the gateway module, and the bootstrap program is used for completing hardware initialization of the gateway module and realizing that a mapping relation is established between an interface of an internal memory controller and a network communication interface of the gateway module.
The ROM is a short name of Read-Only Memory (Read-Only Memory), and is a solid-state semiconductor Memory capable of reading Only data stored in advance. Its property is that once the data is stored, it cannot be changed or deleted. It is commonly used in electronic or computer systems where the data is not required to be changed frequently and the data is not lost due to power down. ROM is simple in structure and easy to read, and is therefore often used to store various fixed programs and data.
When the fusion gateway is electrified and started, the gateway module and the set-top box module are started, after a main system of the set-top box module is started, a program of the gateway module is extracted from a Flash memory of the set-top box module, the program of the gateway module is transmitted to a main system chip of the gateway module through a network link physical channel between the two modules, and after a bootstrap program in the gateway module is started, a mapping relation is already formed between an internal network communication interface and a memory controller interface through hardware initialization, so that the program of the gateway module is directly transmitted to the memory controller interface from the network communication interface and then transmitted to a memory of the gateway module to run. Therefore, the operating system and the program code of the gateway module are transmitted from the Flash memory of the set top box module to the system memory for operation, and the sharing of the Flash of the gateway module and the Flash of the set top box module is realized.
In the above process, the starting process of the set-top box module is similar to that in the prior art, and reference is made to the foregoing description, and details are not repeated here.
Fig. 5 is a schematic structural diagram of a shared Flash memory in a converged gateway according to an embodiment of the present application.
As shown in fig. 5, the set-top box module includes a memory BD2, a main chip BA2, and a Flash memory BF2, where the Flash memory BF2 stores not only a program BS2 of the set-top box module but also a program BS1 of the gateway module, the program BS2 includes a main program, an operating system, and an application program of the set-top box module, and the program BS1 includes a main program, an operating system, and an application program of the gateway module.
In the embodiment of the present application, the set-top box module is similar to the start-up process in the prior art, that is, the main chip BA2 reads the program BS2 from the Flash memory BF2, and directly transmits the program BS2 to the memory BD2 through the internal memory controller BC 2. However, the gateway module differs from the start-up procedure in the prior art, specifically as follows:
in the process of starting the set-top box module, the gateway module completes hardware initialization of the gateway module according to the bootstrap program stored in the main chip BA1, and realizes that the first network communication interface BK1 inside the gateway module establishes a mapping relation with the memory controller DDR 1.
After the set top box module is started, the main chip BA2 in the set top box module reads the program BS1 of the gateway module in the Flash memory BF2 to the second network communication interface BK2, transmits the program BS1 of the gateway module to the first network communication interface BK1 of the gateway module through the network communication link, transmits the program BS1 of the gateway module from the first network communication interface BK1 to the memory controller 1 according to the mapping relationship established by the gateway module, and transmits the program BS1 of the gateway module to the memory controller BD1 for operation by the memory controller DDR1, so that the gateway module is started up.
As shown in fig. 5, in the embodiment of the present application, a data stream of the program BS1 of the gateway module sequentially passes through a Flash memory BF2, a second network communication interface BK2, a first network communication interface BK1, a memory controller DDR1, and a memory BD 1.
Specifically, the communication protocol of the first network communication interface BK1 and the second network communication interface BK2 may be a transmission control protocol TCP, and in this embodiment, the program BS2 of the gateway module is transmitted from the set-top box module to the gateway module, which is to be understood that the set-top box module is a client and the gateway module is a server. It should be noted that the present application is not limited to the communication protocol and the communication connection establishing method, and the above contents are only used for illustration.
Fig. 6 is a schematic diagram of a network communication interface with a communication rate of 100M according to an embodiment of the present application.
Optionally, the network communication interface between the gateway module and the set-top box module has multiple options such as 10M, 100M, 1000M, and the like, and has different connection modes according to different communication rates. As shown in fig. 6, taking the communication rate as 100M as an example, hundred megabyte network communication is realized between the gateway module and the set top box module through two pairs of differential signal lines TXP, TXN, RXP, RXN, which may refer to the prior art specifically and is not described herein again.
The convergence gateway provided by the embodiment of the application comprises a set top box module and a gateway module, wherein the set top box module and the gateway module are provided with independent operating systems, and a program of the gateway module is stored in a Flash memory of the set top box module. When the convergence gateway is powered on, the gateway module and the set top box module are started; after the set-top box module is started up, the program of the gateway module in the Flash memory is read and transmitted to the gateway module, so that the gateway module is started up. Compared with the prior art, the gateway module and the set top box module share the same Flash memory, and the gateway module is not provided with the Flash memory, so that the hardware development cost of the convergence gateway is saved, the use efficiency of the Flash memory is improved, and the competitiveness of the convergence gateway is improved.
Correspondingly, the technical solution of the present application is described below by taking the first system as a set-top box module and the second system as a gateway module as an example.
Fig. 7 is a third schematic flowchart of a method for sharing a Flash memory according to an embodiment of the present application. As shown in fig. 7, the method includes:
and S701, starting up the set top box module and the gateway module.
S702, after the gateway module is started up and started up.
S703, the gateway module reads the program of the set-top box module in the Flash memory.
S704, the gateway module transmits the program of the set-top box module to the set-top box module.
S705, the set-top box module completes the startup.
When the Flash memory is in the gateway module, the Flash memory is used for storing the operating program, the program code and the like of the set-top box module in addition to the operating system, the program code and the like of the gateway module, similar to the process of the Flash memory in the set-top box module.
The bootstrap program of the set-top box module is stored in the ROM of the set-top box module, and the bootstrap program is used for finishing the hardware initialization of the set-top box module and realizing the establishment of the mapping relation between the interface of the internal controller and the network communication interface.
When the fusion gateway is electrified and started, the set top box module and the gateway module are started, after a main system of the gateway module is started, a program of the set top box module is extracted from a Flash memory of the gateway module, the program of the set top box module is transmitted to a main system chip of the set top box module through a network link physical channel between the two modules, and after a bootstrap program in the set top box module is started, a mapping relation is already formed between an internal network communication interface and a memory controller interface through hardware initialization, so that the program of the set top box module is directly transmitted to the memory controller interface from the network communication interface and then transmitted to a memory device of the set top box module to run. Therefore, the operating system and the program codes of the set top box module are transmitted from the Flash memory of the gateway module to the memory device of the system to run, and the Flash of the set top box module and the Flash of the gateway module are shared.
In the above process, the starting process of the gateway module is similar to that in the prior art, and reference may be made to the foregoing description, which is not repeated herein.
Fig. 8 is a second schematic structural diagram of a shared Flash memory in a converged gateway according to an embodiment of the present application.
As shown in fig. 8, the gateway module includes a memory BD1, a main chip BA1, and a Flash memory BF1, where the Flash memory BF1 stores not only the program BS2 of the set-top box module but also the program BS1 of the gateway module, the program BS2 includes the main program, the operating system, and the application program of the set-top box module, and the program BS1 includes the main program, the operating system, and the application program of the gateway module.
In the embodiment of the present application, the gateway module is similar to the start process in the prior art, that is, the main chip BA1 reads the program BS1 from the Flash memory BF1, and directly transmits the program BS1 to the memory BD1 through the memory controller BC1 therein for operation. However, the set-top box module differs from the prior art start-up procedure by the following:
in the starting process of the gateway module, the set-top box module completes the hardware initialization of the gateway module according to the bootstrap program stored in the main chip BA2, and realizes that the mapping relationship is established between the second network communication interface BK2 and the memory controller DDR 2.
After the gateway module is started, the main chip BA1 in the gateway module reads the program BS2 of the set-top box module in the Flash memory BF1 to the first network communication interface BK1, transmits the program BS2 of the set-top box module to the second network communication interface BK2 of the set-top box module through the network communication link, transmits the program BS2 of the set-top box module from the second network communication interface BK2 to the memory controller DDR2 according to the mapping relationship established by the set-top box module, and transmits the program BS2 of the set-top box module to the memory BD2 for operation by the memory controller DDR2, so that the set-top box module is started.
As shown in fig. 8, in the embodiment of the present application, a data stream of the program BS2 of the set top box module sequentially passes through the Flash memory BF1, the first network communication interface BK1, the second network communication interface BK2, the memory controller DDR2, and the memory device BD 2.
Fig. 9 is a schematic diagram of a network communication interface with a communication rate of 1000M according to an embodiment of the present application.
Optionally, the network communication interface between the gateway module and the set-top box module has multiple options such as 10M, 100M, 1000M, and the like, and has different connection modes according to different communication rates. As shown in fig. 9, for example, the communication rate is 1000M, gigabit network communication is realized between the set-top box module and the gateway module through four pairs of bidirectional differential signal lines, which may specifically refer to the prior art and is not described herein again.
The convergence gateway provided by the embodiment of the application comprises a set top box module and a gateway module, wherein the set top box module and the gateway module are provided with independent operating systems, and programs of the set top box module are stored in a Flash memory of the gateway module. When the convergence gateway is powered on, the set top box module and the gateway module are started; after the start-up of the set-top box module is finished, the gateway module reads a program of the set-top box module in the Flash memory and transmits the program to the set-top box module so that the set-top box module finishes the start-up. Compared with the prior art, the set top box module and the gateway module share the same Flash memory, and the set top box module is not provided with the Flash memory, so that the hardware development cost of the convergence gateway is saved, the use efficiency of the Flash memory is improved, and the competitiveness of the convergence gateway is improved.
Fig. 10 is a schematic hardware structure diagram of a computer device according to an embodiment of the present application. As shown in fig. 10, the computer device 1000 is configured to implement the operation corresponding to the convergence gateway in any of the method embodiments described above, and the computer device 1000 of this embodiment may include: a memory 1001 and a processor 1002;
a memory 1001 for storing a computer program;
the processor 1002 is configured to execute the computer program stored in the memory to implement the method for sharing the Flash memory in the above embodiments. Reference may be made in particular to the description relating to the method embodiments described above.
Alternatively, the memory 1001 may be separate or integrated with the processor 1002.
When the memory 1001 is a separate device from the processor 1002, the computer apparatus 1000 may further include:
a bus 1003 is used to connect the memory 1001 and the processor 1002.
Optionally, this embodiment may further include: a communication interface 1004, which communication interface 1004 may be coupled to processor 1002 by a bus 1003. The processor 1002 may control the communication interface 1004 to implement the above-described receiving and transmitting functions of the computer device 1000.
The present invention also provides a computer-readable storage medium comprising a computer program for implementing the method of sharing a Flash memory as in the above embodiments.
In some embodiments provided in the present application, it should be understood that the Processor may be a Central Processing Unit (CPU), other general purpose processors, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present invention may be embodied directly in a hardware processor, or in a combination of the hardware and software modules within the processor.
The memory may comprise a high-speed RAM memory, and may further comprise a non-volatile storage NVM, such as at least one disk memory, and may also be a usb disk, a removable hard disk, a read-only memory, a magnetic or optical disk, etc.
The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, the buses in the figures of the present invention are not limited to only one bus or one type of bus.
The computer-readable storage medium may be implemented by any type or combination of volatile or non-volatile memory devices, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. A method for sharing Flash memory, which is applied to a convergence gateway comprising a first system and a second system, wherein the first system and the second system have independent operating systems, and a program of the first system is stored in the Flash memory of the second system, and the method comprises the following steps:
starting up the first system and the second system;
and after the second system is started up, reading the program of the first system in the Flash memory and transmitting the program to the first system so as to enable the first system to finish starting up.
2. The method of claim 1, wherein the first system is configured with a first network communication interface, the second system is configured with a second network communication interface, and a network link formed between the first network communication interface and the second network communication interface is used as a data transmission channel of the first system and the second system;
the transmitting to the first system specifically includes:
and the second system transmits the program of the first system to the first system through the data transmission channel.
3. The method of claim 2, wherein the communication protocol of the first network communication interface and the second network communication interface is Transmission Control Protocol (TCP).
4. The method of claim 2, wherein the first system is configured to have a boot program stored therein,
before the transmission to the first system, the method further comprises:
and the first system completes hardware initialization according to the bootstrap program.
5. The method according to claim 4, wherein the first system is further configured with a first memory for running the program of the first system and a first memory controller for transmitting the program of the first system to the first memory;
the first system completes hardware initialization according to the bootstrap program, and specifically includes:
establishing a mapping relation between the first network communication interface and the first memory controller;
the transmitting to the first system specifically includes:
and transmitting the program of the first system read from the first network communication interface to the first memory by the first memory controller through the mapping relation.
6. The method according to claim 1, wherein the Flash memory further includes a program of the second system, and the second system is further configured with a second memory and a second memory controller, the second memory is used for running the program of the second system, and the second memory controller is used for transmitting the program of the second system to the second memory;
before the step after the second system is started up, the method further comprises the following steps:
and the second memory controller reads the program of the second system from the Flash memory and transmits the program of the second system to the second memory for operation.
7. A convergence gateway comprises a set-top box module and a gateway module, wherein the set-top box module and the gateway module are provided with independent operating systems, and programs of the set-top box module are stored in a Flash memory of the gateway module;
the set-top box module and the gateway module are started;
and after the starting of the set-top box module is finished, the gateway module reads the program of the set-top box module in the Flash memory and transmits the program to the set-top box module so as to enable the set-top box module to finish the starting of the set-top box module.
8. A convergence gateway comprises a set-top box module and a gateway module, wherein the set-top box module and the gateway module are provided with independent operating systems, and programs of the gateway module are stored in a Flash memory of the set-top box module;
the gateway module and the set top box module are started;
and after the set top box module is started up, reading the program of the gateway module in the Flash memory and transmitting the program to the gateway module so as to enable the gateway module to finish the startup.
9. A computing device, comprising:
a memory for storing program instructions;
a processor for calling program instructions stored in said memory to execute the method of any one of claims 1 to 6 in accordance with the obtained program.
10. A computer-readable storage medium having stored thereon computer-executable instructions for causing a computer to perform the method of any one of claims 1 to 6.
CN201911330832.9A 2019-12-20 2019-12-20 Method for sharing Flash memory and convergence gateway Pending CN111163001A (en)

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Application publication date: 20200515