CN111158660A - Multi-mode satellite-borne software EEPROM on-orbit programming method - Google Patents
Multi-mode satellite-borne software EEPROM on-orbit programming method Download PDFInfo
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Abstract
The invention discloses an on-orbit programming method of a multi-mode satellite-borne software EEPROM, which comprises the following steps: step S1, after the main function software is loaded and operated, an EEPROM programming information table is generated through instruction notation; step S2, dynamically programming EEPROM software; step S3, guiding the software to run according to the EEPROM software programming storage information; and step S4, programming the mask sub-function software through a single address. The invention can realize the functions of main function software programming, sub-function software programming, EEPROM local address modification and the like in a software dynamic running state by selecting a programming mode, a plurality of EEPROM on-orbit programming methods and a guiding running mechanism of satellite-borne software, the main function software and the sub-function software share an EEPROM storage area, when the software is guided to run, whether the sub-function software is moved to run or not can be judged, when the sub-function software is not moved to the field, the running of the main function software is not influenced, and errors caused by incompatibility of the main function software and the sub-function software can be prevented; and sub-function software can be quickly shielded in a single address repair mode.
Description
Technical Field
The invention belongs to the field of on-orbit programming of satellite-borne computer software, and particularly relates to an on-orbit programming method of multi-mode satellite-borne software EEPROM.
Background
The on-orbit programming function of the on-board computer software is an important function of the on-board computer software, and has important significance for on-orbit function extension and debugging of the software. Software on-rail programming typically includes SRAM on-rail programming and EEPROM on-rail programming. Although the latter can realize the power-down retention of the programming software, the implementation process is relatively complex, and the software restoration after the programming is also relatively complex.
Disclosure of Invention
The invention aims to provide an on-orbit programming method of a multi-mode satellite-borne software EEPROM. The method is flexible and reliable in implementation process, can be used for on-orbit programming of various satellite-borne software, and is also suitable for on-application programming of other embedded system software.
In order to achieve the above purpose, the invention is realized by the following technical scheme:
a multi-mode on-board software EEPROM on-track programming method comprises the following processes:
step S1, after the main function software is loaded and operated, an EEPROM programming information table is generated through instruction notation; the programming information table content includes: software programming mode (main function software programming and sub function software programming), programming copy number and address, EEPROM programming page size, check identifier word and other information. The sub-function software is required to be injected in advance under the sub-function software programming mode so as to ensure the correctness of programming codes;
step S2, dynamically programming EEPROM software; after the programming information table is generated and confirmed to be correct, the EEPROM software programming can be started. The EEPROM programming content consists of three parts: the method comprises the steps of checking identification words, a software moving field operation initial address and a software object code, wherein the checking identification words comprise 8-bit crc checking and software length. When the main function software is selected for programming, the programming starting address is the first address of the EEPROM space, the programming scale is a single EEPROM storage area space, and the idle area is filled with '0'; when the sub-function software is selected for programming, the programming starting address is the backward first page alignment address of the last storage address of the main function software in the EEPROM space, the programming scale is the actual size of the sub-function code, and the last address of the EEPROM is reserved for storing the 32-bit crc check word flg0 of the main function software; wherein, the "programming scale" refers to the total space occupied by the code to be programmed;
step S3, guiding software to run according to EEPROM programming storage information; after the computer is powered on or reset to run again, the main function software stored in the multimode redundancy mode is guided to run by the guiding software, the software is guided to run according to the correctness verified by the software check identifier word and the software moving field running address, and the guiding running mode is recorded (3, 2-way guiding, single-part guiding and the like). After the main function software runs (before the sub-function software), calculating a 32-bit crc check word flg1, acquiring a final address check word flg0 of a corresponding EEPROM space according to a guide moving field mode, and if the flg0 is the same as the flg1, guiding the sub-function software and verifying the correctness; otherwise, the sub-function software is not guided;
step S4, shielding the sub-function software through single address programming; during the on-track running of the software, if the sub-function software fails or only the main function software needs to be restored, the 32-bit check word flg0 stored in the corresponding EEPROM space end address can be modified through single-address programming. After the check word is modified, the sub-function software is not booted any more because the flg1 and the flg0 are not the same in the software booting process.
Preferably, the EEPROM software programming function can implement main function software programming, sub-function software programming, and single address software programming, wherein the main function software is carrier software of the EEPROM in-orbit programming software and is used for implementing main functions of satellite-borne software, the sub-function software is "patch" software of the main function software and is used for implementing in-orbit programming software for debugging, function expansion, and the like of the main function software in-orbit, and the in-orbit software is injected into the SRAM in a remote control injection manner.
Preferably, the EEPROM programming information table contains the following: software programming mode, programming copy number and address, EEPROM programming page size, check identifier word and other information. The software programming mode is used for selecting main function software programming or sub-function software programming; the programmed number of copies is used for selecting a redundant backup EEPROM space; the programming address is used for indicating the starting address of the current source code and the destination EEPROM address; the programming identification word comprises code check and code length.
Preferably, the main function software and the sub function software share an EEPROM storage space, the storage start address of the main function software is the EEPROM start address, and the storage start address of the sub function software is aligned backward by page from the storage end address of the main function software, so that the failure of programming the driver function software due to the misalignment of pages is prevented.
Further, the step S3 further includes the following processes:
the method comprises the steps that boot software is used for realizing boot moving of main function software, the software is moved according to the priority sequence of 3 taking 2- > 1 st- > 2 nd- > 3 rd, the moving field checks identification words and software moving field operation first addresses according to software of the EEPROM first addresses, the moving field result is checked, if the check is correct, a PC is jumped to an entry address of the main function software to operate, and if the check is not correct, the next moving field is performed in sequence;
after the main function software runs, detecting a 32-bit crc check word flg0 stored in a corresponding EEPROM space end address according to the current boot moving mode, calculating a 32-bit crc check word flg1 of the main function software, if the flg0 is the same as the flg1, booting the moving sub-function software according to the current boot moving mode, and calling an SRAM programming processing module to realize the debugging, function expansion and other repairs of the sub-function software on the main function software after the sub-function software is successfully moved; when the flg0 and the flg1 are different or the sub-function software fails to move, only the main function software is operated.
Preferably, the check word flg0 is a main function software 32-bit crc check word stored when the sub-function software is used for programming the EEPROM, and the flg1 is a main function software 32-bit crc check word calculated before the main function software guides the sub-function software. The consistency of the flg0 and the flg1 is mainly determined by judging the version consistency of the main function software and the sub-function software, so that the main function software and the sub-function software are prevented from being incompatible.
Compared with the prior art, the invention has the following advantages:
1) the EEPROM software programming mode is diversified, and main function software programming, sub-function software programming and EEPROM single address modification can be realized, wherein the sub-function software is mainly used for performing error repair, function expansion and the like on the main function software.
2) The main function software and the sub-function software share an EEPROM storage area, only the main function software can be stored, the main function software and the sub-function software can also be stored at the same time, and the storage address of the sub-function software is dynamically adjusted according to the EEPROM space occupied by the main function software.
3) When the software is guided to run, whether the sub-function software is moved to the field or not can be judged according to the correctness of the software programming information, and the running of the main function software is not influenced when the sub-function software is not moved to the field or fails to move to the field.
4) When the sub-function software is subjected to EEPROM programming, the storage structure of the main function software is not damaged, and the operation error of the main function software caused by the field moving failure of the factor function software is prevented; meanwhile, the incompatibility of the main function software and the sub-function software is prevented through checking the version consistency of the main function software and the sub-function software.
5) The sub-function software can be quickly shielded in a single address repair mode without erasing the sub-function software space.
Drawings
FIG. 1a is a schematic diagram of a memory space structure of an EEPROM; FIG. 1b is a software storage structure in EEPROM, showing "patch" software, i.e., sub-function software;
FIG. 2 is a main flow of EEPROM programming;
FIG. 3 is a flow chart of EEPROM programming information generation;
FIG. 4 is a flow chart of a single-copy EEPROM programming process;
FIG. 5 is a flow chart of EEPROM single address programming process;
FIG. 6 is a main functional software boot flow;
fig. 7 is a sub-function software boot main flow.
Detailed Description
The present invention will now be further described by way of the following detailed description of a preferred embodiment thereof, taken in conjunction with the accompanying drawings.
As shown in fig. 1a, the EEPROM storage space of the present embodiment includes: main function software, sub-function software ("patch" software), and main function software checkwords.
As shown in fig. 1b, in this embodiment, the EEPROM storage space is configured to be 3MB, the software is stored in 6 shares, each share is 512KB, and includes 3 main software (main 1 software, main 2 software, main 3 software) and 3 backup software (backup 1 software, backup 2 software, backup 3 software), and the main and backup software are stored in a cross manner. The single-copy EEPROM memory allocation is as follows: the main function software identification word, the main function software moving address, the main function software, the free space, the patch software identification word, the patch software moving address, the patch software, the free space and the main function software check flg 0.
As shown in fig. 2, the method for on-track programming of a multi-mode satellite-borne software EEPROM according to the present invention includes the following steps:
step S1, after the main function software is loaded and operated, an EEPROM programming information table is generated through instruction notation; the programming information table content includes: software programming mode (main function software programming and sub function software programming), programming copy number and address, EEPROM programming page size (in this example, the EEPROM programming page is 128 words), check identification words and other information. The sub-function software is injected in advance in the programming mode of the sub-function software to ensure the correctness of the programming code.
S1.1, after the main function software is loaded and operated, judging whether to allow the generation of programming information:
if yes, go to S1.2;
if not, directly jumping into S2.3;
s1.2, initializing a programming state; acquiring programming information: programming length, original programming length of EEPROM, programming number, effective state of length, programming mode and EEPROM page size; a program valid status word (length valid, program mode valid, program EEPROM copy number valid).
The EEPROM programming information generation flow is shown in fig. 3:
s11, starting, clearing the total length of programming is 0, clearing the length of the reserved programming check word is 0, and counting the number of EEPROM programming copies; judging whether the main function software is programmed:
if yes, the programming mode is the main function, and the step is entered into S12;
if not, judging whether the sub-function software is programmed: if Y, the programming mode is a sub-function, and S12 is entered; if N, no programming mode is performed, and S12 is entered.
S12, judging whether the software is programmed for the sub-function:
if so, the programming start offset is equal to the main function software length + the reserved information length, the programming start offset is aligned according to 1KB byte, the programming length is equal to the sub-function code length + the reserved information length + the programming information length, and the reserved programming check word length is equal to 4; proceeding to S13;
if not, judging whether the software is programmed for the main function or not: if the value is Y, the program start offset is 0, the program length is the main function software length + the reserved information length, and the reserved program check word length is 0, and the process proceeds to S13; if the value is N, the program start offset is 0, the program length is 0, and the reserved program check word length is 0; proceed to S13.
S13, total programming length, judging whether the total programming length does not exceed a single EEPROM space and is aligned with 4 bytes:
if yes, the programming length is valid, and the process goes to S14;
if not, the programming length is invalid, and the step S14 is entered;
and S14, programming the page size, resetting the remote control parameter and ending.
Step S2, dynamically programming EEPROM software; after the programming information table is generated and confirmed to be correct, the EEPROM software programming can be started.
The EEPROM programming content consists of three parts: the check mark word + software moving field operation initial address + software object code (main function software or sub function software), the check mark word is composed of 8 bits crc check + software length.
When the main function software is selected for programming, the programming starting address is the first address of the EEPROM space, the programming scale is a single EEPROM storage area space, and an idle area (namely an idle space) is filled with '0'; when the sub-function software is selected for programming, the programming starting address is the first page alignment address (1 KB alignment in the example for adapting to the page space size of different EEPROM chips) backward of the last storage address of the main function software in the EEPROM space, the programming scale is the actual size of the sub-function code, and the last address of the EEPROM (the last 4 bytes of the 512KB space in the example) is reserved for storing the 32-bit crc check word flg0 of the main function software.
As shown in fig. 2, step S2 specifically includes:
s2.1, judging whether the programming information is effective (the length is effective, the programming mode is effective, and the number of the programmed EEPROM copies is effective); if yes, go to S2.2; if not, directly jumping to S2.3.
S2.2, judging whether the main function software programming mode is adopted:
if so, the initial address of the code to be programmed is the initial address of the main function software;
if not, the initial address of the code to be programmed is the initial address of the sub-function software;
the programming destination address is EEPROM base address + programmed code length + nth memory space offset;
calculating a program code crc check word crc 8;
and a program status word, which is generated.
S2.3, judging whether the EEPROM programming is allowed:
if yes, go to S2.4;
if not, go to S2.3.1 to determine whether EEPROM programming is not allowed: if the number is N, ending; if the number is Y, entering a clear permission state, and ending;
s2.4, judging whether the programming identifier word is generated:
if not, ending;
if so, setting the programming state as the nth programming; starting the nth programming; entering S2.5;
s2.5, judging whether the programming is normal:
if so, setting the programming state as the nth programming effective, and entering S2.6;
if not, setting the programming state as the nth programming invalid, and jumping to S2.7;
s2.6, judging whether the software is programmed by the sub-function software:
if yes, calculating the EEPROM tail address; writing the check word of the main function software into the end address; entering S2.7;
if not, directly entering S2.7;
s2.7, resetting the EEPROM programming information and ending programming.
As shown in fig. 4, the single-copy EEPROM programming process flow includes:
s21, start, preset programming verification failure, set programming length, judge whether the programming page size is valid and the length is not 0:
if yes, the first word of the first page data is filled with a programming identification word, the second word is filled with a starting address, a source data starting address, a programming target address, a code array offset to be programmed is 2, a source code offset is 0, the number of bytes is also counted, the effective code programming page number and the single EEPROM total page number are set; proceeding to S22;
if not, setting the programming result as an error and returning, and ending.
S22, judging whether the software is programmed for the sub-function:
if yes, the single-copy programming total page number is taken as the valid code page number, and the process goes to S23;
if not, the flow proceeds directly to S23.
S23, determining whether to program all (Count all) page codes in sequence:
if yes, proceed to S24:
if not, calculating the programming result crc check word crc8 of the EEPROM as 0, generating a programming result identification word, acquiring the programming identification word in the EEPROM, and judging whether the two words are consistent: if Y, setting the programming result to be correct and returning, and ending; and if the number is N, setting the programming result to be wrong, returning and ending.
S24, judging whether to fill the code array to be programmed according to the page size:
if yes, adding 1 to the offset of the code array to be coded, adding 1 to the offset of the source code, and entering S25;
if not, calling an EEPROM page programming module to burn, and updating a programming source address and a programming destination address; jumping to S23;
s25, determine whether the valid code page number is not complete:
if yes, filling the code array to be programmed with effective codes, and jumping to S24;
if not, the code array to be programmed is filled with 0, and the process jumps to S24.
Step S3, guiding software to run according to EEPROM programming storage information; after the computer is powered on or reset to run, the boot software guides the running of the multimode redundant stored main function software (in this example, 3 pieces of main software or 3 pieces of standby software).
The software boot strap priority in this example is: the main software 3 takes 2- > 1 st main software- > 2 nd main software- > 3 rd main software- > backup software 3 takes 2- > 1 st backup software- > 2 nd backup software- > 3 rd backup software. And guiding the software to run according to the correctness verified by the software verification identifier word and the software moving field running address, and recording a guiding running mode (primary software or backup software, 3-out-of-2 guiding, single-copy guiding and the like).
The main function software boot flow is shown in fig. 6, and includes:
s3.1, firstly, judging whether the resetting times are less than 3 times within half an hour:
if yes, the shifting offset address takes the main software offset, and S3.2 is entered;
if not, the shift address of the moving field takes the backup software shift, and the S3.2 is entered
S3.2, judging whether to take 2 from 3, 1 st main software, 2 nd main software and 3 rd main software according to the priority cyclic moving field:
if yes, go to S3.3;
if not, go to S3.2.1;
s3.2.1, judging whether the on-site moving is the main part:
if the address is Y, the master software fails to move, the moving offset address takes the offset of the backup software, and S3.2 is skipped;
if the number is N, the main software moving field and the backup software moving field both fail to move, the identification word of the 1 st main function software of the main part is obtained, the moving field address of the 1 st main function software of the main part is obtained, the length is calculated according to the identification word, the 1 st software code of the corresponding length of the moving field is recorded, the moving field mode (the 1 st main function software is not checked), the PC jumps to the main function software entrance of the SRAM area to run, and the operation is finished.
S3.3, judging whether to take 2 moving places or not:
if so, 3, 2 is taken to obtain a main function software identification word, 3, 2 is taken to obtain a main function software moving address, a check word and a length are calculated according to the identification word, and 3, a code with the corresponding length of the moving field is taken 2, and a moving field result check word is calculated; entering S3.4;
if not, entering a single moving field mode, acquiring the identification word of the main function software, acquiring the moving field address of the main function software, calculating the check word and the length according to the identification word, calculating the moving field result check word according to the software code with the corresponding length of the moving field, and entering S3.4.
S3.4, judging whether the checking result is incorrect:
if so, the moving field fails, and S3.2 is jumped in;
if not, the field moving is successful, the field moving mode (main copy, backup, 2 out of 3, single copy) is recorded, the PC jumps to the main function software entrance of the SRAM area to run, and the operation is finished.
After the main function software runs, calculating a 32-bit crc check word flg1, acquiring a final address check word flg0 of a corresponding EEPROM space according to a boot moving mode, if the flg0 is the same as the flg1, booting the moving sub-function software according to the boot moving mode, and calling an SRAM programming processing module to realize the repair of the sub-function software on debugging, function expansion and the like of the main function software after the sub-function software is successfully moved; when the flg0 and the flg1 are different or the sub-function software fails to move, only the main function software is operated.
As shown in fig. 7, the sub-function software boot process includes:
s31, starting to acquire a main function software moving mode (main copy, backup, 2 out of 3 and single copy), and judging whether the main function software is moved:
if yes, the moving field offset address takes the main software offset, and the process goes to S32;
if not, the shift address of the moving field takes the offset of the backup software, and the step enters S32;
s32, judging whether to take 2 delivery fields from 3:
if so, taking 2 from 3 to obtain a main function software check word flg0, and entering S33;
if not, acquiring the check word flg0 of the main function software, and entering S33;
s33, calculating a check word flg1 of the main function software, and judging whether the check words are consistent or not:
if yes, calculating the start offset of the sub-function software according to the size of the main function software, and entering S34;
if not, only the main function software is operated, and the operation is finished.
S34, judging whether to take 2 delivery fields from 3:
if so, take the 2-way mode for 3, calculate from off, Bin _ len 0: taking 2 from the 3 to obtain a sub-function software identifier word, taking 2 from the 3 to obtain a sub-function software moving address, calculating a check word and a length according to the identifier word, taking 2 from a code with a corresponding length of moving, calculating a moving result check word, and entering S35;
if not, the method is a single-shift mode, and according to off and Bin _ len0, the following calculation is carried out: acquiring the identifier word of the sub-function software, acquiring the moving address of the sub-function software, calculating a check word and a length according to the identifier word, calculating a moving result check word according to the software code with the corresponding length of the moving field, and entering S35;
s35, judging whether the checking result is correct:
if yes, calling SRAM programming processing software to realize the repair of the sub-function software to the main function software, and ending;
if not, the moving is successful, and the process is finished.
Step S4, shielding the sub-function software through single address programming; during the on-track running of software, if sub-function software fails or only the main function software needs to be restored, the 32-bit check word flg0 stored in the corresponding EEPROM space end address can be modified through single-address programming, and in the example, only the EEPROM space end address and any data different from the flg0 (default is 0) need to be injected. After the check word is modified, the sub-function software is not booted any more because the flg1 and the flg0 are not the same in the software booting process.
As shown in fig. 5, the single address programming flow includes:
starting, judging whether the programming address range is valid:
if yes, calculating the initial address of the EEPROM according to the number of the EEPROM chips; and opening the EEPROM software protection lock, writing data into the address and ending.
And if not, ending.
In summary, the invention provides an on-orbit programming method for a multi-mode satellite-borne software EEPROM, which can realize the functions of main function software programming, sub-function software programming, EEPROM local address modification and the like in a software dynamic running state by selecting a programming mode; the main function software is main function realization software for completing the functions of the computer system, and the sub-function software is 'patch' software mainly used for realizing debugging, function expansion and the like of the main function software and is injected into the SRAM in a remote data injection mode; when the computer is powered on or reset and started again, the software boot process can realize the correct boot operation of the stored software according to the programming storage information in the EEPROM. And can realize the fast shielding of the sub-function software to realize the software state restoration.
Compared with the prior art, the invention has the advantages that: firstly, the on-track programming of EEPROM software in various modes can be realized; the main function software and the sub-function software share an EEPROM storage area, so that only the main function software can be stored, and the main function software and the sub-function software can be stored at the same time; when the software is guided to run, whether the sub-function software is moved to run or not can be judged according to the correctness of the programming storage information, the running of the main function software is not influenced when the sub-function software is not moved, and errors caused by incompatibility of the main function software and the sub-function software can be prevented; fourthly, the sub-function software can be rapidly shielded in a single address repair mode.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.
Claims (10)
1. A multi-mode satellite-borne software EEPROM on-track programming method is characterized by comprising the following steps:
step S1, after the main function software is loaded and operated, an EEPROM programming information table is generated through instruction notation; the programming information table content includes: the method comprises the following steps of selecting a main function software programming mode or a sub function software programming mode, wherein the main function software programming mode comprises a software programming mode, a programming copy number, a programming address, an EEPROM programming page size and check identifier word information;
step S2, EEPROM software dynamic programming: after the programming information table is generated and the correctness is confirmed, starting the EEPROM software programming; the EEPROM software programming content consists of three parts: checking the identification words, the software moving field operation first address and the software object code;
step S3, guiding the software to run according to the EEPROM software programming storage information: after the computer is powered on or reset to run, the boot software guides the running of the multimode redundancy stored main function software, guides the running of the software according to the correctness verified by the software check identifier word and the software moving field running address, and records the boot running mode; after the main function software runs, calculating a 32-bit crc check word flg1 of the main function software, acquiring a final address check word flg0 of a corresponding EEPROM space according to a boot moving field mode, and if the flg0 is the same as the flg1, booting the sub function software and verifying the correctness; otherwise, the sub-function software is not guided;
step S4, shielding the sub-function software by single address programming: during the on-track running of software, if the sub-function software fails or only the main function software needs to be restored, modifying a 32-bit check word flg0 stored in the corresponding EEPROM space end address through single-address programming; after the check word is modified, the sub-function software is not booted any more because the flg1 and the flg0 are not the same in the software booting process.
2. The method for on-track programming of a multi-mode on-board software EEPROM as claimed in claim 1, wherein the number of programming copies is used to select a redundant backup EEPROM space; the programming address is used for indicating the starting address of the current source code and the target EEPROM address; the check identification word comprises code check and code length.
3. The on-track programming method of multi-mode satellite-borne software EEPROM of claim 1, characterized in that when the main function software programming is selected, the programming starting address is the first address of the EEPROM space, the programming size is a single EEPROM storage area space, and the free area is filled with '0'.
4. The on-track programming method of multi-mode satellite-borne software EEPROM of claim 1, characterized in that when the sub-function software programming is selected, the programming starting address is the first page aligned address backward of the main function software last storage address in the EEPROM space, the programming size is the actual size of the sub-function code, and the EEPROM last address is reserved for storing the 32-bit crc check word flg0 of the main function software.
5. The on-track programming method of multi-mode satellite-borne software EEPROM of claim 4, characterized in that in the sub-function software programming mode, the sub-function software is injected in advance to ensure the correctness of the programming code.
6. The on-track programming method of the multi-mode satellite-borne software EEPROM of claim 1, wherein the main function software and the sub-function software share EEPROM storage space, the storage start address of the main function software is the EEPROM start address, and the storage start address of the sub-function software is aligned backwards page by page from the storage end address of the main function software, so that the problem that the programming of the driver function software fails due to the misalignment of the pages is prevented.
7. The on-track programming method of multi-mode satellite-borne software EEPROM of claim 1, wherein in step S2, the check identification word is composed of 8 bits of crc check and software length.
8. The on-track programming method of multi-mode on-board software EEPROM of claim 1, wherein in step S3, the boot mode of operation is selected to be 2 boots or single boot.
9. The on-track programming method of multi-mode on-board software EEPROM of claim 1, wherein step S3 further comprises:
1) the boot software realizes boot loading of the main functional software: moving the software according to the priority sequence of 3 taking 2, 1 st, 2 nd, 2 rd and 3 rd, checking the identifier word and the software moving field operation first address of the EEPROM first address according to the moving field, checking the moving field result, and jumping the PC to the main function software entry address to operate if the check is correct, or else, moving the next time according to the sequence;
2) after the main function software runs, detecting a 32-bit crc check word flg0 stored in a corresponding EEPROM space end address according to the current boot moving mode, calculating a 32-bit check word flg1 of the main function software, and if the flg0 is the same as the flg1, booting the moving sub-function software according to the current boot moving mode;
3) after the sub-function software is successfully moved, calling an SRAM (static random access memory) programming processing module to realize debugging and function expanding repair of the sub-function software on the main function software; when the flg0 and the flg1 are different or the sub-function software fails to move, only the main function software is operated.
10. The on-track programming method of the multi-mode satellite-borne software EEPROM of claim 1, wherein the check word flg0 is a main function software 32-bit crc check word stored by the sub-function software during the EEPROM programming, and flg1 is a main function software 32-bit crc check word calculated before the main function software guides the sub-function software.
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