CN111107282B - Video switching method, video switcher, electronic device and storage medium - Google Patents
Video switching method, video switcher, electronic device and storage medium Download PDFInfo
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Abstract
The invention provides a video switching method, a video switcher, electronic equipment and a storage medium. The method comprises the following steps: after the video signal source is accessed, the decoding chip receives video data sent by the video signal source accessed by the decoding chip and decodes the video data; after the FPGA is accessed to the display, receiving a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier, acquiring a video format supported by the display, and transmitting the video format to a decoding chip through a switch chip; the decoding chip determines to convert the format according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, encapsulates the converted video data into a data packet and transmits the data packet to the exchanger chip; the FPGA selects a data packet corresponding to the display from the switch chip and sends the data packet to the display. The invention can be compatible with any type of interface and can adapt to the scene with complex interface.
Description
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to a video switching method, a video switcher, an electronic device, and a storage medium.
Background
The video switcher is designed for switching the composite video signals, and can switch one path of video signals to be output to the display at will. Video switches are used to control input and output video signals, typically multiple inputs versus a single output. For example, in the field of surveillance, when multiple video surveillance streams need to be viewed on one display, a video switcher is required to switch between different screens.
In the prior art, the video switcher can only realize a single interface, that is, the interface of the input video signal source is the same as the interface of the output display. Therefore, in a scene with complex interfaces, a single interface cannot be compatible with different interfaces, and video switching cannot be performed normally.
Disclosure of Invention
In view of the foregoing, embodiments of the present invention are directed to providing a video switching method, a video switcher, an electronic device, and a storage medium that overcome or at least partially solve the foregoing problems.
In a first aspect, an embodiment of the present invention discloses a video switching method, where the method is applied to a video switcher, where the video switcher includes an FPGA, a switch chip, and a plurality of decoding chips; the method comprises the following steps:
after the video signal source is accessed, the decoding chip receives video data sent by the video signal source accessed by the decoding chip and decodes the video data;
after the FPGA is accessed to a display, receiving a switching instruction carrying the corresponding relation between a video signal source identifier and the display identifier, acquiring a video format supported by the display, and transmitting the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip determines to convert the format according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, encapsulates the converted video data into a data packet and sends the data packet to the switch chip;
and the FPGA selects the data packet corresponding to the display from the switch chip according to the switching instruction, and sends the selected data packet to the display.
Optionally, the encapsulating the converted video data into a data packet and sending the data packet to the switch chip includes: the decoding chip encapsulates the converted video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
Optionally, the selecting, according to the switching instruction, a data packet corresponding to the display from the switch chip includes: the FPGA acquires a video signal source identifier contained in the corresponding relation; and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the sending the selected data packet to the display includes: when the display is one, the FPGA sends the selected data packet to the display; when the number of the displays is multiple, the FPGA acquires the display identifiers corresponding to the data packets according to the corresponding relation and the video signal source identifiers added in the data packets, and adds the corresponding display identifiers for the data packets; and the FPGA carries out serial packaging on the data packet added with the display identifier and then sends the data packet to the display.
Optionally, the sending the selected data packet to the display includes: and the FPGA sends the selected data packet to the display in a wireless transmission mode.
In a second aspect, an embodiment of the present invention discloses a video switcher, where the video switcher includes an FPGA, a switch chip, and a plurality of decoding chips;
the decoding chip includes: the decoding module is used for receiving video data sent by the video signal source which is accessed by the decoding module after the video signal source is accessed, and decoding the video data;
the FPGA comprises: the first processing module is used for receiving a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier after the display is accessed, acquiring a video format supported by the display, and transmitting the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip further includes: the conversion module is used for determining to convert the format according to the corresponding relation and the video format supported by the display, converting the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the conversion module, and packaging the converted video data into a data packet and sending the data packet to the switch chip;
the FPGA further comprises: and the second processing module is used for selecting the data packet corresponding to the display from the switch chip according to the switching instruction and sending the selected data packet to the display.
Optionally, the conversion module includes: the first adding unit is used for packaging the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet; and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
Optionally, the second processing module includes: the acquisition unit is used for acquiring the video signal source identifiers contained in the corresponding relation; and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the second processing module includes: the second sending unit is used for sending the selected data packet to the display when the display is one; the second adding unit is used for obtaining the display identifiers corresponding to the data packets according to the corresponding relation and the video signal source identifiers added in the data packets when the number of the displays is multiple, and adding the corresponding display identifiers for the data packets; and the third sending unit is used for serially packaging the data packet added with the display identifier and then sending the data packet to the display.
Optionally, the second processing module includes: and the wireless transmitting unit is used for transmitting the selected data packet to the display in a wireless transmission mode.
In a third aspect, an embodiment of the present invention discloses an electronic device, including: one or more processors; and one or more machine-readable media having instructions stored thereon; the instructions, when executed by the one or more processors, cause the processor to perform the video switching method of any of the above.
In a fourth aspect, embodiments of the present invention disclose a computer readable storage medium having stored thereon a computer program which when executed by a processor implements a video switching method as defined in any of the above.
In the embodiment of the invention, after a video signal source is accessed, a decoding chip receives video data sent by the video signal source accessed by the decoding chip and decodes the video data; after a display is accessed, an FPGA (Field-Programmable Gate Array, field programmable gate array) receives a switching instruction carrying the corresponding relation between a video signal source identifier and a display identifier, acquires a video format supported by the display, and sends the corresponding relation and the video format supported by the display to the decoding chip through the switch chip; the decoding chip determines to convert the format according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, encapsulates the converted video data into a data packet and sends the data packet to the switch chip; and the FPGA selects the data packet corresponding to the display from the switch chip according to the switching instruction, and sends the selected data packet to the display. Therefore, the FPGA in the embodiment of the invention can acquire the video format supported by the display and inform the decoding chip, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that any type of interface can be compatible, video switching can be smoothly performed, and the device can adapt to the scene with complex interface.
Drawings
Fig. 1 is a flowchart illustrating a video switching method according to a first embodiment of the present invention.
FIG. 2 is a schematic diagram of a device connection according to a second embodiment of the present invention;
fig. 3 is a flowchart illustrating a video switching method according to a second embodiment of the present invention.
Fig. 4 is a schematic diagram of a device connection according to a third embodiment of the present invention.
Fig. 5 is a block diagram of a video switcher according to a fourth embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
In the prior art, the video switcher can only realize a single interface, that is, the interface of the input video signal source is the same as the interface of the output display. If video switching between different interfaces is to be implemented, an alternative way is to connect a video conversion device between the video signal source and the video switcher, and send video data to the video switcher for video switching after video format conversion by the video conversion device. However, this method requires the deployment of a new video conversion device, and the operation process is complicated. In the embodiment of the invention, the decoding chip is arranged in the video switcher, and the decoding chip converts the video format according to the actual situation, so that the processing process is simpler and more convenient, and various interfaces can be compatible.
Next, a video switching method in the embodiment of the present invention will be described in detail.
Example 1
The video switching method provided by the embodiment of the invention can be applied to a video switcher. The video switcher may include an FPGA, a switch chip, and a plurality of decoding chips. The decoding chip and the switch chip can perform bidirectional data interaction, and the switch chip and the FPGA can perform bidirectional data interaction.
Referring to fig. 1, a flowchart of steps of a video switching method according to a first embodiment of the present invention is shown.
The video switching method of the embodiment of the invention can comprise the following steps:
Each decoding chip in the video switcher has access to a video signal source. The video source may be any type of interface. Such as SDI (Serial Digital Interface ), DVI (Digital Visual Interface, digital video interface), HDMI (High Definition Multimedia Interface ), VGA (Video Graphics Array, video graphics array), and the like. The video signal source may be a video acquisition device such as a camera.
After the video signal source is connected to the decoding chip, the video signal source can send the collected video data to the decoding chip connected to the video signal source. The format of the video data collected by the video signal source is the format corresponding to the video signal source interface. For example, if the interface of the video signal source is SDI, the format of the collected video data is SDI format, and so on.
Each decoding chip receives video data sent by a video signal source accessed by the decoding chip and decodes the video data to obtain decoded video data.
The FPGA in the video switcher can access at least one display. The display may be of any interface type. Such as SDI, DVI, HDMI, VGA, etc.
After the display is connected to the FPGA, the user can set the corresponding relation of the video data acquired by the video signal source in which display is to be displayed. And triggering a switching instruction to send to the FPGA after setting. The switching instruction may carry a correspondence between the video signal source identifier and the display identifier.
After receiving the switching instruction, the FPGA may obtain a video format supported by the display corresponding to the display identifier included in the correspondence. The video format supported by the display is the format corresponding to the interface of the display. For example, if the interface of the display is HDMI, the video format supported by the display is HDMI, and so on.
The FPGA sends the corresponding relation and the acquired video formats supported by the display to the switch chip, and the switch chip sends the corresponding relation and the video formats supported by the display to each decoding chip.
And 103, the decoding chip determines to convert the format according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip.
After receiving the corresponding relation between the video signal source and the display and the video format supported by the display, each decoding chip can determine whether to perform format conversion on the video data acquired by the video signal source accessed by the decoding chip according to the corresponding relation and the video format supported by the display.
If it is determined to perform format conversion, the decoding chip converts the video data decoded in step 101 into a video format supported by a display corresponding to the video signal source accessed by the decoding chip, encapsulates the video data after the format conversion, encapsulates the video data into a data packet, and sends the data packet to the switch chip.
And 104, selecting a data packet corresponding to the display from the switch chip by the FPGA according to the switching instruction, and sending the selected data packet to the display.
And the FPGA selects the data packet corresponding to the display contained in the corresponding relation from the switch chip according to the corresponding relation between the video signal source and the display carried in the switching instruction, and sends the selected data packet to each display. After receiving the data packet, each display can select the data packet to be played to analyze and play.
In the embodiment of the invention, the FPGA can acquire the video format supported by the display and inform the decoding chip, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that any type of interface can be compatible, video switching can be smoothly performed, and the video switching device can adapt to the scene with complex interface.
Example two
Referring to fig. 2, a schematic diagram of a device connection according to a second embodiment of the present invention is shown. As shown in fig. 2, the video switcher includes N decoding chips, a switch chip, an FPGA, a 5.8GHZ wireless transmitting end, and an infrared receiving end, where N is a positive integer. The decoding chip 1 is connected with the video signal source 1, the decoding chip 2 is connected with the video signal source 2, the decoding chip 3 is connected with the video signal sources 3 and … …, and the decoding chip N is connected with the video signal source N. The decoding chips 1 to N are in bidirectional interaction with the switch chip, and the switch chip is in bidirectional interaction with the FPGA. The FPGA can receive data through an infrared receiving end and can also send data outwards through a 5.8GHZ wireless sending end. The display comprises a 5.8GHZ wireless receiving end, an FPGA, a screen decoding chip and a display screen. The 5.8GHZ wireless receiving end can receive data sent by the 5.8GHZ wireless sending end in the video switcher, the data are sent to the FPGA, the FPGA processes the data, such as data screening, and the like, the data are sent to the screen decoding chip, and the screen decoding chip decodes the data and then sends the decoded data to the display screen for display.
Referring to fig. 3, a flowchart of steps of a video switching method according to a second embodiment of the present invention is shown.
The video switching method of the embodiment of the invention can comprise the following steps:
The video signal source may be connected to the decoding chip through a wired or wireless manner, which is not limited in the embodiment of the present invention.
The FPGA and the display are subjected to wireless pairing through a 5.8GHZ wireless transmitting end and a 5.8GHZ wireless receiving end, and the display is connected into the FPGA after the pairing is successful. After the display is accessed to the FPGA, the FPGA can automatically acquire the interface type of the accessed display, namely, the video format supported by the accessed display.
The video switcher can provide a user interface, and after the video signal source is connected with the decoding chip and the display is connected with the FPGA, the connected video signal source identifier and the connected display identifier can be displayed in the user interface. The user can set the corresponding relation between the video signal source and the display through the infrared remote controller, trigger the switching instruction carrying the corresponding relation between the video signal source identification and the display identification, and the FPGA receives the switching instruction through the infrared receiving end. The corresponding relationship between the video signal source and the display may be one-to-many, many-to-one, one-to-many, many-to-many, etc., which is not limited by the embodiment of the present invention.
The FPGA acquires a video format supported by a display corresponding to the display identifier contained in the corresponding relation, and sends the corresponding relation and the acquired video format supported by the display to the decoding chip through the switch chip.
After receiving the corresponding relation between the video signal source identifier and the display identifier and the video format supported by the display, the decoding chip can acquire the video format supported by the display corresponding to the video signal source accessed by the decoding chip, acquire the format of the video data acquired by the video signal source accessed by the decoding chip, and compare whether the format of the video data is consistent with the video format supported by the display. If not, it is determined that format conversion is performed, and if so, it is determined that format conversion is not performed.
If the format conversion is determined, the decoding chip converts the decoded video data into a video format supported by a display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip.
In an alternative embodiment, the process of the decoding chip packaging the converted video data into data packets and sending the data packets to the switch chip may include: the decoding chip encapsulates the converted video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
If the format conversion is not determined, the decoding chip determines whether the video signal source identifier accessed by the decoding chip exists in the corresponding relation. If the video data exists, the video data acquired by the video signal source accessed by the decoding chip is required to be displayed in a display, so that the decoding chip packages the decoded video data into a data packet and sends the data packet to the switch chip. Similarly, the decoding chip encapsulates the decoded video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip. If the video data does not exist, the video data acquired by the video signal source accessed by the decoding chip is not needed to be displayed in a display, so that the decoding chip does not process the decoded video data temporarily.
And step 304, selecting a data packet corresponding to the display from the switch chip by the FPGA according to the switching instruction, and sending the selected data packet to the display in a wireless transmission mode.
The switch chip receives the data packets sent by one or more decoding chips. The FPGA accesses the switch chip, and selects the data packet corresponding to the display from the switch chip according to the switching instruction.
In an optional embodiment, the process of selecting, by the FPGA, the data packet corresponding to the display from the switch chip according to the switching instruction may include: the FPGA acquires a video signal source identifier contained in the corresponding relation; and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip. The FPGA can send the video signal source identifiers contained in the corresponding relation to the switch chip, the switch chip selects the data packets added with the video signal source identifiers from the received data packets, and the data packets are returned to the FPGA.
In an alternative implementation manner, according to the different numbers of the displays, the FPGA processes the selected data packet correspondingly and sends the processed data packet out. In the embodiment of the present invention, the process of sending the selected data packet to the display may include the following two cases A1 and A2:
a1: and when the display is one, the FPGA sends the selected data packet to the display.
When the display is one, it is indicated that the selected data packet is to be played in the one display, in which case the FPGA does not need to further process the selected data packet. The FPGA sends out the selected data packet through a 5.8GHZ wireless sending end.
A2: when the number of the displays is multiple, the FPGA acquires the display identifiers corresponding to the data packets according to the corresponding relation and the video signal source identifiers added in the data packets, adds the corresponding display identifiers for the data packets, and sends the data packets added with the display identifiers to the display after serial packing.
When the number of the displays is multiple, the selected data packets are described to be distributed to the multiple displays for playing, in this case, the FPGA can obtain the display identifiers corresponding to the data packets according to the corresponding relationship and the video signal source identifiers added in the data packets, that is, obtain the display identifiers corresponding to the video signal source identifiers added in the data packets, and add the corresponding display identifiers for the data packets, so that the display can screen the data packets according to the identifiers thereof for playing after receiving the data packets. The FPGA adopts a time division multiplexing mode to carry out serial packing on the data packet added with the display identifier, and the packed data packet is sent out through a 5.8GHZ wireless sending end.
In step 305, the display receives the data packet, and selects the data packet corresponding to itself for parsing and playing.
And the display receives the data packet sent by the FPGA through the 5.8GHZ wireless receiving end, and sends the data packet to the FPGA in the display. The FPGA in the display analyzes the data packet and determines whether the display identifier is added in the data packet. If the display identification is not added in the data packet, the FPGA in the display sends the received data packet to the screen decoding chip, and the data packet is played on the display screen after being decoded by the screen decoding chip. If the display identifier is added in the data packet, the FPGA in the display acquires the identifier of the display, screens the data packet added with the identifier from the received data packet, sends the screened data packet to the screen decoding chip, and plays the data packet on the display screen after decoding by the screen decoding chip.
The embodiment of the invention can realize the access identification of different types of interfaces in a single video switcher, can greatly reduce switching equipment and deployed cables and improves the stability of the equipment. And the data is transmitted in a wireless mode, so that the display requirements of a plurality of displays can be flexibly met.
Example III
Referring to fig. 4, a schematic diagram of a device connection according to a third embodiment of the present invention is shown. As shown in fig. 4, the video signal source a_sdi is connected to the decoding chip 1, the video signal source b_hdmi is connected to the decoding chip 2, the video signal source c_dvi is connected to the decoding chip 3, and the two displays of the display M and the display N are connected to the FPGAs in the video switcher. It should be noted that fig. 4 is only for illustration, and is not meant to limit embodiments of the present invention.
Referring to fig. 4, the video switching method according to an embodiment of the present invention may include the following processes:
1. the 3 paths of video signal sources are A_SDI, B_HDMI and C_DVI respectively, when the 3 paths of video signal sources are connected to the corresponding access decoding chip, video data collected by the video signal source A_SDI enter the decoding chip 1, video data collected by the video signal source B_HDMI enter the decoding chip 2, and video data collected by the video signal source C_DVI enter the decoding chip 3. The 3 decoding chips each decode the video data received by themselves.
2. After the display M and the display N are successfully paired with the FPGA of the video switcher, the display M and the display N are connected with the FPGA of the video switcher, and the FPGA of the video switcher detects that the number of the currently connected displays is 2.
3. After the video signal source and the display are successfully connected, triggering a switching instruction through the infrared remote controller, and receiving the switching instruction through the infrared receiving end by the FPGA of the video switcher, wherein the switching instruction carries the corresponding relation between the video signal source identifier and the display identifier. The FPGA acquires a video format supported by the display identifier carried in the corresponding relation, the corresponding relation and the video format supported by the display are sent to the switch chip, and the switch chip forwards the video format to the 3 decoding chips. For example, if the video data collected by the a_sdi is set to be displayed on the display M, the video data collected by the b_hdmi is set to be displayed on the display N, and the video data collected by the c_dvi is set to be displayed on the display N, the corresponding relationship is that the a_sdi corresponds to M, the b_hdmi corresponds to N, and the c_dvi corresponds to N. For example, the video formats supported by display M and display N are both HDMI (this process is not shown in fig. 4).
4. The decoding chip 1 obtains that the video format supported by the display M corresponding to the video signal source A_SDI is HDMI, the format of the video data collected by the video signal source A_SDI is SDI, format conversion is determined, the decoded video data is converted into HDMI format, network packaging is carried out on the video data after format conversion, and the video data are packaged into a network port data packet X and sent to the switch chip. The decoding chip 2 obtains that the video format supported by the display N corresponding to the video signal source B_HDMI is HDMI, the format of the video data collected by the video signal source B_HDMI is HDMI, no format conversion is determined, the decoded and converted video data are subjected to network packaging, and the network packaging is carried out to obtain a network port data packet Y and the network port data packet Y is sent to the switch chip. The decoding chip 3 obtains that the video format supported by the display N corresponding to the video signal source C_DVI is HDMI, the format of the video data collected by the video signal source C_DVI is DVI, format conversion is determined, the decoded video data is converted into HDMI format, network packaging is carried out on the video data after format conversion, and the network packaging is carried out on the video data after format conversion, so that a network port data packet Z is sent to the switch chip. Each decoding chip can fix an IP (Internet Protocol, protocol for interconnection between networks) address at the time of shipping. When the decoding chip is packed, the information such as the IP address of the decoding chip, the video signal source identifier accessed by the decoding chip, the resolution ratio of video data, the frame rate and the like can be added into the data packet.
5. The FPGA of the video switcher can access the switch chip through the network port to acquire the IP address accessed on the switch at the moment, and the decoding chip corresponding to each IP address is fixed when leaving the factory so as to be convenient for the FPGA to identify. The FPGA of the video switcher accesses an access port of the A_SDI on the switch chip to obtain a data packet X, accesses an access port of the B_HDMI to obtain a data packet Y and accesses an access port of the C_DVI to obtain a data packet Z according to the corresponding relation and the video signal source identifier added in the data packet.
6. The FPGA adds a display identifier M for the data packet X, adds a display identifier N for the data packet Y, adds a display identifier N for the data packet Z, and serially packages the data packet X, the data packet Y and the data packet Z and sends the data packet X, the data packet Y and the data packet Z out through a wireless sending end.
7. After receiving the serially packed data packet X, the data packet Y and the data packet Z, the FPGA of the display M unpacks the received data, acquires the display identifier M at the same time, screens the data packet X added with the identifier M, and transmits the data packet X to the screen decoding chip for decoding and then displays the data packet X on a display screen. After receiving the serial packed data packet X, the data packet Y and the data packet Z, the FPGA of the display N unpacks the received data, acquires the display identifier N at the same time, screens the data packet Y and the data packet Z added with the identifier N, transmits the data packet Y and the data packet Z to the screen decoding chip for decoding and then displays the decoded data on a display screen, such as split screen display.
The embodiment of the invention can improve the compatibility of the video switcher and simultaneously increase the support for multiple displays.
Example IV
Referring to fig. 5, a block diagram of a video switcher according to a fourth embodiment of the present invention is shown. The video switcher includes an FPGA 51, a switch chip 52, and a plurality of decoding chips 53.
The decoding chip 53 includes: and the decoding module 531 is configured to receive video data sent by the video signal source that is accessed by itself after the video signal source is accessed, and decode the video data.
The FPGA 51 includes: the first processing module 511 is configured to receive a switching instruction carrying a correspondence between a video signal source identifier and a display identifier after the display is accessed, obtain a video format supported by the display, and send the correspondence and the video format supported by the display to the decoding chip through the switch chip.
The decoding chip 53 further includes: the conversion module 532 is configured to determine, according to the correspondence and the video format supported by the display, to perform format conversion, convert the decoded video data into a video format supported by the display corresponding to the video signal source accessed by the switch chip, and package the converted video data into a data packet and send the data packet to the switch chip.
The FPGA 51 further includes: and the second processing module 512 is configured to select a data packet corresponding to the display from the switch chip according to the switching instruction, and send the selected data packet to the display.
Optionally, the conversion module 532 includes: the first adding unit is used for packaging the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet; and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
Optionally, the second processing module 512 includes: the acquisition unit is used for acquiring the video signal source identifiers contained in the corresponding relation; and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the second processing module 512 includes: the second sending unit is used for sending the selected data packet to the display when the display is one; the second adding unit is used for obtaining the display identifiers corresponding to the data packets according to the corresponding relation and the video signal source identifiers added in the data packets when the number of the displays is multiple, and adding the corresponding display identifiers for the data packets; and the third sending unit is used for serially packaging the data packet added with the display identifier and then sending the data packet to the display.
Optionally, the second processing module 512 includes: and the wireless transmitting unit is used for transmitting the selected data packet to the display in a wireless transmission mode.
In the embodiment of the invention, the FPGA can acquire the video format supported by the display and inform the decoding chip, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that any type of interface can be compatible, video switching can be smoothly performed, and the video switching device can adapt to the scene with complex interface.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
In an embodiment of the invention, an electronic device is also provided. The electronic device may include one or more processors and one or more machine-readable media having instructions stored thereon, such as an application. The instructions, when executed by the one or more processors, cause the processors to perform the video switching method described above.
In an embodiment of the present invention, there is also provided a non-transitory computer-readable storage medium having stored thereon a computer program executable by a processor of an electronic device to perform the video switching method described above. For example, the non-transitory computer readable storage medium may be ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The video switching method, the video switcher, the electronic device and the storage medium provided by the invention are described in detail, and specific examples are applied to illustrate the principles and the implementation modes of the invention, and the description of the above examples is only used for helping to understand the method and the core idea of the invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (10)
1. The video switching method is characterized by being applied to a video switcher, wherein the video switcher comprises an FPGA, a switch chip and a plurality of decoding chips; the method comprises the following steps:
after the video signal source is accessed, the decoding chip receives video data sent by the video signal source accessed by the decoding chip and decodes the video data; the format of the video data collected by the video signal source is the format corresponding to the video signal source interface;
after the FPGA is accessed to a display, receiving a switching instruction carrying the corresponding relation between a video signal source identifier and the display identifier, acquiring a video format supported by the display, and transmitting the corresponding relation and the video format supported by the display to the decoding chip through the switch chip; the video format supported by the display is a format corresponding to the display interface;
the decoding chip determines to convert the format according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, encapsulates the converted video data into a data packet and sends the data packet to the switch chip;
the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction, and sends the selected data packet to the display;
wherein the number of displays may be one or more.
2. The method of claim 1, wherein encapsulating the converted video data into data packets for transmission to the switch chip comprises:
the decoding chip encapsulates the converted video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet;
and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
3. The method according to claim 2, wherein selecting the data packet corresponding to the display from the switch chip according to the switching instruction includes:
the FPGA acquires a video signal source identifier contained in the corresponding relation;
and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip.
4. The method of claim 1, wherein said sending the selected data packet to the display comprises:
when the display is one, the FPGA sends the selected data packet to the display;
when the number of the displays is multiple, the FPGA acquires the display identifiers corresponding to the data packets according to the corresponding relation and the video signal source identifiers added in the data packets, and adds the corresponding display identifiers for the data packets;
and the FPGA carries out serial packaging on the data packet added with the display identifier and then sends the data packet to the display.
5. The method of claim 1, wherein said sending the selected data packet to the display comprises:
and the FPGA sends the selected data packet to the display in a wireless transmission mode.
6. A video switcher, characterized in that the video switcher comprises an FPGA, a switch chip and a plurality of decoding chips;
the decoding chip includes: the decoding module is used for receiving video data sent by the video signal source which is accessed by the decoding module after the video signal source is accessed, and decoding the video data; the format of the video data collected by the video signal source is the format corresponding to the video signal source interface;
the FPGA comprises: the first processing module is used for receiving a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier after the display is accessed, acquiring a video format supported by the display, and transmitting the corresponding relation and the video format supported by the display to the decoding chip through the switch chip; the video format supported by the display is a format corresponding to the display interface;
the decoding chip further includes: the conversion module is used for determining to convert the format according to the corresponding relation and the video format supported by the display, converting the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the conversion module, and packaging the converted video data into a data packet and sending the data packet to the switch chip;
the FPGA further comprises: the second processing module is used for selecting a data packet corresponding to the display from the switch chip according to the switching instruction and sending the selected data packet to the display;
wherein the number of displays may be one or more.
7. The video switcher of claim 6, wherein the conversion module includes:
the first adding unit is used for packaging the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet;
and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
8. The video switcher of claim 7, wherein the second processing module includes:
the acquisition unit is used for acquiring the video signal source identifiers contained in the corresponding relation;
and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
9. An electronic device, comprising:
one or more processors; and
one or more machine-readable media having instructions stored thereon;
the instructions, when executed by the one or more processors, cause the processor to perform the video switching method of any of claims 1 to 5.
10. A computer-readable storage medium, on which a computer program is stored, which program, when being executed by a processor, implements the video switching method according to any one of claims 1 to 5.
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| CN114554354B (en) * | 2022-02-18 | 2023-11-24 | 冠捷电子科技(福建)有限公司 | Method for automatically switching audio equipment and application thereof |
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