CN111092694A - Multi-standard transmission frame data frame format generation method - Google Patents
Multi-standard transmission frame data frame format generation method Download PDFInfo
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- CN111092694A CN111092694A CN201911329271.0A CN201911329271A CN111092694A CN 111092694 A CN111092694 A CN 111092694A CN 201911329271 A CN201911329271 A CN 201911329271A CN 111092694 A CN111092694 A CN 111092694A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
- H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0079—Formats for control data
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Abstract
A method for generating frame format of multi-standard transmission frame data comprises the following steps: s1, selecting a standard by an external user; s2, setting a transmission frame leader of the selected standard according to the standard selected by the external user; s3, if the external user selects GJB1198.6A-2004 standard, setting the sub-guide head of the transmission frame; otherwise, go to S4; s4, if the external user selects the CCSDS732.0-B-3 standard, setting a transmission frame insertion field; otherwise, go to S5; s5, setting a transmission frame data domain with a selected standard according to the standard selected by an external user; then, the process proceeds to S6; s6, if the external user selects CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, firstly setting the operation control field of the transmission frame of the selected standard, and then setting the error control field of the transmission frame of the selected standard; a complete data frame is generated.
Description
Technical Field
The invention relates to a method for generating a multi-standard transmission frame data frame format, in particular to a method for generating a transmission frame data frame format and a custom data frame format which meet CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard in FPGA.
Background
The traditional method for generating the frame format of the transmission frame data can generate the frame format of the transmission frame data meeting a certain specific standard aiming at the specific standard, and has the defects that: only data frame formats meeting a certain standard can be generated, and data frame formats meeting other standards except the standard cannot be generated; in addition, the existing frame format generation method only focuses on the frame format standard, and does not consider the problem of how to ensure reliable acquisition of the data of the receiving end in the actual application process.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the method overcomes the defects of the prior art, and provides a multi-standard transmission frame data frame format generation method, which comprises the following steps: s1, selecting a standard by an external user; s2, setting a transmission frame leader of the selected standard according to the standard selected by the external user; s3, if the external user selects GJB1198.6A-2004 standard, setting the sub-guide head of the transmission frame; otherwise, go to S4; s4, if the external user selects the CCSDS732.0-B-3 standard, setting a transmission frame insertion field; otherwise, go to S5; s5, setting a transmission frame data domain with a selected standard according to the standard selected by an external user; then, the process proceeds to S6; s6, if the external user selects CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, firstly setting the operation control field of the transmission frame of the selected standard, and then setting the error control field of the transmission frame of the selected standard; a complete data frame is generated.
The purpose of the invention is realized by the following technical scheme:
a method for generating frame format of multi-standard transmission frame data comprises the following steps:
s1, selecting one standard from CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard by an external user;
s2, setting a transmission frame leader of the selected standard according to the standard selected by the external user;
s3, if the external user selects GJB1198.6A-2004 standard, setting GJB1198.6A-2004 standard transmission frame sub-guide head; otherwise, go to S4;
s4, if the external user selects the CCSDS732.0-B-3 standard, setting a transmission frame insertion field of the CCSDS732.0-B-3 standard; otherwise, go to S5;
s5, setting a transmission frame data domain with a selected standard according to the standard selected by an external user; then, the process proceeds to S6;
s6, if the external user selects CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, firstly setting the operation control field of the transmission frame of the selected standard, and then setting the error control field of the transmission frame of the selected standard; a complete data frame is generated.
Preferably, after S6, the data frames are sequentially output by repeating S1 to S6 using an externally input code clock.
Preferably, the transmission frame header structure of the CCSDS732.0-B-3 standard is: the method comprises the following steps of 2bits transmission frame version number, 8bits spacecraft identification, 6bits virtual channel identification, 24bits virtual channel frame counting, 8bits signal field and 16bits frame leading head error control, and the transmission frame leading head content of the CCSDS732.0-B-3 standard can be set.
Preferably, the GJB1198.6A-2004 standard transport frame header structure is: the version number of a 2-bit transmission frame, the identification of a 10-bit spacecraft, the identification of a 3-bit virtual channel, the identification of a 1-bit operation control domain, the frame count of an 8-bit main channel, the frame count of an 8-bit virtual channel and the state of a 16-bit frame data domain, and the content of a main header of a transmission frame of GJB1198.6A-2004 standard can be set.
Preferably, the GJB1198.7A-2004 standard transport frame header structure is: the version number of the 2-bit transmission frame and the 1-bit transmission frame are identified by an identifier, a 1-bit housekeeping command identifier, a 2-bit idle bit, a 10-bit spacecraft identifier, a 6-bit virtual channel identifier, a 10-bit frame length and an 8-bit frame sequence number, and the content of a main header of the transmission frame of the GJB1198.6A-2004 standard can be set.
Preferably, the sub-header structure of the transmission frame of GJB1198.6A-2004 standard is: the version number of the 2bits frame auxiliary guide head, the length of the 6bits frame auxiliary guide head and the maximum 504bits frame auxiliary guide head data, the content of the GJB1198.6A-2004 standard transmission frame auxiliary guide head can be set, and the length of the GJB1198.6A-2004 standard frame auxiliary guide head data can be set.
Preferably, the length of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard is 32bits, and the content of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard is settable.
Preferably, the length of the transport frame error control field of the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard is 16bits, and the content of the transport frame error control field is filled by an error control algorithm.
Preferably, the frequency of the externally input code clock is variable, the frequency range is 1Hz to 10MHz, and the high level duration time of the code clock is 1 FPGA working clock cycle.
Compared with the prior art, the invention has the following beneficial effects:
(1) the invention can output the data frames in the transmission frame format meeting the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard in a time-sharing way, greatly compresses the time of data framing, and is flexible and controllable;
(2) the content in the frame format of the transmission frame data can be set completely, and the method has wide application range;
(3) the method for generating the frame format of the transmission frame data can be used for generating the task data frame and the idle data frame, and the two data frames can be seamlessly switched according to the setting of the user in the transmission process, so that the method has wide application range.
Drawings
FIG. 1 is a flow chart of the steps of the method of the present invention.
Fig. 2 shows the frame data frame format of the CCSDS732.0-B-3 standard.
Fig. 3 shows the GJB1198.6A-2004 standard transmit frame data frame format.
Fig. 4 shows the GJB1198.7A-2004 standard transmit frame data frame format.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example 1:
a method for generating frame format of multi-standard transmission frame data comprises the following steps:
s1, selecting one standard from CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard by an external user;
s2, setting a transmission frame leader of the selected standard according to the standard selected by the external user;
s3, if the external user selects GJB1198.6A-2004 standard, setting GJB1198.6A-2004 standard transmission frame sub-guide head; otherwise, go to S4;
s4, if the external user selects the CCSDS732.0-B-3 standard, setting a transmission frame insertion field of the CCSDS732.0-B-3 standard; otherwise, go to S5;
s5, setting a transmission frame data domain with a selected standard according to the standard selected by an external user; then, the process proceeds to S6;
s6, if the external user selects CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, firstly setting the operation control field of the transmission frame of the selected standard, and then setting the error control field of the transmission frame of the selected standard; generating a complete data frame;
s7, using the code clock input from outside, repeating S1-S6 to output data frame in turn. The frequency of the externally input code clock is variable, the frequency range is 1 Hz-10 MHz, and the high level duration time of the code clock is 1 FPGA working clock period.
The main header structure of the transmission frame of the CCSDS732.0-B-3 standard is as follows: the method comprises the following steps of 2bits transmission frame version number, 8bits spacecraft identification, 6bits virtual channel identification, 24bits virtual channel frame counting, 8bits signal field and 16bits frame leading head error control, and the transmission frame leading head content of the CCSDS732.0-B-3 standard can be set.
GJB1198.6A-2004 standard transmission frame header structure is: the version number of a 2-bit transmission frame, the identification of a 10-bit spacecraft, the identification of a 3-bit virtual channel, the identification of a 1-bit operation control domain, the frame count of an 8-bit main channel, the frame count of an 8-bit virtual channel and the state of a 16-bit frame data domain, and the content of a main header of a transmission frame of GJB1198.6A-2004 standard can be set.
GJB1198.7A-2004 standard transmission frame header structure is: the version number of the 2-bit transmission frame and the 1-bit transmission frame are identified by an identifier, a 1-bit housekeeping command identifier, a 2-bit idle bit, a 10-bit spacecraft identifier, a 6-bit virtual channel identifier, a 10-bit frame length and an 8-bit frame sequence number, and the content of a main header of the transmission frame of the GJB1198.6A-2004 standard can be set.
The sub-header structure of the transmission frame of GJB1198.6A-2004 standard is: the version number of the 2bits frame auxiliary guide head, the length of the 6bits frame auxiliary guide head and the maximum 504bits frame auxiliary guide head data, the content of the GJB1198.6A-2004 standard transmission frame auxiliary guide head can be set, and the length of the GJB1198.6A-2004 standard frame auxiliary guide head data can be set.
The length of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard is 32bits, and the contents of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard can be set.
The length of the transmission frame error control domain of the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard is 16bits, and the content of the transmission frame error control domain is filled by an error control algorithm.
Example 2:
a method for generating and continuously transmitting task data frames and idle data frames meeting the CCSDS732.0-B-3 standard comprises the following steps:
(1) setting a transmission frame main guide head meeting the CCSDS732.0-B-3 standard, controlling whether to output or not according to the user requirement, and if so, sequentially outputting bit by bit under the drive of an external input code clock;
(2) setting a transmission frame leader meeting GJB1198.6A-2004 standard, controlling whether to output according to user requirements, and outputting bit by bit sequentially under the drive of an external input code clock if the transmission frame leader is output;
(3) setting a transmission frame leader meeting GJB1198.7A-2004 standard, controlling whether to output according to user requirements, and outputting bit by bit sequentially under the drive of an external input code clock if the transmission frame leader is output;
(4) setting a sub-guide head of a transmission frame meeting the GJB1198.6A-2004 standard, controlling whether to output according to the requirement of a user, and outputting bit by bit sequentially under the drive of an external input code clock if the sub-guide head of the transmission frame meets the requirement of the user;
(5) setting a transmission frame insertion domain meeting the CCSDS732.0-B-3 standard, controlling whether to output or not according to the user requirement, and if so, sequentially outputting bit by bit under the drive of an external input code clock;
(6) setting idle transmission frame data fields meeting the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard, and sequentially outputting the idle transmission frame data fields bit by bit under the driving of an external input code clock;
(7) setting a transmission frame operation control field satisfying the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, and sequentially outputting bit by bit under the driving of an external input code clock;
(8) setting a transmission frame error control domain which meets the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard, and outputting the transmission frame error control domain bit by bit under the driving of an external input code clock, so as to finish the generation and output of 1 frame of transmission frame data frame which meets the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard;
(9) under the drive of the external input code clock, the task data frames input from the outside are output bit by bit in sequence, and the generation of idle data frames and the output of the task data frames input from the outside are completed.
The transmission frame header structure meeting the CCSDS732.0-B-3 standard in the step (1) is: the method comprises the following steps of controlling errors of a 2-bit transmission frame version number, an 8-bit spacecraft identifier, a 6-bit virtual channel identifier, a 24-bit virtual channel frame count, an 8-bit signal field and a 16-bit frame leading head, wherein the content of a transmission frame leading head can be set;
the transmission frame header structure meeting the GJB1198.6A-2004 standard in the step (2) is as follows: the number of a 2-bit transmission frame version, a 10-bit spacecraft identifier, a 3-bit virtual channel identifier, a 1-bit operation control domain identifier, an 8-bit main channel frame count, an 8-bit virtual channel frame count and a 16-bit frame data domain state, and the content of a transmission frame main header can be set;
the transmission frame header structure meeting the GJB1198.7A-2004 standard in the step (3) is: the version number of a 2-bit transmission frame and the sequence number of a 1-bit housekeeping command through an identifier, a 1-bit housekeeping command identifier, a 2-bit idle bit, a 10-bit spacecraft identifier, a 6-bit virtual channel identifier, a 10-bit frame length and an 8-bit frame sequence number can be set, and the content of a transmission frame main header can be set;
the sub-header structure of the transmission frame meeting the GJB1198.6A-2004 standard in the step (4) is as follows: the version number of the 2bits frame auxiliary guide head, the length of the 6bits frame auxiliary guide head and the maximum 504bits frame auxiliary guide head data, the content of the transmission frame auxiliary guide head can be set, and the length of the frame auxiliary guide head data can be set;
the content of the transmission frame insertion field satisfying the CCSDS732.0-B-3 standard in the step (5) is settable, the length of the transmission frame insertion field is settable, and whether the output is settable or not is settable;
the contents of the transmission frame data fields satisfying the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard in the step (6) may be set, and the length of the transmission frame data fields may be set;
the length of the transmission frame operation control domain which meets the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard in the step (7) is 32bits, and the content of the transmission frame operation control domain can be set;
the length of the transport frame error control field satisfying the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard in the step (8) is 16bits, the content of the transport frame error control field is reserved and is filled by an error control algorithm;
the task data frame input externally in the step (9) is an externally generated transport frame task data frame which meets the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard or GJB1198.7A-2004 standard;
the frequency of the externally input code clock in the steps (1) to (9) is variable, the frequency range is 1 Hz-10 MHz, and the high level duration of the code clock is 1 FPGA working clock period.
Example 3:
as shown in fig. 1, the multi-standard transmission frame data frame format generating method adopted by the present invention is composed of a CCSDS732.0-B-3 standard transmission frame preamble generating module, a GJB1198.6A-2004 standard transmission frame preamble generating module, a GJB1198.7A-2004 standard transmission frame preamble generating module, a GJB1198.6A-2004 standard transmission frame subpreamble generating module, a CCSDS732.0-B-3 standard transmission frame insertion field generating module, a transmission frame data field generating module, a transmission frame operation control field generating module, and a transmission frame error control field generating module, and the frame formats of the respective standards are shown in fig. 2 to 4. The generation method comprises the following steps:
(1) according to the requirement of a user, the CCSDS732.0-B-3 standard transmission frame leader generation module does not output;
(2) according to the requirement of a user, the GJB1198.6A-2004 standard transmission frame leading head generating module does not output;
(3) according to the user requirements, GJB1198.7A-2004 standard transmission frame leading head content is set, a transmission frame leading head version number is set to be 2 ' b00, the transmission frame leading head version number is set to be 10 ' h222, a virtual channel is set to be 6 ' h3f, the frame length is 10 ' h3fa, and a frame sequence number is set to be 8 ' h00 through being marked to be 1 ' b1, a housekeeping command is marked to be 1 ' b0, idle bits are marked to be 2 ' b00, a spacecraft is marked to be 10 ' h, and the frame leading head version number is driven to be output bit by an externally input code clock;
(4) according to the requirement of a user, the GJB1198.6A-2004 standard transmission frame sub-header generation module does not output;
(5) according to the requirement of a user, the CCSDS732.0-B-3 standard transmission frame is not output by a transmission frame insertion domain generating module;
(6) setting the content of a transmission frame data domain according to the requirement of a user, setting the transmission frame data domain to be 8152' h5555 … … 5555, and driving bit-by-bit output by an externally input code clock;
(7) according to the user requirement, the transmission frame operation control domain generation module does not output;
(8) according to the requirement of user, the transmission frame error control field generation module does not output, so that the generation of 1 frame of transmission frame data frame format meeting GJB1198.7A-2004 standard is completed.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.
Claims (9)
1. A method for generating a frame format of multi-standard transmission frame data, comprising the steps of:
s1, selecting one standard from CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard by an external user;
s2, setting a transmission frame leader of the selected standard according to the standard selected by the external user;
s3, if the external user selects GJB1198.6A-2004 standard, setting GJB1198.6A-2004 standard transmission frame sub-guide head; otherwise, go to S4;
s4, if the external user selects the CCSDS732.0-B-3 standard, setting a transmission frame insertion field of the CCSDS732.0-B-3 standard; otherwise, go to S5;
s5, setting a transmission frame data domain with a selected standard according to the standard selected by an external user; then, the process proceeds to S6;
s6, if the external user selects CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard, firstly setting the operation control field of the transmission frame of the selected standard, and then setting the error control field of the transmission frame of the selected standard; a complete data frame is generated.
2. The method of claim 1, wherein the sequential output of the data frames from S1 to S6 is repeated after S6 by using an externally inputted code clock.
3. The method as claimed in claim 1, wherein the transmission frame header structure of the CCSDS732.0-B-3 standard is: the method comprises the following steps of 2bits transmission frame version number, 8bits spacecraft identification, 6bits virtual channel identification, 24bits virtual channel frame counting, 8bits signal field and 16bits frame leading head error control, and the transmission frame leading head content of the CCSDS732.0-B-3 standard can be set.
4. The method as claimed in claim 1, wherein the header structure of the transmission frame of GJB1198.6A-2004 standard is: the version number of a 2-bit transmission frame, the identification of a 10-bit spacecraft, the identification of a 3-bit virtual channel, the identification of a 1-bit operation control domain, the frame count of an 8-bit main channel, the frame count of an 8-bit virtual channel and the state of a 16-bit frame data domain, and the content of a main header of a transmission frame of GJB1198.6A-2004 standard can be set.
5. The method as claimed in claim 1, wherein the header structure of the transmission frame of GJB1198.7A-2004 standard is: the version number of the 2-bit transmission frame and the 1-bit transmission frame are identified by an identifier, a 1-bit housekeeping command identifier, a 2-bit idle bit, a 10-bit spacecraft identifier, a 6-bit virtual channel identifier, a 10-bit frame length and an 8-bit frame sequence number, and the content of a main header of the transmission frame of the GJB1198.6A-2004 standard can be set.
6. The method of claim 1, wherein the sub-header structure of the transmission frame of GJB1198.6A-2004 standard is: the version number of the 2bits frame auxiliary guide head, the length of the 6bits frame auxiliary guide head and the maximum 504bits frame auxiliary guide head data, the content of the GJB1198.6A-2004 standard transmission frame auxiliary guide head can be set, and the length of the GJB1198.6A-2004 standard frame auxiliary guide head data can be set.
7. The method of claim 1, wherein the length of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard is 32bits, and the content of the transmission frame operation control field of the CCSDS732.0-B-3 standard or GJB1198.6A-2004 standard is settable.
8. The method of claim 1, wherein the length of the transport frame error control field of each of the CCSDS732.0-B-3 standard, GJB1198.6A-2004 standard and GJB1198.7A-2004 standard is 16bits, and the content of the transport frame error control field is filled with an error control algorithm.
9. The method as claimed in claim 2, wherein the frequency of the externally input code clock is variable, the frequency range is 1Hz to 10MHz, and the high level duration of the code clock is 1 FPGA working clock cycle.
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