CN111045959B - Complex algorithm variable mapping method based on storage optimization - Google Patents
Complex algorithm variable mapping method based on storage optimization Download PDFInfo
- Publication number
- CN111045959B CN111045959B CN201911125571.7A CN201911125571A CN111045959B CN 111045959 B CN111045959 B CN 111045959B CN 201911125571 A CN201911125571 A CN 201911125571A CN 111045959 B CN111045959 B CN 111045959B
- Authority
- CN
- China
- Prior art keywords
- variable
- storage
- algorithm
- variables
- mapping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004422 calculation algorithm Methods 0.000 title claims abstract description 63
- 238000013507 mapping Methods 0.000 title claims abstract description 42
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000005457 optimization Methods 0.000 title claims abstract description 12
- 238000012545 processing Methods 0.000 claims abstract description 9
- 238000012163 sequencing technique Methods 0.000 claims abstract description 6
- 238000010586 diagram Methods 0.000 claims description 9
- 230000006870 function Effects 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 238000004364 calculation method Methods 0.000 abstract description 6
- 238000004883 computer application Methods 0.000 abstract description 3
- 238000004043 dyeing Methods 0.000 abstract description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0873—Mapping of cache memory to specific storage devices or parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
Abstract
The invention belongs to the field of computer application and the field of computer testing, and particularly relates to a complex algorithm variable mapping method based on storage optimization. The method comprises the following steps: s1: processing a data flow graph; s2: analyzing variable data; s3: sequencing variable bit times; s4: acquiring system memory area information; s5: storing the mapping; s6: and (5) storing mapping judgment. According to the invention, through orderly matching among the modules, the life cycle, the calling frequency and the like of the variables of different program segments of the input algorithm are counted, and different variable data can be effectively distributed to different proper storage areas. And realizing storage optimization variable mapping of a complex algorithm. An effective solution is provided for high-speed storage, calling and calculation of the variables of the dyeing array.
Description
Technical Field
The invention belongs to the field of computer application, and relates to a complex algorithm variable mapping method based on storage optimization.
Background
In the process of computer application operation, the algorithm is the core of calculation, and directly influences the calculation efficiency, but the algorithm with higher complexity in the calculation process has the problems of long calculation time consumption, large variable storage space requirement and the like, and the timeliness of access in the complex algorithm realization process directly restricts the realization performance of the algorithm. Simply selecting memory locations based on variable types, or without a pre-programmed memory mapping scheme, often does not allow the computing unit to achieve high resource occupancy during operation. So that the space storage resources are wasted, the processor has low calling speed of computing resources and low computing efficiency. The invention discloses a method for storing a large number of variables of a complex algorithm by using published data, which is almost blank.
Disclosure of Invention
The invention aims to: the invention aims to provide a complex algorithm variable mapping method based on storage optimization, which is used for efficiently and reasonably distributing memory space for variables under the characteristics of massive variable call and frequent temporary variable generation and extinction of complex algorithms and improving the resource call rate.
The technical scheme is as follows: the invention provides a complex algorithm variable mapping method based on storage optimization, which comprises the following steps:
s1: processing a data flow graph;
s2: analyzing variable data;
s3: sequencing variable bit times;
s4: acquiring system memory area information;
s5: storing the mapping;
s6: and (5) storing mapping judgment.
Further, the step S1 includes: forming an algorithm data flow diagram by the complex algorithm according to the data flow direction and the data processing branch; and analyzing variable information in the data flow diagram, and recording all variable names involved in the algorithm. In the implementation process of the variable storage mapping method, (1) data flow graph processing is (2) a precondition operation for analyzing variable data.
Further, the step S2 includes: analyzing variables involved in the algorithm according to the data flow diagram and the variable names recorded in the S1, and counting the characteristics of all data variables;
the features include: global and local variables;
the global variable considers the calling frequency;
the local variables consider their call frequency, lifecycle, and scope.
(2) Analyzing statistical information according to variable characteristics in variable data provides classification basis for (3) sorting variable rank
Further, the step S3 includes:
firstly, taking the calling times as a first ordering standard, for the variables with the same calling times, the shorter the life cycle, the higher the priority, the smaller the scope, the higher the priority, and ordering all the variables to obtain the variable storage priority; then, the life cycle of the local variables is considered synchronously, and the variables with non-conflict life cycles are distributed to the same storage during the running process of the program.
This step is (4) the input of the system memory area information is obtained, which provides the basis for it.
Further, the step S4 includes: and determining a storage position for the variable according to the type and the size of the storage area supported by the system hardware.
The variable mapping method (1) is a unified complex variable mapping method aiming at different inputs from the algorithm perspective of (2) analyzing variable data and (3) sequencing variable bits in the next three steps; (4) The acquisition of the system memory area information is from the hardware perspective, considering the fixed capacity of the system itself. The two are mutually dependent and mutually restricted, and are adjusted according to actual conditions in the variable storage mapping process, so that the optimal performance realized by the algorithm is obtained.
Further, the step S5 includes: and performing storage operation on all variables, and when the data volume to be stored is larger than the storage area supported by the system, adjusting the variables with low bit sequence priority to other proper storage areas. Further, the mapping rule of the storage operation is: according to the result of S3 sorting variable bit number, considering the system hardware storage area information, according to the priority of the variable, distributing the variable with high priority to the register, distributing the variable with general priority to the peripheral high-speed storage, and storing the variable with low priority and the instruction class into the general storage. Before the storage mapping judgment verification in the step (6), the variable distribution and storage are completed.
Further, the step S6 includes:
verifying the result of the memory mapping in the step (5), and finally confirming whether all variables of the input algorithm can be correctly called at a specific call point;
the judgment of whether the system can completely and correctly store complex algorithm variables is completed,
if the storage area space meets the requirement, the algorithm variable is implemented according to a storage mapping method, so that the algorithm performance is optimal;
if a certain storage area space does not meet the requirement, but the whole space meets the requirement of the storage space of the algorithm variable, the algorithm variable can be completely stored after storage adjustment, and the algorithm function is correctly realized but the performance is reduced;
if the algorithm variable is not completely stored after storage adjustment, the storage mapping fails, and the algorithm cannot be realized under the current storage system.
The beneficial effects are that:
according to the invention, through orderly matching among the modules, the life cycle, the calling frequency and the like of the variables of different program segments of the input algorithm are counted, and different variable data can be effectively distributed to different proper storage areas. And realizing storage optimization variable mapping of a complex algorithm. An effective solution is provided for high-speed storage, calling and calculation of the variables of the dyeing array.
Drawings
FIG. 1 is a schematic diagram of an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings.
As shown in fig. 1, the method is a complex algorithm variable mapping method based on storage optimization, and comprises the following steps:
s1: data flow graph processing:
forming an algorithm data flow diagram by the complex algorithm according to the data flow direction and the data processing branch; and analyzing variable information in the data flow diagram, and recording all variable names involved in the algorithm. In the implementation process of the variable storage mapping method, (1) data flow graph processing is (2) a precondition operation for analyzing variable data.
S2: analyzing variable data:
analyzing variables involved in the algorithm according to the data flow diagram and the variable names recorded in the S1, and counting the characteristics of all data variables;
the features include: global and local variables;
the global variable considers the calling frequency;
the local variables consider their call frequency, lifecycle, and scope.
(2) Analyzing statistical information according to variable characteristics in variable data provides classification basis for (3) sorting variable rank
S3: sequencing variable bit times:
firstly, taking the calling times as a first ordering standard, for the variables with the same calling times, the shorter the life cycle, the higher the priority, the smaller the scope, the higher the priority, and ordering all the variables to obtain the variable storage priority; then, the life cycle of the local variables is considered synchronously, and the variables with non-conflict life cycles are distributed to the same storage during the running process of the program.
This step is (4) the input of the system memory area information is obtained, which provides the basis for it.
S4: acquiring system memory area information:
and determining a storage position for the variable according to the type and the size of the storage area supported by the system hardware.
The variable mapping method (1) is a unified complex variable mapping method aiming at different inputs from the algorithm perspective of (2) analyzing variable data and (3) sequencing variable bits in the next three steps; (4) The acquisition of the system memory area information is from the hardware perspective, considering the fixed capacity of the system itself. The two are mutually dependent and mutually restricted, and are adjusted according to actual conditions in the variable storage mapping process, so that the optimal performance realized by the algorithm is obtained.
S5: and (3) storage mapping:
and performing storage operation on all variables, and when the data volume to be stored is larger than the storage area supported by the system, adjusting the variables with low bit sequence priority to other proper storage areas.
The mapping rule of the storage operation is as follows: according to the result of S3 sorting variable bit number, considering the system hardware storage area information, according to the priority of the variable, distributing the variable with high priority to the register, distributing the variable with general priority to the peripheral high-speed storage, and storing the variable with low priority and the instruction class into the general storage. Before the storage mapping judgment verification in the step (6), the variable distribution and storage are completed.
S6: and (3) storage mapping judgment:
verifying the result of the memory mapping in the step (5), and finally confirming whether all variables of the input algorithm can be correctly called at a specific call point;
the judgment of whether the system can completely and correctly store complex algorithm variables is completed,
if the storage area space meets the requirement, the algorithm variable is implemented according to a storage mapping method, so that the algorithm performance is optimal; if a certain storage area space does not meet the requirement, but the whole space meets the requirement of the storage space of the algorithm variable, the algorithm variable can be completely stored after storage adjustment, and the algorithm function is correctly realized but the performance is reduced;
if the algorithm variable is not completely stored after storage adjustment, the storage mapping fails, and the algorithm cannot be realized under the current storage system.
Finally, it should be noted that the above examples are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that; the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (3)
1. The complex algorithm variable mapping method based on storage optimization is characterized by comprising the following steps:
s1: processing a data flow graph;
s2: analyzing variable data;
s3: sequencing variable bit times;
s4: acquiring system memory area information;
s5: storing the mapping;
s6: the determination of the memory map is made,
the step S3 comprises the following steps:
firstly, taking the calling times as a first ordering standard, for the variables with the same calling times, the shorter the life cycle, the higher the priority, the smaller the scope, the higher the priority, and ordering all the variables to obtain the variable storage priority;
then, the life cycle of the local variable is synchronously considered, the variables with non-conflict life cycle are distributed to the same storage during the running process of the program,
the S1 comprises the following steps: forming an algorithm data flow diagram by the complex algorithm according to the data flow direction and the data processing branch; analyzing variable information in the dataflow graph, recording all variable names involved in the algorithm,
the step S2 comprises the following steps: analyzing variables involved in the algorithm according to the data flow diagram and the variable names recorded in the S1, and counting the characteristics of all data variables;
the features include: global and local variables;
the global variable considers the calling frequency;
the local variables consider their call frequency, lifecycle and scope,
the step S4 comprises the following steps: determining a storage position for a variable according to the type and the size of a storage area supported by system hardware,
the step S5 comprises the following steps: performing a storage operation on all variables, when the amount of data to be stored is greater than the size of a storage area supported by the system, adjusting the variables with low bit order priority to other suitable storage areas,
the step S6 comprises the following steps:
verifying the S5 memory mapping result, and finally confirming whether all variables of the input algorithm can be correctly called at a specific call point;
and judging whether the system can completely and correctly store the complex algorithm variables.
2. The complex algorithm variable mapping method based on storage optimization according to claim 1, wherein the mapping rule of the storage operation is: according to the result of S3 sorting variable bit number, considering the system hardware storage area information, according to the priority of the variable, distributing the variable with high priority to the register, distributing the variable with general priority to the peripheral high-speed storage, and storing the variable with low priority and the instruction class into the general storage.
3. The complex algorithm variable mapping method based on storage optimization of claim 1, wherein S6 further comprises:
if the storage area space meets the requirement, the algorithm variable is implemented according to a storage mapping method, so that the algorithm performance is optimal;
if a certain storage area space does not meet the requirement, but the whole space meets the requirement of the storage space of the algorithm variable, the algorithm variable can be completely stored after storage adjustment, and the algorithm function is correctly realized but the performance is reduced;
if the algorithm variable is not completely stored after storage adjustment, the storage mapping fails, and the algorithm cannot be realized under the current storage system.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911125571.7A CN111045959B (en) | 2019-11-18 | 2019-11-18 | Complex algorithm variable mapping method based on storage optimization |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911125571.7A CN111045959B (en) | 2019-11-18 | 2019-11-18 | Complex algorithm variable mapping method based on storage optimization |
Publications (2)
Publication Number | Publication Date |
---|---|
CN111045959A CN111045959A (en) | 2020-04-21 |
CN111045959B true CN111045959B (en) | 2024-03-19 |
Family
ID=70232988
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911125571.7A Active CN111045959B (en) | 2019-11-18 | 2019-11-18 | Complex algorithm variable mapping method based on storage optimization |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111045959B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115033391B (en) | 2022-08-10 | 2022-11-11 | 之江实验室 | Data flow method and device for neural network calculation |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103116493A (en) * | 2013-01-21 | 2013-05-22 | 东南大学 | Automatic mapping method applied to coarsness reconfigurable array |
CN106991007A (en) * | 2017-03-31 | 2017-07-28 | 青岛大学 | A kind of data processing method based on GPU pieces |
CN107291537A (en) * | 2017-06-07 | 2017-10-24 | 江苏海平面数据科技有限公司 | The optimization method that memory space is used on a kind of GPU pieces |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7350024B2 (en) * | 2004-12-16 | 2008-03-25 | Intel Corporation | Automatic generation of software-controlled caching and ordered synchronization |
US8375227B2 (en) * | 2009-02-02 | 2013-02-12 | Microsoft Corporation | Abstracting programmatic representation of data storage systems |
KR102270789B1 (en) * | 2014-12-10 | 2021-06-29 | 삼성전자주식회사 | Processor and method for processing command of processor |
-
2019
- 2019-11-18 CN CN201911125571.7A patent/CN111045959B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103116493A (en) * | 2013-01-21 | 2013-05-22 | 东南大学 | Automatic mapping method applied to coarsness reconfigurable array |
CN106991007A (en) * | 2017-03-31 | 2017-07-28 | 青岛大学 | A kind of data processing method based on GPU pieces |
CN107291537A (en) * | 2017-06-07 | 2017-10-24 | 江苏海平面数据科技有限公司 | The optimization method that memory space is used on a kind of GPU pieces |
Non-Patent Citations (1)
Title |
---|
基于优先级动态二进制翻译寄存器分配算法;戴涛;单征;卢帅兵;石强;潭捷;;浙江大学学报(工学版);20160715(第07期);第1338-1346页 * |
Also Published As
Publication number | Publication date |
---|---|
CN111045959A (en) | 2020-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11243895B2 (en) | Data pre-processing method and device, and related computer device and storage medium | |
CN112767983B (en) | Refresh control circuit and memory | |
CN110287038A (en) | Promote the method and system of the data-handling efficiency of Spark Streaming frame | |
CN109522428A (en) | A kind of external memory access method of the figure computing system based on index positioning | |
CN114580653A (en) | Machine learning calculation optimization method and compiler | |
CN109815267A (en) | The branch mailbox optimization method and system, storage medium and terminal of feature in data modeling | |
US7606906B2 (en) | Bundling and sending work units to a server based on a weighted cost | |
CN115129782A (en) | Partition level connection method and device for distributed database | |
CN109857984A (en) | A kind of homing method and device of boiler load factor-efficacy curve | |
CN103064955A (en) | Inquiry planning method and device | |
CN111045959B (en) | Complex algorithm variable mapping method based on storage optimization | |
CN110309912A (en) | Data access method, hardware accelerator, calculates equipment, storage medium at device | |
CN111176831A (en) | Dynamic thread mapping optimization method and device based on multithread shared memory communication | |
JPWO2016024508A1 (en) | Multiprocessor device | |
CN106991007A (en) | A kind of data processing method based on GPU pieces | |
CN114912618A (en) | Quantum computing task scheduling method and device and quantum computer operating system | |
CN104461931A (en) | Method for output processing of trace logs of multi-kernel storage device and multi-kernel environment | |
WO2021147382A1 (en) | Test task execution method and device | |
CN111179060A (en) | Transaction path selection method and device in transfer processing process | |
US10467372B2 (en) | Implementing automated identification of optimal sense point and sector locations in various on-chip linear voltage regulator designs | |
Stramondo et al. | Designing and building application‐centric parallel memories | |
CN110442436A (en) | Process management method and relevant apparatus based on container | |
CN108809726B (en) | Method and system for covering node by box | |
Plagwitz et al. | To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations | |
CN115344332B (en) | State change extraction method and system based on finite-state machine |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |