CN110956670A - Multi-mode self-adaptive Z value compression algorithm based on depth migration - Google Patents
Multi-mode self-adaptive Z value compression algorithm based on depth migration Download PDFInfo
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Abstract
The invention provides a multi-mode self-adaptive Z value compression algorithm based on depth migration, which comprises the following steps: s1: setting an initial value; s2: compressing according to the initial value obtained in S1, if any one of the a and b effective bit widths of all Tile pixels is less than or equal to the depth offset width N, the compression is successful; otherwise, proceed to S3: s3: in different PCB modes, pixels are compressed. The invention discloses a depth migration-based multi-mode self-adaptive Z value compression algorithm, wherein a migration mode Control bit PCB (Pattern Control bit) is added to each pixel Tile, and each migration mode corresponds to a depth migration amount length. In the compression process, starting from the mode with the minimum offset digit, when encountering the incompressible pixel Tile in the current offset mode, the compression unit successively tries the offset modes with more offset digits and larger coverage area, thereby realizing higher compressibility.
Description
Technical Field
The invention relates to the technical field of computer hardware, in particular to a multi-mode self-adaptive Z value compression algorithm based on depth migration.
Background
The most significant difference between 3D graphics processing and 2D graphics processing is that the concept of depth is introduced, so that the rendering result produces a layered spatial stereo reality experience. In order to correctly display the pixel color of the primitive closest to the viewer in the continuous graphics rendering process, the depth data (Z value) of each pixel needs to be buffered, so as to perform a real-time depth test to distinguish the context between the depth value of the currently-being-rendered pixel and the already-rendered pixel. And the memory data bandwidth required by the video memory read-write operation with frequent deep test is extremely large. For example, assuming that the three-dimensional scene complexity is 15, the pixel Z value precision is 32 bits, the screen resolution is 4096 × 2304, and 30 frames are drawn per second, the bandwidth required for reading only the depth buffer data from the external video memory reaches 16.98 GB/s. Assuming that 70% of pixels pass the depth test, the data bandwidth required for writing the depth buffer in the external video memory reaches 11.89GB/s, and the total data read-write of the depth data needs 28.87 GB/s. It can be seen that deep buffer access performance is a key factor affecting the performance of modern graphics processors.
Z-value compression is typically Tile-based and must be lossless, otherwise the depth of multiple pixels mapped to the same location is not discernable, and thus not all pixels' depth data is compressible. Under a specific compression algorithm, the probability that the depth values of pixels in a Tile can be compressed is defined as "compressible probability", which is related to the geometric primitive being rendered and is a performance index of the Z-value compression algorithm.
In particular to a multi-mode self-adaptive Z value compression algorithm based on depth migration, the related key performance indexes of compressibility influence the performance indexes of multiple aspects such as video memory bandwidth utilization rate, 3D graph drawing triangle passing capacity and pixel filling capacity, the overall work efficiency of the GPU is finally influenced, and the research and optimization of Z value compression algorithm performance has very important theoretical significance and application value for the development of high-performance GPU.
Disclosure of Invention
The invention discloses a multi-mode self-adaptive Z value compression algorithm based on depth migration, which is characterized in that a migration mode Control bit PCB (Pattern Control bit) is added to each pixel Tile, and each migration mode corresponds to a depth migration amount length. In the compression process, starting from the mode with the minimum offset digit, when encountering the incompressible pixel Tile in the current offset mode, the compression unit successively tries the offset modes with more offset digits and larger coverage area, thereby realizing higher compressibility.
The technical solution of the invention is as follows:
the invention provides a multi-mode self-adaptive Z value compression algorithm based on depth migration, which comprises the following steps:
s1: setting an initial value;
s2: compressing according to the initial value obtained in S1, if any one of the a and b effective bit widths of all Tile pixels is less than or equal to the depth offset width N, the compression is successful; otherwise, proceed to S3:
s3: compressing pixels in different PCB modes;
the PCB refers to M-bit binary control mode bits in the compression process, and each control mode corresponds to a different depth offset width.
Further, the initial values in step S1 include: ZMIN and ZMAX in the current pixel Tile, PCB of 2 bits, and N bit offset width.
Further, a and b in S2 are absolute difference values of all pixels in the current pixel Tile and ZMin and ZMax.
Further, the S3 includes the following steps:
s3.1: judging whether all PCB modes are tried, if all PCB modes are tried, pixel Tile compression fails; otherwise, step S3.2 is entered:
s3.2: the set PCB is PCB +1, and the corresponding offset width N is N +1, and the process proceeds to step S2.
Further, in the case of successful compression, the data format of the compressed data is defined to include ZMin and ZMax reference point depth data, N-bit offset data of all pixel points inside Tile relative to the ZMin or ZMax reference point, 1-bit Indicator data associated with each depth offset, and M-bit PCB mode data used when compressing the current pixel Tile.
Furthermore, when the compression algorithm is decompressed, the first 64bit Zmin, Zmax value and PCB value in the compressed data packet are taken out;
and then, grouping the rest of Pixels Offset data according to the PCB value in parallel according to the current Offset width, and calculating the sum of the current Offset width and Zmin or Zmax according to Indicator bits associated with each Offset to obtain an original depth value.
On the basis of a standard Depth Offset compression algorithm (DO), an Offset mode Control bit (PCB) (Pattern Control bit) is added to each pixel Tile, and the value of each PCB represents the width of one Depth Offset, so that a plurality of different Depth Offset coverage ranges are obtained under different PCB modes, and the compressibility performance index of the Offset compression algorithm is improved in the compression process.
The depth offset width is used for representing the depth value of a certain pixel point in the Tile and two reference pixel points ZMinOr ZMaxThe number of binary digits of the absolute value of the difference.
The multiple different depth offset coverage ranges are characterized by: in different PCB modes, as the depth offset width is increased step by step, the depth offset coverage is also increased step by step, thereby increasing the compressibility probability step by step.
The compression process means that two reference pixel points Z with the minimum depth value and the maximum depth value in the compressed pixel Tile are calculated firstlyMinAnd ZMaxBesides, the utility model is characterized in that: starting from the PCB mode with the minimum offset digit, when encountering the incompressible pixel Tile in the current offset mode, the compressing unit successively tries other PCB modes with larger offset width and larger coverage area to compress the pixel Tile, thereby improving the compressibility probability.
The multi-mode self-adaptive Z value compression algorithm based on the depth migration is characterized in that: under different PCB control modes, the smaller the depth offset width is, the smaller the compressible probability is, and the larger the compression ratio is; the greater the depth offset width, the greater the compressibility probability and the smaller the compressibility.
The multi-mode self-adaptive Z value compression algorithm based on the depth migration is characterized in that: under any one PCB control mode, if the pixel Tile fails to be compressed, the pixel Tile fails to be compressed under the current PCB control mode. After all the offset width control modes corresponding to the M-bit PCB have been tried, if the current pixel Tile still fails to be compressed, the pixel Tile finally fails to be compressed.
Has the advantages that:
the invention provides a depth migration-based multi-mode self-adaptive Z value compression algorithm, which adds an M-bit migration mode control bit PCB for each pixel Tile, and changes the current situations that the compression mode of the original DO depth compression algorithm is single and the scene adaptability is poor. The method and the device realize self-adaptive conversion to compression in a mode with larger depth offset width and larger depth value coverage range when compression fails in a mode with smaller depth offset width, thereby improving the compressibility performance index of the pixels Tile, and better adapting to the distribution condition of the depth values of the pixels in the Tile at different positions of the image under various different image drawing scenes.
Drawings
FIG. 1 is a compression flow chart of a multi-mode adaptive Z-value compression algorithm based on depth migration according to the present invention;
FIG. 2 shows a depth offset coverage range of a multi-mode adaptive Z-value compression algorithm based on depth offset in different offset modes according to an embodiment of the present invention;
FIG. 3 is a compressed front/back Tile depth data format of a multi-mode adaptive Z-value compression algorithm based on depth migration.
Detailed Description
The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings and the specific embodiments. It is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than the whole embodiments, and that all other embodiments, which can be derived by a person skilled in the art without inventive step based on the embodiments of the present invention, belong to the scope of protection of the present invention.
A depth migration based multi-mode adaptive Z-value compression algorithm, comprising the steps of:
s1: setting an initial value;
ZMIN and ZMAX in the current pixel Tile, PCB of 2 bits, and N bit offset width.
S2: compressing according to the initial value obtained in S1, if any one of the a and b effective bit widths of all Tile pixels is less than or equal to the depth offset width N, the compression is successful; otherwise, proceed to S3:
and a and b in the S2 are the difference absolute values of all the pixels in the current pixel Tile and ZMIN and ZMAX.
S3: compressing pixels in different PCB modes;
the PCB refers to M-bit binary control mode bits in the compression process, and each control mode corresponds to a different depth offset width.
S3.1: judging whether all PCB modes are tried, if all PCB modes are tried, pixel Tile compression fails; otherwise, step S3.2 is entered:
s3.2: the set PCB is PCB +1, and the corresponding offset width N is N +1, and the process proceeds to step S2.
Under the condition of successful compression, the data format of the data is defined to comprise ZMIN and ZMAX reference point depth data, N-bit offset data of all pixel points in the Tile relative to the ZMIN or ZMAX reference point, 1bit Indicator data associated with each depth offset, and M-bit PCB mode data used when the current pixel Tile is compressed.
When the compression algorithm is decompressed, the first 64bit Zmin, Zmax value and PCB value in the compressed data packet are taken out;
and then, grouping the rest of Pixels Offset data according to the PCB value in parallel according to the current Offset width, and calculating the sum of the current Offset width and Zmin or Zmax according to Indicator bits associated with each Offset to obtain an original depth value.
Adding an offset mode Control PCB (Pattern Control bit) for each Tile, wherein the value of each PCB represents the width of one depth offset, so that different depth offset coverage ranges are obtained in different PCB modes, and the compressibility performance index of an offset compression algorithm is improved, and fig. 2 illustrates the depth offset coverage range of MSDO in different offset modes by taking 4 PCB values and taking the offset width of 8-11 bit as an example.
As shown in fig. 3, Zmin & Zmax represents the maximum and minimum values of two selected pixel reference points in the current Tile, and Pixels offset represents the offset values of all Pixels in the Tile calculated after the compression process. The Indicator represents the selected bits of each pixel offset relative to two pixel reference points, and each pixel offset is associated with a 1bit Indicator in actual storage and stored together with the offset.
When in compression, firstly, the PCB with the minimum depth offset width is compressed, the values of Zmin and Zmax of all pixels in the Tile are calculated, the initial position of the compressed data is stored, then the distances a and b (pixel offset) between each pixel and Zmin and Zmax are calculated, at least one effective bit width of a and b is smaller than the offset width, which indicates that the current pixel is successfully compressed, otherwise, the Tile compression fails. The indication function of selecting to store a or b is done by the 1bit Indicator and is stored consecutively after Zmin and Zmax values along with the Pixel offset for each Pixel. At this time, the compression rate is large and the compressibility is small.
Under any one PCB control mode, if the pixel Tile fails to be compressed, the pixel Tile fails to be compressed under the current PCB control mode. If the compression fails in the current PCB mode, the compression is sequentially performed according to the same compression flow in the rest PCB modes according to the sequence that the width of the depth offset is gradually increased, the compression rate is gradually reduced in the iteration process, and the compression rate is gradually increased.
After all the offset width control modes corresponding to the M-bit binary PCB have been tried, if the current pixel Tile still fails to be compressed, the pixel Tile finally fails to be compressed. FIG. 1 illustrates a compression flow of a multi-mode adaptive Z-value compression algorithm based on depth migration according to the present invention, with 4 migration control modes and a migration width variation range of 6 bits-9 bits as an example.
The decompression process of the multi-mode self-adaptive Z value compression algorithm based on the depth migration is simple, and the first 64bit Zmin, Zmax and PCB values in the compressed data packet are taken out. And then, grouping the rest PixelsOffset data according to the PCB values in parallel according to the current offset width, and calculating the sum of the PCB values and Zmin or Zmax according to an Indicator to obtain an original depth value.
Theoretically, each pixel can be stored with one PCB control bit, but the compression rate is seriously reduced, and the complexity of a decompression circuit is also improved, so that the multi-mode self-adaptive Z value compression algorithm based on the depth offset only stores one uniform PCB in the compressed data of the Tile, namely, when the Tile is successfully compressed, the compression offset control modes of all internal pixels of the Tile are the same. Although the multi-mode self-adaptive Z value compression algorithm based on the depth migration can improve the compressibility, a small amount of PCB information needs to be additionally stored in the compressed data. In addition, under different PCB modes, the offset width is gradually increased, although the compression rate is gradually reduced, the higher compression rate of Tile can be obtained, and the method is worth comparing with that of Tile which can not be compressed at all.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art; the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (6)
1. A multi-mode adaptive Z-value compression algorithm based on depth migration, characterized by: the algorithm comprises the following steps:
s1: setting an initial value;
s2: compressing according to the initial value obtained in S1, if any one of the a and b effective bit widths of all Tile pixels is less than or equal to the depth offset width N, the compression is successful; otherwise, proceed to S3:
s3: compressing pixels in different PCB modes;
the PCB refers to M-bit binary control mode bits in the compression process, and each control mode corresponds to a different depth offset width.
2. The depth migration based multi-mode adaptive Z-value compression algorithm of claim 1, wherein: the initial values in step S1 include: ZMIN and ZMAX in the current pixel Tile, PCB of 2 bits, and N bit offset width.
3. The depth migration based multi-mode adaptive Z-value compression algorithm of claim 1, wherein: and a and b in the S2 are the difference absolute values of all the pixels in the current pixel Tile and ZMIN and ZMAX.
4. The depth migration based multi-mode adaptive Z-value compression algorithm of claim 1, wherein: the S3 includes the following steps:
s3.1: judging whether all PCB modes are tried, if all PCB modes are tried, pixel Tile compression fails; otherwise, step S3.2 is entered:
s3.2: the set PCB is PCB +1, and the corresponding offset width N is N +1, and the process proceeds to step S2.
5. The depth migration based multi-mode adaptive Z-value compression algorithm according to any of claims 1-4, characterized by: under the condition that the compression is successful, the data format of the data is defined to include the depth data of ZMIN and ZMAX reference points, N-bit offset data of all pixel points in the Tile relative to the ZMIN or ZMAX reference points, 1bit Indicator data associated with each depth offset, and M-bit PCB mode data used when the current pixel Tile is compressed.
6. The depth migration based multi-mode adaptive Z-value compression algorithm according to any of claims 1-4, characterized by:
when the compression algorithm is decompressed, the first 64bit Zmin, Zmax value and PCB value in the compressed data packet are taken out;
and then, grouping the rest of Pixels Offset data according to the PCB value in parallel according to the current Offset width, and calculating the sum of the current Offset width and Zmin or Zmax according to Indicator bits associated with each Offset to obtain an original depth value.
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| CN116957911A (en) * | 2023-09-19 | 2023-10-27 | 苏州元脑智能科技有限公司 | Depth image storage method and device, electronic equipment and storage medium |
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